From 7fc3ed2644444cfa208d2b33d1de0093dec95628 Mon Sep 17 00:00:00 2001 From: Jeppe Johansen Date: Sat, 17 Oct 2015 23:29:15 +0000 Subject: [PATCH] Fix a broken OpCp2Op optimization. It needed the added NR_DEFAULTFLAGS allocation to not break subsequent optimizations. Updated the code for a_load_const_cgpara in case it needed stack parameters. This was completely broken before. Now it should allow things to compile at least. git-svn-id: trunk@32086 - --- compiler/avr/aoptcpu.pas | 26 ++++++++++++++++++-------- compiler/avr/cgcpu.pas | 15 +++++++++++++-- 2 files changed, 31 insertions(+), 10 deletions(-) diff --git a/compiler/avr/aoptcpu.pas b/compiler/avr/aoptcpu.pas index bc212fc977..4a32460686 100644 --- a/compiler/avr/aoptcpu.pas +++ b/compiler/avr/aoptcpu.pas @@ -171,14 +171,19 @@ Implementation A_INC,A_LSL,A_LSR, A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and GetNextInstruction(p, hp1) and - MatchInstruction(hp1, A_CP) and - (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and - (taicpu(hp1).oper[1]^.reg = NR_R1)) or - ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and - (taicpu(hp1).oper[0]^.reg = NR_R1) and - (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR, - A_LSL,A_LSR, - A_OR,A_ORI,A_ROL,A_ROR]))) and + ((MatchInstruction(hp1, A_CP) and + (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and + (taicpu(hp1).oper[1]^.reg = NR_R1)) or + ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and + (taicpu(hp1).oper[0]^.reg = NR_R1) and + (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR, + A_LSL,A_LSR, + A_OR,A_ORI,A_ROL,A_ROR])))) or + (MatchInstruction(hp1, A_CPI) and + (taicpu(p).opcode in [A_ANDI,A_ORI]) and + (taicpu(p).oper[1]^.typ=top_const) and + (taicpu(hp1).oper[1]^.typ=top_const) and + (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and GetNextInstruction(hp1, hp2) and { be careful here, following instructions could use other flags however after a jump fpc never depends on the value of flags } @@ -203,6 +208,10 @@ Implementation end; } + asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p); + asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2); + IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs); + DebugMsg('Peephole OpCp2Op performed', p); asml.remove(hp1); @@ -584,6 +593,7 @@ Implementation (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and (hp1.typ = ait_instruction) and (taicpu(hp1).opcode in [A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR, + A_STD,A_ST, A_OUT,A_IN]) and RegInInstruction(taicpu(p).oper[0]^.reg, hp1) and (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and diff --git a/compiler/avr/cgcpu.pas b/compiler/avr/cgcpu.pas index 205d9c7583..6ec41a7deb 100644 --- a/compiler/avr/cgcpu.pas +++ b/compiler/avr/cgcpu.pas @@ -308,13 +308,15 @@ unit cgcpu; var i : longint; hp : PCGParaLocation; + ref: treference; begin if not(tcgsize2size[paraloc.Size] in [1..4]) then internalerror(2014011101); hp:=paraloc.location; - for i:=1 to tcgsize2size[paraloc.Size] do + i:=1; + while i