Fix broken peephole optimization that was testing the wrong register for modifications.

Fix tests on unsigned values. The flags were swapped.

git-svn-id: trunk@30392 -
This commit is contained in:
Jeppe Johansen 2015-03-30 11:17:38 +00:00
parent 48b38994c8
commit 7fe4b13248
2 changed files with 5 additions and 5 deletions

View File

@ -238,7 +238,7 @@ Implementation
(taicpu(p).oper[0]^.typ = top_reg) and
(taicpu(p).oper[1]^.typ = top_reg) and
GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
(not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
(not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
(hp1.typ = ait_instruction) and
(taicpu(hp1).opcode in [A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_EOR,A_AND,A_OR]) and
RegInInstruction(taicpu(p).oper[0]^.reg, hp1) and

View File

@ -101,9 +101,9 @@ interface
ltn:
GetResFlags:=F_NotPossible;
lten:
GetResFlags:=F_CS;
GetResFlags:=F_SH;
gtn:
GetResFlags:=F_CC;
GetResFlags:=F_LO;
gten:
GetResFlags:=F_NotPossible;
else
@ -112,13 +112,13 @@ interface
else
case NodeType of
ltn:
GetResFlags:=F_CC;
GetResFlags:=F_LO;
lten:
GetResFlags:=F_NotPossible;
gtn:
GetResFlags:=F_NotPossible;
gten:
GetResFlags:=F_CS;
GetResFlags:=F_SH;
else
internalerror(2014082023);
end;