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* several fixes to get better reg. allocations in the arm assembler optimizer

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git-svn-id: trunk@44245 -
This commit is contained in:
florian 2020-02-26 20:59:35 +00:00
parent 62129db44c
commit 80c0fc3c92
2 changed files with 22 additions and 9 deletions
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6
compiler/arm/aasmcpu.pas
View File

@ -866,6 +866,7 @@ implementation
A_NEG,
A_VABS,A_VADD,A_VCVT,A_VDIV,A_VLDR,A_VMOV,A_VMUL,A_VNEG,A_VSQRT,A_VSUB,
A_VEOR,
A_VMRS,A_VMSR,
A_MRS,A_MSR:
if opnr=0 then
result:=operand_write
@ -922,7 +923,10 @@ implementation
A_STREX:
result:=operand_write;
else
internalerror(200403151);
begin
writeln(opcode);
internalerror(200403151);
end;
end;
end;

25
compiler/arm/aoptcpu.pas
View File

@ -227,7 +227,7 @@ Implementation
if (p.opcode in [A_STR, A_LDM, A_STM, A_PLD,
A_CMP, A_CMN, A_TST, A_TEQ,
A_B, A_BL, A_BX, A_BLX,
A_SMLAL, A_UMLAL]) then i:=0;
A_SMLAL, A_UMLAL, A_VSTM, A_VLDM]) then i:=0;
while(i<p.ops) do
begin
@ -1529,6 +1529,9 @@ Implementation
hp2:=taicpu.op_reg_reg_shifterop(taicpu(hp1).opcode,
taicpu(hp1).oper[0]^.reg, taicpu(p).oper[1]^.reg,
taicpu(p).oper[2]^.shifterop^);
if taicpu(p).oper[2]^.shifterop^.rs<>NR_NO then
AllocRegBetween(taicpu(p).oper[2]^.shifterop^.rs,p,hp1,UsedRegs);
AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,UsedRegs);
asml.insertbefore(hp2, hp1);
GetNextInstruction(p, hp2);
asml.remove(p);
@ -1675,6 +1678,7 @@ Implementation
if not(RegUsedBetween(taicpu(hp1).oper[0]^.reg,p,hp1)) then
begin
DebugMsg('Peephole AndAnd2And done', p);
AllocRegBetween(taicpu(hp1).oper[0]^.reg,p,hp1,UsedRegs);
taicpu(p).loadConst(2,taicpu(p).oper[2]^.val and taicpu(hp1).oper[2]^.val);
taicpu(p).oppostfix:=taicpu(hp1).oppostfix;
taicpu(p).loadReg(0,taicpu(hp1).oper[0]^.reg);
@ -1685,12 +1689,12 @@ Implementation
else if not(RegUsedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
begin
DebugMsg('Peephole AndAnd2And done', hp1);
AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,UsedRegs);
taicpu(hp1).loadConst(2,taicpu(p).oper[2]^.val and taicpu(hp1).oper[2]^.val);
taicpu(hp1).oppostfix:=taicpu(p).oppostfix;
taicpu(hp1).loadReg(1,taicpu(p).oper[1]^.reg);
GetNextInstruction(p, hp1);
asml.remove(p);
p.free;
RemoveCurrentP(p);
p:=hp1;
Result:=true;
end;
@ -1715,9 +1719,9 @@ Implementation
begin
DebugMsg('Peephole AndStrb2Strb done', p);
taicpu(hp1).loadReg(0,taicpu(p).oper[1]^.reg);
AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,UsedRegs);
GetNextInstruction(p, hp1);
asml.remove(p);
p.free;
RemoveCurrentP(p);
p:=hp1;
result:=true;
end
@ -1974,6 +1978,7 @@ Implementation
begin
taicpu(hp1).opcode:=A_MLS;
taicpu(hp1).loadreg(3,taicpu(hp1).oper[1]^.reg);
if taicpu(hp1).ops=2 then
@ -1984,11 +1989,12 @@ Implementation
taicpu(hp1).loadreg(2,taicpu(p).oper[1]^.reg);
DebugMsg('MulSub2MLS done', p);
AllocRegBetween(taicpu(hp1).oper[1]^.reg,p,hp1,UsedRegs);
AllocRegBetween(taicpu(hp1).oper[2]^.reg,p,hp1,UsedRegs);
AllocRegBetween(taicpu(hp1).oper[3]^.reg,p,hp1,UsedRegs);
taicpu(hp1).ops:=4;
asml.remove(p);
p.free;
RemoveCurrentP(p);
p:=hp1;
end;
@ -2086,6 +2092,7 @@ Implementation
not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
begin
DebugMsg('Peephole UxtbUxth2Uxtb done', p);
AllocRegBetween(taicpu(hp1).oper[0]^.reg,p,hp1,UsedRegs);
taicpu(p).loadReg(0,taicpu(hp1).oper[0]^.reg);
asml.remove(hp1);
hp1.free;
@ -2110,6 +2117,7 @@ Implementation
not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
begin
DebugMsg('Peephole UxtbUxtb2Uxtb done', p);
AllocRegBetween(taicpu(hp1).oper[0]^.reg,p,hp1,UsedRegs);
taicpu(p).loadReg(0,taicpu(hp1).oper[0]^.reg);
asml.remove(hp1);
hp1.free;
@ -2196,6 +2204,7 @@ Implementation
not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
begin
DebugMsg('Peephole UxthUxth2Uxth done', p);
AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,UsedRegs);
taicpu(hp1).opcode:=A_UXTH;
taicpu(hp1).loadReg(1,taicpu(p).oper[1]^.reg);
GetNextInstruction(p, hp1);