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* Made internal assembler use new register coding
This commit is contained in:
daniel
parent
41211715ff
commit
82b0cf41a6
@ -683,9 +683,7 @@ implementation
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rg.epilogue_colouring;
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until (rg.spillednodes='') or not rg.spill_registers(aktproccode,rg.spillednodes);
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aktproccode.translate_registers(rg.colour);
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aktproccode.convert_registers;
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{$else newra}
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aktproccode.convert_registers;
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{$ifndef NoOpt}
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if (cs_optimize in aktglobalswitches) and
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{ do not optimize pure assembler procedures }
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@ -1302,7 +1300,10 @@ begin
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end.
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{
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$Log$
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Revision 1.134 2003-08-17 16:59:20 jonas
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Revision 1.135 2003-08-20 07:48:03 daniel
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* Made internal assembler use new register coding
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Revision 1.134 2003/08/17 16:59:20 jonas
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* fixed regvars so they work with newra (at least for ppc)
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* fixed some volatile register bugs
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+ -dnotranslation option for -dnewra, which causes the registers not to
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@ -1287,20 +1287,38 @@ implementation
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{ Segment override }
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if segprefix.enum>lastreg then
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internalerror(200201081);
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if (segprefix.enum<>R_NO) then
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begin
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case segprefix.enum of
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R_CS : c:=$2e;
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R_DS : c:=$3e;
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R_ES : c:=$26;
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R_FS : c:=$64;
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R_GS : c:=$65;
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R_SS : c:=$36;
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if segprefix.enum=R_INTREGISTER then
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begin
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if segprefix.number<>NR_NO then
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begin
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case segprefix.number of
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NR_CS: c:=$2e;
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NR_DS: c:=$3e;
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NR_ES: c:=$26;
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NR_FS: c:=$64;
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NR_GS: c:=$65;
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NR_SS: c:=$36;
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end;
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sec.writebytes(c,1);
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{ fix the offset for GenNode }
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inc(InsOffset);
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end;
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end
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else
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if (segprefix.enum<>R_NO) then
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begin
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case segprefix.enum of
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R_CS : c:=$2e;
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R_DS : c:=$3e;
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R_ES : c:=$26;
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R_FS : c:=$64;
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R_GS : c:=$65;
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R_SS : c:=$36;
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end;
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sec.writebytes(c,1);
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{ fix the offset for GenNode }
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inc(InsOffset);
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end;
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sec.writebytes(c,1);
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{ fix the offset for GenNode }
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inc(InsOffset);
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end;
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{ Generate the instruction }
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GenCode(sec);
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end;
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@ -1337,9 +1355,9 @@ implementation
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end;
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function regval(r:tregister):byte;
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function regval(r:Toldregister):byte;
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begin
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case r.enum of
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case r of
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R_EAX,R_AX,R_AL,R_ES,R_CR0,R_DR0,R_ST,R_ST0,R_MM0,R_XMM0 :
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regval:=0;
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R_ECX,R_CX,R_CL,R_CS,R_DR1,R_ST1,R_MM1,R_XMM1 :
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@ -1364,6 +1382,58 @@ implementation
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end;
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end;
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function regval_new(r:Tnewregister):byte;
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const count=45;
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bsstart=32;
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registers:array[0..count-1] of Tnewregister=(
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NR_CS, NR_DS, NR_ES, NR_SS,
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NR_FS, NR_GS, NR_DR0, NR_DR1,
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NR_DR2, NR_DR3, NR_DR6, NR_DR7,
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NR_CR0, NR_CR2, NR_CR3, NR_CR4,
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NR_TR3, NR_TR4, NR_TR5, NR_TR6,
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NR_TR7, NR_AL, NR_AH, NR_AX,
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NR_EAX, NR_BL, NR_BH, NR_BX,
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NR_EBX, NR_CL, NR_CH, NR_CX,
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NR_ECX, NR_DL, NR_DH, NR_DX,
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NR_EDX, NR_SI, NR_ESI, NR_DI,
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NR_EDI, NR_BP, NR_EBP, NR_SP,
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NR_ESP);
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register_values:array[0..count-1] of byte=(
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1, 3, 0, 2,
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4, 5, 0, 1,
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2, 3, 6, 7,
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0, 2, 3, 4,
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3, 4, 5, 6,
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7, 0, 4, 0,
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0, 3, 7, 3,
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3, 1, 5, 1,
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1, 2, 6, 2,
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2, 6, 6, 7,
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7, 5, 5, 4,
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4);
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var i,p:byte;
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begin
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{Binary search.}
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p:=0;
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i:=bsstart;
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while i<>0 do
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begin
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if (p+i<count) and (registers[p+i]<=r) then
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p:=p+i;
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i:=i shr 1;
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end;
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if registers[p]=r then
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regval_new:=register_values[p]
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else
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internalerror(777001);
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end;
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function process_ea(const input:toper;var output:ea;rfield:longint):boolean;
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const
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@ -1789,7 +1859,10 @@ implementation
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end;
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8,9,10 :
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begin
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bytes[0]:=ord(codes^)+regval(oper[c-8].reg);
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if oper[c-8].reg.enum=R_INTREGISTER then
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bytes[0]:=ord(codes^)+regval_new(oper[c-8].reg.number)
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else
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bytes[0]:=ord(codes^)+regval(oper[c-8].reg.enum);
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inc(codes);
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sec.writebytes(bytes,1);
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end;
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@ -1926,9 +1999,15 @@ implementation
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if (c<127) then
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begin
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if (oper[c and 7].typ=top_reg) then
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rfield:=regval(oper[c and 7].reg)
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if oper[c and 7].reg.enum=R_INTREGISTER then
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rfield:=regval_new(oper[c and 7].reg.number)
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else
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rfield:=regval(oper[c and 7].reg.enum)
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else
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rfield:=regval(oper[c and 7].ref^.base);
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if oper[c and 7].ref^.base.enum=R_INTREGISTER then
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rfield:=regval_new(oper[c and 7].ref^.base.number)
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else
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rfield:=regval(oper[c and 7].ref^.base.enum);
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end
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else
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rfield:=c and 7;
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@ -2370,7 +2449,10 @@ implementation
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end.
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{
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$Log$
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Revision 1.11 2003-08-19 13:58:33 daniel
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Revision 1.12 2003-08-20 07:48:04 daniel
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* Made internal assembler use new register coding
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Revision 1.11 2003/08/19 13:58:33 daniel
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* Corrected a comment.
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Revision 1.10 2003/08/15 14:44:20 daniel
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@ -128,7 +128,6 @@ uses
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{Super register numbers:}
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const
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{$ifdef x86_64}
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RS_SPECIAL = $00; {Special register}
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RS_RAX = $01; {EAX}
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RS_RBX = $02; {EBX}
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@ -155,17 +154,6 @@ uses
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RS_EDI = RS_RDI;
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RS_EBP = RS_RBP;
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RS_ESP = RS_RSP;
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{$else x86_64}
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RS_SPECIAL = $00; {Special register}
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RS_EAX = $01; {EAX}
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RS_EBX = $02; {EBX}
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RS_ECX = $03; {ECX}
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RS_EDX = $04; {EDX}
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RS_ESI = $05; {ESI}
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RS_EDI = $06; {EDI}
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RS_EBP = $07; {EBP}
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RS_ESP = $08; {ESP}
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{$endif x86_64}
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{Number of first and last superregister.}
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@ -735,7 +723,10 @@ implementation
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end.
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{
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$Log$
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Revision 1.12 2003-08-17 16:59:20 jonas
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Revision 1.13 2003-08-20 07:48:04 daniel
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* Made internal assembler use new register coding
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Revision 1.12 2003/08/17 16:59:20 jonas
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* fixed regvars so they work with newra (at least for ppc)
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* fixed some volatile register bugs
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+ -dnotranslation option for -dnewra, which causes the registers not to
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