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* fixed nppccnv and enabled it
- removed PPC specific second_int_to_int and use the generic one instead
This commit is contained in:
Jonas Maebe
parent
17f7d6e8e0
commit
82e23e60f5
@ -31,6 +31,7 @@ unit cpunode;
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uses
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// nppcadd,
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// nppccal,
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nppccnv,
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// nppccon,
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// nppcflw,
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nppcmat,
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@ -47,7 +48,11 @@ unit cpunode;
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end.
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{
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$Log$
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Revision 1.5 2002-05-18 13:34:26 peter
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Revision 1.6 2002-07-11 07:42:31 jonas
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* fixed nppccnv and enabled it
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- removed PPC specific second_int_to_int and use the generic one instead
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Revision 1.5 2002/05/18 13:34:26 peter
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* readded missing revisions
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Revision 1.4 2002/05/16 19:46:53 carl
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@ -32,8 +32,7 @@ interface
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type
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tppctypeconvnode = class(tcgtypeconvnode)
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protected
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function first_int_to_int: tnode; override;
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procedure second_int_to_int;override;
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{ procedure second_int_to_int;override; }
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{ procedure second_string_to_string;override; }
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{ procedure second_cstring_to_pchar;override; }
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{ procedure second_string_to_chararray;override; }
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@ -43,7 +42,7 @@ interface
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{ procedure second_chararray_to_string;override; }
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{ procedure second_char_to_string;override; }
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procedure second_int_to_real;override;
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{ procedure second_real_to_real;override; }
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procedure second_real_to_real;override;
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{ procedure second_cord_to_pointer;override; }
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{ procedure second_proc_to_procvar;override; }
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{ procedure second_bool_to_int;override; }
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@ -54,17 +53,17 @@ interface
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{ procedure second_class_to_intf;override; }
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{ procedure second_char_to_char;override; }
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procedure pass_2;override;
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procedure second_call_helper(c : tconverttype);
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procedure second_call_helper(c : tconverttype); override;
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end;
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implementation
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uses
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verbose,globals,systems,
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symconst,symdef,aasm,
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symconst,symdef,aasmbase,aasmtai,
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cgbase,pass_1,pass_2,
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ncon,ncal,
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cpubase,cpuasm,
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cpubase,aasmcpu,
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rgobj,tgobj,cgobj,cginfo;
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@ -105,116 +104,6 @@ implementation
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SecondTypeConv
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*****************************************************************************}
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procedure tppctypeconvnode.second_int_to_int;
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var
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fromsize,
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tosize : longint;
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opsize,
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tempsize : tcgsize;
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begin
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{ insert range check if not explicit conversion }
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if not(nf_explizit in flags) then
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cg.g_rangecheck(exprasmlist,left,resulttype.def);
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fromsize := left.resulttype.def.size;
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tosize := resulttype.def.size;
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{ is the result size smaller ? }
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if tosize < fromsize then
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begin
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opsize := def_cgsize(resulttype.def);
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case left.location.loc of
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LOC_REGISTER,LOC_CREGISTER:
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begin
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if location.loc = LOC_REGISTER then
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location.register:= left.location.register
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else
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location.register := rg.getregisterint(exprasmlist);
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case opsize of
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OS_8:
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exprasmlist.concat(taicpu.op_reg_reg_const_const_const(
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A_RLWINM,location.register,left.location.register,
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0,24,31));
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OS_S8:
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exprasmlist.concat(taicpu.op_reg_reg(A_EXTSB,
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location.register,left.location.register));
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OS_16:
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exprasmlist.concat(taicpu.op_reg_reg_const_const_const(
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A_RLWINM,location.register,left.location.register,
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0,16,31));
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OS_S16:
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exprasmlist.concat(taicpu.op_reg_reg(A_EXTSH,
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location.register,left.location.register));
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else
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begin
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if location.register <> left.location.register then
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exprasmlist.concat(taicpu.op_reg_reg(A_MR,
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location.register,left.location.register));
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{ we can release the upper register }
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if opsize in [OS_64,OS_S64] then
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rg.ungetregister(exprasmlist,left.location.registerhigh);
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end;
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end;
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end;
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LOC_REFERENCE,LOC_CREFERENCE:
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begin
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set_location(location,left.location);
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inc(location.reference.offset,fromsize-tosize);
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end;
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end;
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end
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{ is the result size bigger ? }
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else if resulttype.def.size>left.resulttype.def.size then
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begin
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opsize := int_cgsize(fromsize);
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location.loc := LOC_REGISTER;
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case left.location.loc of
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LOC_REFERENCE,LOC_CREFERENCE:
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begin
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reference_release(exprasmlist,left.location.reference);
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location.register := rg.getregisterint(exprasmlist);
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if not (opsize in [OS_64,OS_S64]) then
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tempsize := pred(opsize)
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else
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tempsize := opsize;
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{ this one takes care of the necessary sign extensions }
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cg.a_load_ref_reg(exprasmlist,tempsize,
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left.location.reference,location.register);
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tg.ungetiftemp(exprasmlist,left.location.reference);
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end;
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LOC_CREGISTER:
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{ since we only have 32bit registers and everything is }
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{ always loaded with sign-extending or zeroeing }
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{ instructions as appropriate, the source will contain }
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{ the correct value already, so simply copy it }
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begin
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location.register := rg.getregisterint(exprasmlist);
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exprasmlist.concat(taicpu.op_reg_reg(A_MR,location.register,
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left.location.register));
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end;
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{ see LOC_CREGISTER }
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LOC_REGISTER:;
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end;
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{ sign extend even further if necessary }
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if opsize in [OS_64,OS_S64] then
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begin
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location.registerhigh := rg.getregisterint(exprasmlist);
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if (opsize = OS_64) or
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not (is_signed(left.resulttype.def)) then
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cg.a_load_const_reg(exprasmlist,OS_32,0,
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location.registerhigh)
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else
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{ duplicate the sign bit 32 times in the high reg }
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exprasmlist.concat(taicpu.op_reg_reg_const(A_SRAWI,
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location.registerhigh,location.register,31));
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end;
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end
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else
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set_location(location,left.location);
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end;
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procedure tppctypeconvnode.second_int_to_real;
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type
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@ -225,8 +114,12 @@ implementation
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tempconst: trealconstnode;
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ref: treference;
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valuereg, tempreg, leftreg, tmpfpureg: tregister;
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signed: boolean;
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signed, valuereg_is_scratch: boolean;
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begin
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valuereg_is_scratch := false;
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
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{ the code here comes from the PowerPC Compiler Writer's Guide }
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{ * longint to double }
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@ -278,7 +171,10 @@ implementation
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begin
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leftreg := left.location.register;
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if signed then
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valuereg := cg.get_scratch_reg_int(exprasmlist)
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begin
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valuereg := cg.get_scratch_reg_int(exprasmlist);
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valuereg_is_scratch := true;
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end
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else
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valuereg := leftreg;
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end;
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@ -286,6 +182,7 @@ implementation
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begin
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leftreg := cg.get_scratch_reg_int(exprasmlist);
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valuereg := leftreg;
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valuereg_is_scratch := true;
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cg.a_load_ref_reg(exprasmlist,def_cgsize(left.resulttype.def),
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left.location.reference,leftreg);
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end
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@ -295,11 +192,15 @@ implementation
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tempreg := cg.get_scratch_reg_int(exprasmlist);
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exprasmlist.concat(taicpu.op_reg_const(A_LIS,tempreg,$4330));
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cg.a_load_reg_ref(exprasmlist,OS_32,tempreg,ref);
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cg.free_scratch_reg(exprasmlist,tempreg);
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if signed then
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exprasmlist.concat(taicpu.op_reg_reg_const(A_XORIS,valuereg,
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leftreg,$8000));
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leftreg,smallint($8000)));
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inc(ref.offset,4);
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cg.a_load_reg_ref(exprasmlist,OS_32,valuereg,ref);
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dec(ref.offset,4);
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if (valuereg_is_scratch) then
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cg.free_scratch_reg(exprasmlist,valuereg);
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if (left.location.loc = LOC_REGISTER) or
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((left.location.loc = LOC_CREGISTER) and
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@ -310,23 +211,40 @@ implementation
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tmpfpureg := rg.getregisterfpu(exprasmlist);
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exprasmlist.concat(taicpu.op_reg_ref(A_LFD,tmpfpureg,
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newreference(tempconst.location.reference)));
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tempconst.location.reference));
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tempconst.free;
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location.register := rg.getregisterfpu(exprasmlist);
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exprasmlist.concat(taicpu.op_reg_ref(A_LFD,location.register,
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newreference(ref)));
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ref));
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{ restore original offset before ungeting the tempref }
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dec(ref.offset,4);
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tg.ungetiftemp(exprasmlist,ref);
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exprasmlist.concat(taicpu.op_reg_reg_reg(A_FSUB,location.register,
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location.register,tmpfpureg));
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rg.ungetregisterfpu(exprasmlist,tmpfpureg);
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{ work around bug in some PowerPC processors }
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if (tfloatdef(resulttype.def).typ = s32real) then
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exprasmlist.concat(taicpu.op_reg_reg(A_FRSP,location.register,
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location.register));
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end;
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procedure tppctypeconvnode.second_real_to_real;
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begin
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inherited second_real_to_real;
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{ work around bug in some powerpc processors where doubles aren't }
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{ properly converted to singles }
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if (tfloatdef(left.resulttype.def).typ = s64real) and
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(tfloatdef(resulttype.def).typ = s32real) then
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exprasmlist.concat(taicpu.op_reg_reg(A_FRSP,location.register,
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location.register));
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end;
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procedure tppctypeconvnode.second_int_to_bool;
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var
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hreg1,
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@ -334,17 +252,16 @@ implementation
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resflags : tresflags;
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opsize : tcgsize;
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begin
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clear_location(location);
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{ byte(boolean) or word(wordbool) or longint(longbool) must }
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{ be accepted for var parameters }
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if (nf_explizit in flags) and
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(left.resulttype.def.size=resulttype.def.size) and
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(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE,LOC_CREGISTER]) then
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begin
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set_location(location,left.location);
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location_copy(location,left.location);
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exit;
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end;
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location.loc:=LOC_REGISTER;
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location_reset(location,LOC_REGISTER,def_cgsize(left.resulttype.def));
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opsize := def_cgsize(left.resulttype.def);
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case left.location.loc of
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LOC_CREFERENCE,LOC_REFERENCE,LOC_REGISTER,LOC_CREGISTER :
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@ -443,7 +360,7 @@ implementation
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if not(convtype in [tc_bool_2_int,tc_bool_2_bool]) then
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begin
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secondpass(left);
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set_location(location,left.location);
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location_copy(location,left.location);
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if codegenerror then
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exit;
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end;
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@ -456,7 +373,11 @@ begin
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end.
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{
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$Log$
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Revision 1.9 2002-05-20 13:30:42 carl
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Revision 1.10 2002-07-11 07:42:31 jonas
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* fixed nppccnv and enabled it
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- removed PPC specific second_int_to_int and use the generic one instead
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Revision 1.9 2002/05/20 13:30:42 carl
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* bugfix of hdisponen (base must be set, not index)
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* more portability fixes
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