paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-08-27 11:30:35 +02:00
Code Issues Packages Projects Releases Wiki Activity

* fpsr and fpcr are 64 bit on aarch64

Browse Source 
git-svn-id: trunk@49257 -
(cherry picked from commit 047d13e7e1)
This commit is contained in:
florian 2021-04-24 14:06:36 +00:00
parent 1f8c547561
commit 83219f5592
1 changed files with 8 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
rtl/aarch64/mathu.inc
View File

@ -14,25 +14,25 @@
{$asmmode gas} {$asmmode gas}
function getfpcr: dword; nostackframe; assembler; function getfpcr: qword; nostackframe; assembler;
asm asm
mrs x0,fpcr mrs x0,fpcr
end; end;
procedure setfpcr(val: dword); nostackframe; assembler; procedure setfpcr(val: qword); nostackframe; assembler;
asm asm
msr fpcr,x0 msr fpcr,x0
end; end;
function getfpsr: dword; nostackframe; assembler; function getfpsr: qword; nostackframe; assembler;
asm asm
mrs x0,fpsr mrs x0,fpsr
end; end;
procedure setfpsr(val: dword); nostackframe; assembler; procedure setfpsr(val: qword); nostackframe; assembler;
asm asm
msr fpsr, x0 msr fpsr, x0
end; end;
@ -75,7 +75,7 @@ const
fpu_ufe = 1 shl 11; fpu_ufe = 1 shl 11;
fpu_ixe = 1 shl 12; fpu_ixe = 1 shl 12;
fpu_ide = 1 shl 15; fpu_ide = 1 shl 15;
fpu_exception_mask = fpu_ioe or fpu_dze or fpu_ofe or fpu_ufe or fpu_ixe or fpu_ide; fpu_exception_mask = qword(fpu_ioe or fpu_dze or fpu_ofe or fpu_ufe or fpu_ixe or fpu_ide);
fpu_exception_mask_to_status_mask_shift = 8; fpu_exception_mask_to_status_mask_shift = 8;
@ -111,13 +111,13 @@ function GetExceptionMask: TFPUExceptionMask;
function SetExceptionMask(const Mask: TFPUExceptionMask): TFPUExceptionMask; function SetExceptionMask(const Mask: TFPUExceptionMask): TFPUExceptionMask;
var var
newfpcr: dword; newfpcr: qword;
begin begin
{ clear "exception happened" flags } { clear "exception happened" flags }
ClearExceptions(false); ClearExceptions(false);
softfloat_exception_mask:=mask; softfloat_exception_mask:=mask;
{ at least the ThunderX AArch64 support apperently hardware exceptions, { at least the ThunderX AArch64 support apparently hardware exceptions,
so set fpcr correctly, thought it might be WI on most implementations it does not hurt so set fpcr correctly, thought it might be WI on most implementations it does not hurt
} }
newfpcr:=fpu_exception_mask; newfpcr:=fpu_exception_mask;
@ -143,7 +143,7 @@ function SetExceptionMask(const Mask: TFPUExceptionMask): TFPUExceptionMask;
procedure ClearExceptions(RaisePending: Boolean); procedure ClearExceptions(RaisePending: Boolean);
var var
fpsr: dword; fpsr: qword;
f: TFPUException; f: TFPUException;
begin begin
fpsr:=getfpsr; fpsr:=getfpsr;