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* more adaptions for SPARC64
git-svn-id: trunk@36381 -
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6
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vendored
@ -663,7 +663,6 @@ compiler/sparc/aoptcpu.pas svneol=native#text/plain
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compiler/sparc/aoptcpub.pas svneol=native#text/plain
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compiler/sparc/aoptcpud.pas svneol=native#text/plain
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compiler/sparc/cgcpu.pas svneol=native#text/plain
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compiler/sparc/cpubase.pas svneol=native#text/plain
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compiler/sparc/cpuelf.pas svneol=native#text/plain
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compiler/sparc/cpugas.pas svneol=native#text/plain
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compiler/sparc/cpuinfo.pas svneol=native#text/plain
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@ -679,7 +678,6 @@ compiler/sparc/ncpucnv.pas svneol=native#text/plain
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compiler/sparc/ncpuinln.pas svneol=native#text/plain
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compiler/sparc/ncpumat.pas svneol=native#text/plain
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compiler/sparc/ncpuset.pas svneol=native#text/plain
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compiler/sparc/opcode.inc svneol=native#text/plain
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compiler/sparc/racpu.pas svneol=native#text/plain
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compiler/sparc/racpugas.pas svneol=native#text/plain
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compiler/sparc/rgcpu.pas svneol=native#text/plain
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@ -692,7 +690,6 @@ compiler/sparc/rspsri.inc svneol=native#text/plain
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compiler/sparc/rspstab.inc svneol=native#text/plain
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compiler/sparc/rspstd.inc svneol=native#text/plain
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compiler/sparc/rspsup.inc svneol=native#text/plain
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compiler/sparc/strinst.inc svneol=native#text/plain
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compiler/sparc/symcpu.pas svneol=native#text/plain
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compiler/sparc64/cpuinfo.pas svneol=native#text/plain
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compiler/sparc64/rsp64con.inc svneol=native#text/pascal
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@ -704,7 +701,10 @@ compiler/sparc64/rsp64sri.inc svneol=native#text/pascal
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compiler/sparc64/rsp64stab.inc svneol=native#text/pascal
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compiler/sparc64/rsp64std.inc svneol=native#text/pascal
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compiler/sparc64/rsp64sup.inc svneol=native#text/pascal
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compiler/sparcgen/cpubase.pas svneol=native#text/plain
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compiler/sparcgen/opcode.inc svneol=native#text/plain
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compiler/sparcgen/spreg.dat svneol=native#text/plain
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compiler/sparcgen/strinst.inc svneol=native#text/plain
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compiler/switches.pas svneol=native#text/plain
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compiler/symbase.pas svneol=native#text/plain
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compiler/symconst.pas svneol=native#text/plain
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@ -53,6 +53,7 @@ uses
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Registers
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*****************************************************************************}
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{$ifdef SPARC}
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type
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{ Number of registers used for indexing in tables }
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tregisterindex=0..{$i rspnor.inc}-1;
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@ -89,7 +90,46 @@ uses
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regdwarf_table : array[tregisterindex] of ShortInt = (
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{$i rspdwrf.inc}
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);
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{$endif SPARC}
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{$ifdef SPARC64}
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type
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{ Number of registers used for indexing in tables }
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tregisterindex=0..{$i rsp64nor.inc}-1;
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totherregisterset = set of tregisterindex;
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const
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{ Available Superregisters }
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{$i rsp64sup.inc}
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{ No Subregisters }
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R_SUBWHOLE = R_SUBQ;
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{ Available Registers }
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{$i rsp64con.inc}
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first_int_imreg = $20;
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first_fpu_imreg = $20;
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{ MM Super register first and last }
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first_mm_supreg = 0;
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first_mm_imreg = 1;
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{ TODO: Calculate bsstart}
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regnumber_count_bsstart = 128;
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regnumber_table : array[tregisterindex] of tregister = (
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{$i rsp64num.inc}
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);
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regstabs_table : array[tregisterindex] of ShortInt = (
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{$i rsp64stab.inc}
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);
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regdwarf_table : array[tregisterindex] of ShortInt = (
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{$i rsp64dwrf.inc}
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);
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{$endif SPARC64}
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{*****************************************************************************
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Conditions
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@ -298,6 +338,7 @@ implementation
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uses
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rgBase,verbose;
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{$ifdef SPARC}
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const
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std_regname_table : TRegNameTAble = (
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{$i rspstd.inc}
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@ -310,7 +351,22 @@ implementation
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std_regname_index : TRegisterIndexTable = (
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{$i rspsri.inc}
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);
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{$endif SPARC}
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{$ifdef SPARC64}
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const
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std_regname_table : TRegNameTAble = (
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{$i rsp64std.inc}
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);
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regnumber_index : TRegisterIndexTable = (
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{$i rsp64rni.inc}
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);
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std_regname_index : TRegisterIndexTable = (
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{$i rsp64sri.inc}
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);
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{$endif SPARC64}
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{*****************************************************************************
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Helpers
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