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* fixed several (harmles) range errors

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git-svn-id: trunk@6192 -
This commit is contained in:
Jonas Maebe 2007-01-25 21:43:11 +00:00
parent 7dac4c57c2
commit 846fbf9fa0
2 changed files with 19 additions and 19 deletions
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36
compiler/cgobj.pas
View File

@ -973,7 +973,7 @@ implementation
SL_SETMAX :
if (sreg.bitlen <> AIntBits) then
a_op_const_reg(list,OP_OR,sreg.subsetregsize,
((aword(1) shl sreg.bitlen)-1) shl sreg.startbit,
aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
sreg.subsetreg)
else
a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
@ -1168,7 +1168,7 @@ implementation
a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
{ mask other bits }
if (sref.bitlen <> AIntBits) then
a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
end
else
@ -1178,7 +1178,7 @@ implementation
a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
{ mask other bits }
if (sref.bitlen <> AIntBits) then
a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,extra_value_reg);
a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
end;
{ merge }
a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
@ -1200,7 +1200,7 @@ implementation
a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
if (loadbitsize <> AIntBits) then
{ mask left over bits }
a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
tmpreg := getintregister(list,OS_INT);
{ the bits in extra_value_reg (if any) start at the most significant bit => }
{ extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
@ -1240,7 +1240,7 @@ implementation
{ merge }
a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
{ mask other bits }
a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
end;
end;
@ -1291,7 +1291,7 @@ implementation
else
a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
{ mask other bits }
a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
end
end
else
@ -1397,7 +1397,7 @@ implementation
if (slopt <> SL_SETMAX) then
begin
maskreg := getintregister(list,OS_INT);
a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen)-1,maskreg);
a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
@ -1410,11 +1410,11 @@ implementation
if (slopt <> SL_SETMAX) then
a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
else if (sref.bitlen <> AIntBits) then
a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen) - 1, tmpreg)
a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
else
a_load_const_reg(list,OS_INT,-1,tmpreg);
if (slopt <> SL_REGNOSRCMASK) then
a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,tmpreg);
a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg);
a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
end;
@ -1509,12 +1509,12 @@ implementation
maskreg := getintregister(list,OS_INT);
if (target_info.endian = endian_big) then
begin
a_load_const_reg(list,OS_INT,((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
end
else
begin
a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen)-1,maskreg);
a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
end;
@ -1529,7 +1529,7 @@ implementation
if (slopt <> SL_SETMAX) then
a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
else if (sref.bitlen <> AIntBits) then
a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen) - 1, tmpreg)
a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
else
a_load_const_reg(list,OS_INT,-1,tmpreg);
if (target_info.endian = endian_big) then
@ -1538,7 +1538,7 @@ implementation
if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) and
(loadbitsize <> AIntBits) then
{ mask left over bits }
a_op_const_reg(list,OP_AND,OS_INT,((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),tmpreg);
a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
end
else
@ -1546,7 +1546,7 @@ implementation
if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) and
(loadbitsize <> AIntBits) then
{ mask left over bits }
a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,tmpreg);
a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
end;
a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
@ -1565,7 +1565,7 @@ implementation
if (slopt <> SL_SETMAX) then
a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
else if (sref.bitlen <> AIntBits) then
a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen) - 1, tmpreg)
a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
else
a_load_const_reg(list,OS_INT,-1,tmpreg);
end;
@ -1578,7 +1578,7 @@ implementation
begin
a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen)-1,maskreg);
a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
end
else
@ -1586,7 +1586,7 @@ implementation
{ Y-x = -(Y-x) }
a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen)-1,maskreg);
a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
{$ifdef x86}
{ on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
@ -1616,7 +1616,7 @@ implementation
else
begin
if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,tmpreg);
a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
end;
a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);

2
compiler/powerpc/cgcpu.pas
View File

@ -2208,7 +2208,7 @@ const
else if ((value shr 32) = 0) then
begin
tmpreg := tcgppc(cg).rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
cg.a_load_const_reg(list,OS_32,cardinal(value),tmpreg);
cg.a_load_const_reg(list,OS_32,aint(value),tmpreg);
list.concat(taicpu.op_reg_reg_reg(ops[issub,2],
regdst.reglo,regsrc.reglo,tmpreg));
list.concat(taicpu.op_reg_reg(ops[issub,3],