From 85c7368759f5fb53aa23e03c8cc27c2deb424b62 Mon Sep 17 00:00:00 2001
From: florian <florian@freepascal.org>
Date: Wed, 24 Aug 2022 21:15:18 +0200
Subject: [PATCH]   * handle also simulated flags in
 tmipselnotnode.second_boolean, resolves #39877

---
 compiler/mips/ncpumat.pas | 31 ++++++++++++++++---------------
 tests/webtbs/tw39877.pp   | 15 +++++++++++++++
 2 files changed, 31 insertions(+), 15 deletions(-)
 create mode 100644 tests/webtbs/tw39877.pp

diff --git a/compiler/mips/ncpumat.pas b/compiler/mips/ncpumat.pas
index 8841a3ac40..c241329911 100644
--- a/compiler/mips/ncpumat.pas
+++ b/compiler/mips/ncpumat.pas
@@ -248,25 +248,26 @@ begin
   if not handle_locjump then
     begin
       case left.location.loc of
+        LOC_FLAGS,
         LOC_REGISTER, LOC_CREGISTER, LOC_REFERENCE, LOC_CREFERENCE,
         LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF:
-        begin
-          hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, left.resultdef, True);
-          location_reset(location,LOC_FLAGS,OS_NO);
-          location.resflags.reg2:=NR_R0;
-          location.resflags.cond:=OC_EQ;
+          begin
+            hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, left.resultdef, True);
+            location_reset(location,LOC_FLAGS,OS_NO);
+            location.resflags.reg2:=NR_R0;
+            location.resflags.cond:=OC_EQ;
 {$ifdef cpu32bit}
-          if is_64bit(resultdef) then
-            begin
-              tmpreg:=cg.GetIntRegister(current_asmdata.CurrAsmList,OS_INT);
-              { OR low and high parts together }
-              current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_OR,tmpreg,left.location.register64.reglo,left.location.register64.reghi));
-              location.resflags.reg1:=tmpreg;
-            end
-          else
+            if is_64bit(resultdef) then
+              begin
+                tmpreg:=cg.GetIntRegister(current_asmdata.CurrAsmList,OS_INT);
+                { OR low and high parts together }
+                current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_OR,tmpreg,left.location.register64.reglo,left.location.register64.reghi));
+                location.resflags.reg1:=tmpreg;
+              end
+            else
 {$endif cpu32bit}
-            location.resflags.reg1:=left.location.register;
-        end;
+              location.resflags.reg1:=left.location.register;
+          end;
         else
           internalerror(2003042401);
       end;
diff --git a/tests/webtbs/tw39877.pp b/tests/webtbs/tw39877.pp
new file mode 100644
index 0000000000..b3a61c56b8
--- /dev/null
+++ b/tests/webtbs/tw39877.pp
@@ -0,0 +1,15 @@
+{ %norun }
+{ %opt=-O- }
+type
+  te = (gtNone,gtRadial,gtDiamond,gtAngular);
+  ts = set of te;
+
+var
+  gt1,gt2 : te;
+
+begin
+  writeln;
+  if not ([gt1,gt2] <= [gtRadial,gtDiamond,gtAngular]) then
+    writeln;
+end.
+