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+ added a size parameter to optimize_op_const and do a sign extension of the 'a' parameter up from the specified size, so that things like (i and $ffffffff) get optimized away the same way as (i and -1)

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git-svn-id: trunk@26561 -
This commit is contained in:
nickysn 2014-01-22 15:00:34 +00:00
parent bef2957e0b
commit 85dd9e5789
7 changed files with 24 additions and 13 deletions
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2
compiler/arm/cgcpu.pas
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@ -900,7 +900,7 @@ unit cgcpu;
l1 : longint;
imm1, imm2: DWord;
begin
optimize_op_const(op, a);
optimize_op_const(size, op, a);
case op of
OP_NONE:
begin

15
compiler/cgobj.pas
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@ -336,11 +336,12 @@ unit cgobj;
to emit, and the constant value to emit. This function can opcode OP_NONE to
remove the opcode and OP_MOVE to replace it with a simple load
@param(size Size of the operand in constant)
@param(op The opcode to emit, returns the opcode which must be emitted)
@param(a The constant which should be emitted, returns the constant which must
be emitted)
}
procedure optimize_op_const(var op: topcg; var a : tcgint);virtual;
procedure optimize_op_const(size: TCGSize; var op: topcg; var a : tcgint);virtual;
{#
This routine is used in exception management nodes. It should
@ -1442,10 +1443,20 @@ implementation
end;
procedure tcg.optimize_op_const(var op: topcg; var a : tcgint);
procedure tcg.optimize_op_const(size: TCGSize; var op: topcg; var a : tcgint);
var
powerval : longint;
begin
case size of
OS_64,OS_S64:
a:=int64(a);
OS_32,OS_S32:
a:=longint(a);
OS_16,OS_S16:
a:=smallint(a);
OS_8,OS_S8:
a:=shortint(a);
end;
case op of
OP_OR :
begin

4
compiler/i8086/cgcpu.pas
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@ -286,7 +286,7 @@ unit cgcpu;
use_loop: Boolean;
i: Integer;
begin
optimize_op_const(op, a);
optimize_op_const(size, op, a);
check_register_size(size,reg);
if size in [OS_64, OS_S64] then
@ -540,7 +540,7 @@ unit cgcpu;
tmpref: treference;
op1,op2: TAsmOp;
begin
optimize_op_const(op, a);
optimize_op_const(size, op, a);
tmpref:=ref;
make_simple_ref(list,tmpref);

4
compiler/m68k/cgcpu.pas
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@ -1007,7 +1007,7 @@ unit cgcpu;
instr : taicpu;
paraloc1,paraloc2,paraloc3 : tcgpara;
begin
optimize_op_const(op, a);
optimize_op_const(size, op, a);
opcode := topcg2tasmop[op];
case op of
OP_NONE :
@ -1118,7 +1118,7 @@ unit cgcpu;
begin
writeln('a_op_const_ref');
optimize_op_const(op, a);
optimize_op_const(size, op, a);
opcode := topcg2tasmop[op];
case op of
OP_NONE :

4
compiler/mips/cgcpu.pas
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@ -749,7 +749,7 @@ const
procedure TCGMIPS.a_op_const_reg(list: tasmlist; Op: TOpCG; size: tcgsize; a: tcgint; reg: TRegister);
begin
optimize_op_const(op,a);
optimize_op_const(size,op,a);
case op of
OP_NONE:
exit;
@ -826,7 +826,7 @@ var
asmop: TAsmOp;
begin
ovloc.loc := LOC_VOID;
optimize_op_const(op,a);
optimize_op_const(size,op,a);
signed:=(size in [OS_S8,OS_S16,OS_S32]);
if (setflags and (not signed) and (src=dst) and (op in [OP_ADD,OP_SUB])) then
hreg:=GetIntRegister(list,OS_INT)

4
compiler/sparc/cgcpu.pas
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@ -704,7 +704,7 @@ implementation
procedure TCgSparc.a_op_const_reg(list:TAsmList;Op:TOpCG;size:tcgsize;a:tcgint;reg:TRegister);
begin
optimize_op_const(op,a);
optimize_op_const(size,op,a);
case op of
OP_NONE:
exit;
@ -780,7 +780,7 @@ implementation
tmpreg1,tmpreg2 : tregister;
begin
ovloc.loc:=LOC_VOID;
optimize_op_const(op,a);
optimize_op_const(size,op,a);
case op of
OP_NONE:
begin

4
compiler/x86/cgx86.pas
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@ -1660,7 +1660,7 @@ unit cgx86;
tmpreg : tregister;
{$endif x86_64}
begin
optimize_op_const(op, a);
optimize_op_const(size, op, a);
{$ifdef x86_64}
{ x86_64 only supports signed 32 bits constants directly }
if not(op in [OP_NONE,OP_MOVE]) and
@ -1767,7 +1767,7 @@ unit cgx86;
{$endif x86_64}
tmpref : treference;
begin
optimize_op_const(op, a);
optimize_op_const(size, op, a);
if op in [OP_NONE,OP_MOVE] then
begin
if (op=OP_MOVE) then