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* changed the codes of the IF_CYRIX and IF_AMD instruction flags, to avoid

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messing up the other Intel-compatible processor flag, they're used with

git-svn-id: trunk@33316 -
This commit is contained in:
nickysn 2016-03-23 14:00:48 +00:00
parent 27f20503ab
commit 867a4881ba
1 changed files with 14 additions and 2 deletions
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16
compiler/x86/aasmcpu.pas
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@ -460,11 +460,23 @@ implementation
IF_WILLAMETTE = $08000000; { Willamette instructions } IF_WILLAMETTE = $08000000; { Willamette instructions }
IF_PRESCOTT = $09000000; { Prescott instructions } IF_PRESCOTT = $09000000; { Prescott instructions }
IF_X86_64 = $0a000000; IF_X86_64 = $0a000000;
IF_CYRIX = $0b000000; { Cyrix-specific instruction }
IF_AMD = $0c000000; { AMD-specific instruction }
IF_CENTAUR = $0d000000; { centaur-specific instruction } IF_CENTAUR = $0d000000; { centaur-specific instruction }
IF_SANDYBRIDGE = $0e000000; { Sandybridge-specific instruction } IF_SANDYBRIDGE = $0e000000; { Sandybridge-specific instruction }
IF_NEC = $0f000000; { NEC V20/V30 instruction } IF_NEC = $0f000000; { NEC V20/V30 instruction }
{ the following are not strictly part of the processor level, because
they are never used standalone, but always in combination with a
separate processor level flag. Therefore, they use bits outside of
IF_PLEVEL, otherwise they would mess up the processor level they're
used in combination with.
The following combinations are currently used:
IF_AMD or IF_P6,
IF_CYRIX or IF_486,
IF_CYRIX or IF_PENT,
IF_CYRIX or IF_P6 }
IF_CYRIX = $10000000; { Cyrix-specific instruction }
IF_AMD = $20000000; { AMD-specific instruction }
{ added flags } { added flags }
IF_PRE = $40000000; { it's a prefix instruction } IF_PRE = $40000000; { it's a prefix instruction }
IF_PASS2 = $80000000; { if the instruction can change in a second pass } IF_PASS2 = $80000000; { if the instruction can change in a second pass }