mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-10-16 08:06:11 +02:00
+ added knowledge to the compiler for the x86 instructions, that don't read
their input registers, in case both parameters are the same register (e.g. xor eax, eax; sub eax, eax; etc.) git-svn-id: trunk@35861 -
This commit is contained in:
parent
f91e72391d
commit
869f395a31
@ -233,6 +233,15 @@ unit aoptcpu;
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exit
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exit
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end;
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end;
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end;
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end;
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if ([Ch_RFlags,Ch_RWFlags]*Ch<>[]) and (reg=NR_DEFAULTFLAGS) then
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begin
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RegReadByInstruction := true;
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exit
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end;
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if (Ch_NoReadIfEqualRegs in Ch) and (p.ops=2) and
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(p.oper[0]^.typ=top_reg) and (p.oper[1]^.typ=top_reg) and
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(p.oper[0]^.reg=p.oper[1]^.reg) then
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exit;
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if ([CH_RWOP1,CH_ROP1,CH_MOP1]*Ch<>[]) and reginop(reg,p.oper[0]^) then
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if ([CH_RWOP1,CH_ROP1,CH_MOP1]*Ch<>[]) and reginop(reg,p.oper[0]^) then
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begin
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begin
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RegReadByInstruction := true;
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RegReadByInstruction := true;
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@ -248,11 +257,6 @@ unit aoptcpu;
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RegReadByInstruction := true;
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RegReadByInstruction := true;
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exit
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exit
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end;
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end;
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if ([Ch_RFlags,Ch_RWFlags]*Ch<>[]) and (reg=NR_DEFAULTFLAGS) then
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begin
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RegReadByInstruction := true;
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exit
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end;
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end;
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end;
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end;
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end;
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end;
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end;
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@ -25,7 +25,7 @@
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(Ch: [Ch_WFlags]),
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(Ch: [Ch_WFlags]),
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(Ch: []),
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(Ch: []),
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(Ch: [Ch_RWFlags]),
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(Ch: [Ch_RWFlags]),
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(Ch: [Ch_ROp1, Ch_ROp2, Ch_WFlags]),
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(Ch: [Ch_ROp1, Ch_ROp2, Ch_WFlags, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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@ -193,7 +193,7 @@
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(Ch: [Ch_Wop2, Ch_ROP1]),
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(Ch: [Ch_Wop2, Ch_ROP1]),
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(Ch: []),
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(Ch: []),
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(Ch: []),
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(Ch: []),
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_Wop2, Ch_Rop1, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_All, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_RDirFlag]),
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@ -326,7 +326,7 @@
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_WEAX, Ch_RFLAGS]),
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(Ch: [Ch_WEAX, Ch_RFLAGS]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_RWFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_RWFlags, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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@ -354,7 +354,7 @@
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(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
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(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
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(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
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(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
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(Ch: [Ch_Wop1]),
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(Ch: [Ch_Wop1]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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@ -374,10 +374,10 @@
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_RWop1, Ch_RWop2]),
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(Ch: [Ch_RWop1, Ch_RWop2, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_WEAX, Ch_REBX]),
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(Ch: [Ch_WEAX, Ch_REBX]),
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(Ch: [Ch_WEAX, Ch_REBX]),
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(Ch: [Ch_WEAX, Ch_REBX]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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@ -25,7 +25,7 @@
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(Ch: [Ch_WFlags]),
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(Ch: [Ch_WFlags]),
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(Ch: []),
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(Ch: []),
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(Ch: [Ch_RWFlags]),
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(Ch: [Ch_RWFlags]),
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(Ch: [Ch_ROp1, Ch_ROp2, Ch_WFlags]),
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(Ch: [Ch_ROp1, Ch_ROp2, Ch_WFlags, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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@ -193,7 +193,7 @@
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(Ch: [Ch_Wop2, Ch_ROP1]),
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(Ch: [Ch_Wop2, Ch_ROP1]),
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(Ch: []),
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(Ch: []),
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(Ch: []),
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(Ch: []),
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_Wop2, Ch_Rop1, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_All, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_RDirFlag]),
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@ -326,7 +326,7 @@
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_WEAX, Ch_RFLAGS]),
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(Ch: [Ch_WEAX, Ch_RFLAGS]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_RWFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_RWFlags, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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@ -354,7 +354,7 @@
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(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
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(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
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(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
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(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
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(Ch: [Ch_Wop1]),
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(Ch: [Ch_Wop1]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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@ -374,10 +374,10 @@
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_RWop1, Ch_RWop2]),
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(Ch: [Ch_RWop1, Ch_RWop2, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_WEAX, Ch_REBX]),
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(Ch: [Ch_WEAX, Ch_REBX]),
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(Ch: [Ch_WEAX, Ch_REBX]),
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(Ch: [Ch_WEAX, Ch_REBX]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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@ -217,6 +217,9 @@ interface
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Ch_Rop1, Ch_Wop1, Ch_RWop1,Ch_Mop1,
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Ch_Rop1, Ch_Wop1, Ch_RWop1,Ch_Mop1,
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Ch_Rop2, Ch_Wop2, Ch_RWop2,Ch_Mop2,
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Ch_Rop2, Ch_Wop2, Ch_RWop2,Ch_Mop2,
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Ch_Rop3, Ch_WOp3, Ch_RWOp3,Ch_Mop3,
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Ch_Rop3, Ch_WOp3, Ch_RWOp3,Ch_Mop3,
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{ instruction doesn't read it's input register, in case both parameters
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are the same register (e.g. xor eax,eax; sub eax,eax; sbb eax,eax (reads flags only), etc.) }
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Ch_NoReadIfEqualRegs,
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Ch_WMemEDI,
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Ch_WMemEDI,
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Ch_All,
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Ch_All,
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{ x86_64 registers }
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{ x86_64 registers }
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@ -174,7 +174,7 @@ void \2\x0F\x06 286,PRIV
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void \1\xF5 8086
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void \1\xF5 8086
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[CMP,cmpX]
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[CMP,cmpX]
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(Ch_ROp1, Ch_ROp2, Ch_WFlags)
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(Ch_ROp1, Ch_ROp2, Ch_WFlags, Ch_NoReadIfEqualRegs)
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regmem,reg16|32|64 \320\1\x39\101 8086,SM
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regmem,reg16|32|64 \320\1\x39\101 8086,SM
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reg16|32|64,regmem \320\1\x3B\110 8086,SM
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reg16|32|64,regmem \320\1\x3B\110 8086,SM
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rm8,reg8 \1\x38\101 8086
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rm8,reg8 \1\x38\101 8086
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@ -1042,7 +1042,7 @@ void \3\x0F\x01\xC8 PRESCOTT
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reg_eax,reg_ecx,reg_edx \3\x0F\x01\xC8 PRESCOTT,ND
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reg_eax,reg_ecx,reg_edx \3\x0F\x01\xC8 PRESCOTT,ND
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[MOV,movX]
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[MOV,movX]
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(Ch_Wop2, Ch_Rop1)
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(Ch_Wop2, Ch_Rop1, Ch_NoReadIfEqualRegs)
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mem_offs,reg_ax \324\1\xA3\44 8086,SM
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mem_offs,reg_ax \324\1\xA3\44 8086,SM
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mem_offs,reg_eax \325\1\xA3\44 386,SM
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mem_offs,reg_eax \325\1\xA3\44 386,SM
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mem_offs,reg_rax \326\1\xA3\44 X86_64,SM
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mem_offs,reg_rax \326\1\xA3\44 X86_64,SM
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@ -1778,7 +1778,7 @@ rm8,reg_cl \1\xD2\207 8086
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rm8,imm \1\xC0\207\25 186,SB
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rm8,imm \1\xC0\207\25 186,SB
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[SBB,sbbX]
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[SBB,sbbX]
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(Ch_Mop2, Ch_Rop1, Ch_RWFlags)
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(Ch_Mop2, Ch_Rop1, Ch_RWFlags, Ch_NoReadIfEqualRegs)
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regmem,reg16|32|64 \320\1\x19\101 8086,SM
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regmem,reg16|32|64 \320\1\x19\101 8086,SM
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reg16|32|64,regmem \320\1\x1B\110 8086,SM
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reg16|32|64,regmem \320\1\x1B\110 8086,SM
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rm16|32|64,imm8 \320\1\x83\203\15 8086
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rm16|32|64,imm8 \320\1\x83\203\15 8086
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@ -1920,7 +1920,7 @@ mem \2\x0F\x00\201 286,PROT
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reg16|32|64 \320\2\x0F\x00\201 286,PROT
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reg16|32|64 \320\2\x0F\x00\201 286,PROT
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[SUB,subX]
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[SUB,subX]
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(Ch_Mop2, Ch_Rop1, Ch_WFlags)
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(Ch_Mop2, Ch_Rop1, Ch_WFlags, Ch_NoReadIfEqualRegs)
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regmem,reg16|32|64 \320\1\x29\101 8086,SM
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regmem,reg16|32|64 \320\1\x29\101 8086,SM
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reg16|32|64,regmem \320\1\x2B\110 8086,SM
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reg16|32|64,regmem \320\1\x2B\110 8086,SM
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rm8,reg8 \1\x28\101 8086
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rm8,reg8 \1\x28\101 8086
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@ -2041,7 +2041,7 @@ reg32,mem \325\2\x0F\xA6\110 386,SD,UNDOC,ND
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reg32,reg32 \325\2\x0F\xA6\110 386,UNDOC,ND
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reg32,reg32 \325\2\x0F\xA6\110 386,UNDOC,ND
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[XCHG,xchgX]
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[XCHG,xchgX]
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(Ch_RWop1, Ch_RWop2)
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(Ch_RWop1, Ch_RWop2, Ch_NoReadIfEqualRegs)
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reg_ax,reg16 \324\11\x90 8086
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reg_ax,reg16 \324\11\x90 8086
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reg_eax,reg32 \325\11\x90 386
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reg_eax,reg32 \325\11\x90 386
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reg_rax,reg64 \326\11\x90 X86_64
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reg_rax,reg64 \326\11\x90 X86_64
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@ -2062,7 +2062,7 @@ void \1\xD7 8086
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void \1\xD7 8086
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void \1\xD7 8086
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[XOR,xorX]
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[XOR,xorX]
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(Ch_Mop2, Ch_Rop1, Ch_WFlags)
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(Ch_Mop2, Ch_Rop1, Ch_WFlags, Ch_NoReadIfEqualRegs)
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regmem,reg16|32|64 \320\1\x31\101 8086,SM
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regmem,reg16|32|64 \320\1\x31\101 8086,SM
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reg16|32|64,regmem \320\1\x33\110 8086,SM
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reg16|32|64,regmem \320\1\x33\110 8086,SM
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rm8,reg8 \1\x30\101 8086
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rm8,reg8 \1\x30\101 8086
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@ -19,7 +19,7 @@
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(Ch: [Ch_WFlags]),
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(Ch: [Ch_WFlags]),
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(Ch: []),
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(Ch: []),
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(Ch: [Ch_RWFlags]),
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(Ch: [Ch_RWFlags]),
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(Ch: [Ch_ROp1, Ch_ROp2, Ch_WFlags]),
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(Ch: [Ch_ROp1, Ch_ROp2, Ch_WFlags, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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@ -183,7 +183,7 @@
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(Ch: [Ch_Wop2, Ch_ROP1]),
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(Ch: [Ch_Wop2, Ch_ROP1]),
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(Ch: []),
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(Ch: []),
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(Ch: []),
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(Ch: []),
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_Wop2, Ch_Rop1, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_Rop1, Ch_Wop2]),
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(Ch: [Ch_All, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_RDirFlag]),
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@ -310,7 +310,7 @@
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(Ch: [Ch_WFlags, Ch_REAX]),
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(Ch: [Ch_WFlags, Ch_REAX]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_RWFlags]),
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(Ch: [Ch_Mop2, Ch_Rop1, Ch_RWFlags, Ch_NoReadIfEqualRegs]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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(Ch: [Ch_All, Ch_WFlags, Ch_RDirFlag]),
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@ -339,7 +339,7 @@
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(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
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(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
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(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
|
(Ch: [Ch_REAX, Ch_WMemEDI, Ch_RWEDI, Ch_RDirFlag]),
|
||||||
(Ch: [Ch_Wop1]),
|
(Ch: [Ch_Wop1]),
|
||||||
(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
|
(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags, Ch_NoReadIfEqualRegs]),
|
||||||
(Ch: [Ch_All]),
|
(Ch: [Ch_All]),
|
||||||
(Ch: [Ch_All]),
|
(Ch: [Ch_All]),
|
||||||
(Ch: [Ch_All]),
|
(Ch: [Ch_All]),
|
||||||
@ -359,10 +359,10 @@
|
|||||||
(Ch: [Ch_All]),
|
(Ch: [Ch_All]),
|
||||||
(Ch: [Ch_All]),
|
(Ch: [Ch_All]),
|
||||||
(Ch: [Ch_All]),
|
(Ch: [Ch_All]),
|
||||||
(Ch: [Ch_RWop1, Ch_RWop2]),
|
(Ch: [Ch_RWop1, Ch_RWop2, Ch_NoReadIfEqualRegs]),
|
||||||
(Ch: [Ch_WEAX, Ch_REBX]),
|
(Ch: [Ch_WEAX, Ch_REBX]),
|
||||||
(Ch: [Ch_WEAX, Ch_REBX]),
|
(Ch: [Ch_WEAX, Ch_REBX]),
|
||||||
(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags]),
|
(Ch: [Ch_Mop2, Ch_Rop1, Ch_WFlags, Ch_NoReadIfEqualRegs]),
|
||||||
(Ch: [Ch_All]),
|
(Ch: [Ch_All]),
|
||||||
(Ch: [Ch_All]),
|
(Ch: [Ch_All]),
|
||||||
(Ch: [Ch_All]),
|
(Ch: [Ch_All]),
|
||||||
|
Loading…
Reference in New Issue
Block a user