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* i386: more clean up of TCPUAsmOPtimizer.PeepHoleOptPass1Cpu
git-svn-id: trunk@43465 -
This commit is contained in:
florian
parent
632f13c47a
commit
87b3b089d6
@ -245,324 +245,244 @@ unit aoptcpu;
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Result:=true;
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exit;
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end;
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{ Handle Jmp Optimizations }
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if taicpu(p).is_jmp then
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begin
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{ the following if-block removes all code between a jmp and the next label,
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because it can never be executed }
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if (taicpu(p).opcode = A_JMP) then
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begin
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hp2:=p;
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while GetNextInstruction(hp2, hp1) and
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(hp1.typ <> ait_label) do
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if not(hp1.typ in ([ait_label]+skipinstr)) then
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begin
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{ don't kill start/end of assembler block,
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no-line-info-start/end, cfi end, etc }
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if not(hp1.typ in [ait_align,ait_marker]) and
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((hp1.typ<>ait_cfi) or
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(tai_cfi_base(hp1).cfityp<>cfi_endproc)) then
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begin
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asml.remove(hp1);
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hp1.free;
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end
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else
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hp2:=hp1;
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end
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else break;
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end;
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{ remove jumps to a label coming right after them }
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if GetNextInstruction(p, hp1) then
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begin
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if FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol), hp1) and
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{ TODO: FIXME removing the first instruction fails}
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(p<>blockstart) then
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begin
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hp2:=tai(hp1.next);
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asml.remove(p);
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p.free;
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p:=hp2;
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Result:=true;
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exit;
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end
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case taicpu(p).opcode Of
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A_AND:
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Result:=OptPass1And(p);
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A_CMP:
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begin
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{ cmp register,$8000 neg register
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je target --> jo target
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.... only if register is deallocated before jump.}
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case Taicpu(p).opsize of
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S_B: v:=$80;
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S_W: v:=$8000;
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S_L: v:=aint($80000000);
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else
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begin
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if hp1.typ = ait_label then
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SkipLabels(hp1,hp1);
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if (tai(hp1).typ=ait_instruction) and
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(taicpu(hp1).opcode=A_JMP) and
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GetNextInstruction(hp1, hp2) and
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FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol), hp2) then
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begin
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if taicpu(p).opcode=A_Jcc then
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begin
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taicpu(p).condition:=inverse_cond(taicpu(p).condition);
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tai_label(hp2).labsym.decrefs;
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taicpu(p).oper[0]^.ref^.symbol:=taicpu(hp1).oper[0]^.ref^.symbol;
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{ when free'ing hp1, the ref. isn't decresed, so we don't
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increase it (FK)
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taicpu(p).oper[0]^.ref^.symbol.increfs;
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}
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asml.remove(hp1);
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hp1.free;
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GetFinalDestination(asml, taicpu(p),0);
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end
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else
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begin
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GetFinalDestination(asml, taicpu(p),0);
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p:=tai(p.next);
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Result:=true;
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exit;
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end;
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end
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else
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GetFinalDestination(asml, taicpu(p),0);
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end;
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internalerror(2013112905);
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end;
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end
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else
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{ All other optimizes }
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begin
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case taicpu(p).opcode Of
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A_AND:
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Result:=OptPass1And(p);
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A_CMP:
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if (taicpu(p).oper[0]^.typ=Top_const) and
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(taicpu(p).oper[0]^.val=v) and
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(Taicpu(p).oper[1]^.typ=top_reg) and
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GetNextInstruction(p, hp1) and
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(hp1.typ=ait_instruction) and
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(taicpu(hp1).opcode=A_Jcc) and
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(Taicpu(hp1).condition in [C_E,C_NE]) and
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not(RegInUsedRegs(Taicpu(p).oper[1]^.reg, UsedRegs)) then
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begin
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{ cmp register,$8000 neg register
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je target --> jo target
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.... only if register is deallocated before jump.}
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case Taicpu(p).opsize of
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S_B: v:=$80;
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S_W: v:=$8000;
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S_L: v:=aint($80000000);
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else
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internalerror(2013112905);
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end;
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if (taicpu(p).oper[0]^.typ=Top_const) and
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(taicpu(p).oper[0]^.val=v) and
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(Taicpu(p).oper[1]^.typ=top_reg) and
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GetNextInstruction(p, hp1) and
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(hp1.typ=ait_instruction) and
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(taicpu(hp1).opcode=A_Jcc) and
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(Taicpu(hp1).condition in [C_E,C_NE]) and
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not(RegInUsedRegs(Taicpu(p).oper[1]^.reg, UsedRegs)) then
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begin
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Taicpu(p).opcode:=A_NEG;
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Taicpu(p).loadoper(0,Taicpu(p).oper[1]^);
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Taicpu(p).clearop(1);
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Taicpu(p).ops:=1;
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if Taicpu(hp1).condition=C_E then
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Taicpu(hp1).condition:=C_O
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else
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Taicpu(hp1).condition:=C_NO;
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Result:=true;
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end;
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{
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@@2: @@2:
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.... ....
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cmp operand1,0
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jle/jbe @@1
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dec operand1 --> sub operand1,1
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jmp @@2 jge/jae @@2
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@@1: @@1:
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... ....}
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if (taicpu(p).oper[0]^.typ = top_const) and
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(taicpu(p).oper[1]^.typ in [top_reg,top_ref]) and
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(taicpu(p).oper[0]^.val = 0) and
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GetNextInstruction(p, hp1) and
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(hp1.typ = ait_instruction) and
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(taicpu(hp1).is_jmp) and
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(taicpu(hp1).opcode=A_Jcc) and
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(taicpu(hp1).condition in [C_LE,C_BE]) and
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GetNextInstruction(hp1,hp2) and
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(hp2.typ = ait_instruction) and
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(taicpu(hp2).opcode = A_DEC) and
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OpsEqual(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) and
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GetNextInstruction(hp2, hp3) and
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(hp3.typ = ait_instruction) and
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(taicpu(hp3).is_jmp) and
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(taicpu(hp3).opcode = A_JMP) and
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GetNextInstruction(hp3, hp4) and
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FindLabel(tasmlabel(taicpu(hp1).oper[0]^.ref^.symbol),hp4) then
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begin
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taicpu(hp2).Opcode := A_SUB;
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taicpu(hp2).loadoper(1,taicpu(hp2).oper[0]^);
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taicpu(hp2).loadConst(0,1);
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taicpu(hp2).ops:=2;
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taicpu(hp3).Opcode := A_Jcc;
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case taicpu(hp1).condition of
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C_LE: taicpu(hp3).condition := C_GE;
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C_BE: taicpu(hp3).condition := C_AE;
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else
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internalerror(2019050903);
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end;
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asml.remove(p);
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asml.remove(hp1);
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p.free;
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hp1.free;
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p := hp2;
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Result:=true;
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end
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Taicpu(p).opcode:=A_NEG;
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Taicpu(p).loadoper(0,Taicpu(p).oper[1]^);
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Taicpu(p).clearop(1);
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Taicpu(p).ops:=1;
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if Taicpu(hp1).condition=C_E then
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Taicpu(hp1).condition:=C_O
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else
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Taicpu(hp1).condition:=C_NO;
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Result:=true;
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end;
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A_FLD:
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Result:=OptPass1FLD(p);
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A_FSTP,A_FISTP:
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Result:=OptPass1FSTP(p);
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A_LEA:
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Result:=OptPass1LEA(p);
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A_MOV:
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Result:=OptPass1MOV(p);
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A_MOVSX,
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A_MOVZX :
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Result:=OptPass1Movx(p);
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(* should not be generated anymore by the current code generator
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A_POP:
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{
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@@2: @@2:
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.... ....
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cmp operand1,0
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jle/jbe @@1
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dec operand1 --> sub operand1,1
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jmp @@2 jge/jae @@2
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@@1: @@1:
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... ....}
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if (taicpu(p).oper[0]^.typ = top_const) and
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(taicpu(p).oper[1]^.typ in [top_reg,top_ref]) and
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(taicpu(p).oper[0]^.val = 0) and
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GetNextInstruction(p, hp1) and
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(hp1.typ = ait_instruction) and
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(taicpu(hp1).is_jmp) and
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(taicpu(hp1).opcode=A_Jcc) and
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(taicpu(hp1).condition in [C_LE,C_BE]) and
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GetNextInstruction(hp1,hp2) and
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(hp2.typ = ait_instruction) and
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(taicpu(hp2).opcode = A_DEC) and
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OpsEqual(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) and
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GetNextInstruction(hp2, hp3) and
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(hp3.typ = ait_instruction) and
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(taicpu(hp3).is_jmp) and
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(taicpu(hp3).opcode = A_JMP) and
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GetNextInstruction(hp3, hp4) and
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FindLabel(tasmlabel(taicpu(hp1).oper[0]^.ref^.symbol),hp4) then
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begin
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if target_info.system=system_i386_go32v2 then
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taicpu(hp2).Opcode := A_SUB;
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taicpu(hp2).loadoper(1,taicpu(hp2).oper[0]^);
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taicpu(hp2).loadConst(0,1);
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taicpu(hp2).ops:=2;
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taicpu(hp3).Opcode := A_Jcc;
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case taicpu(hp1).condition of
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C_LE: taicpu(hp3).condition := C_GE;
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C_BE: taicpu(hp3).condition := C_AE;
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else
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internalerror(2019050903);
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end;
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asml.remove(p);
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asml.remove(hp1);
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p.free;
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hp1.free;
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p := hp2;
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Result:=true;
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end
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end;
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A_FLD:
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Result:=OptPass1FLD(p);
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A_FSTP,A_FISTP:
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Result:=OptPass1FSTP(p);
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A_LEA:
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Result:=OptPass1LEA(p);
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A_MOV:
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Result:=OptPass1MOV(p);
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A_MOVSX,
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A_MOVZX :
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Result:=OptPass1Movx(p);
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(* should not be generated anymore by the current code generator
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A_POP:
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begin
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if target_info.system=system_i386_go32v2 then
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begin
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{ Transform a series of pop/pop/pop/push/push/push to }
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{ 'movl x(%esp),%reg' for go32v2 (not for the rest, }
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{ because I'm not sure whether they can cope with }
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{ 'movl x(%esp),%reg' with x > 0, I believe we had }
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{ such a problem when using esp as frame pointer (JM) }
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if (taicpu(p).oper[0]^.typ = top_reg) then
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begin
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{ Transform a series of pop/pop/pop/push/push/push to }
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{ 'movl x(%esp),%reg' for go32v2 (not for the rest, }
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{ because I'm not sure whether they can cope with }
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{ 'movl x(%esp),%reg' with x > 0, I believe we had }
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{ such a problem when using esp as frame pointer (JM) }
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if (taicpu(p).oper[0]^.typ = top_reg) then
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hp1 := p;
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hp2 := p;
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l := 0;
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while getNextInstruction(hp1,hp1) and
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(hp1.typ = ait_instruction) and
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(taicpu(hp1).opcode = A_POP) and
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(taicpu(hp1).oper[0]^.typ = top_reg) do
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begin
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hp1 := p;
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hp2 := p;
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l := 0;
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while getNextInstruction(hp1,hp1) and
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(hp1.typ = ait_instruction) and
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(taicpu(hp1).opcode = A_POP) and
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(taicpu(hp1).oper[0]^.typ = top_reg) do
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hp2 := hp1;
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inc(l,4);
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end;
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getLastInstruction(p,hp3);
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l1 := 0;
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while (hp2 <> hp3) and
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assigned(hp1) and
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(hp1.typ = ait_instruction) and
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(taicpu(hp1).opcode = A_PUSH) and
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(taicpu(hp1).oper[0]^.typ = top_reg) and
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(taicpu(hp1).oper[0]^.reg.enum = taicpu(hp2).oper[0]^.reg.enum) do
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begin
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{ change it to a two op operation }
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taicpu(hp2).oper[1]^.typ:=top_none;
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taicpu(hp2).ops:=2;
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taicpu(hp2).opcode := A_MOV;
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taicpu(hp2).loadoper(1,taicpu(hp1).oper[0]^);
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reference_reset(tmpref);
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tmpRef.base.enum:=R_INTREGISTER;
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tmpRef.base.number:=NR_STACK_POINTER_REG;
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convert_register_to_enum(tmpref.base);
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tmpRef.offset := l;
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taicpu(hp2).loadRef(0,tmpRef);
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hp4 := hp1;
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getNextInstruction(hp1,hp1);
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asml.remove(hp4);
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hp4.free;
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getLastInstruction(hp2,hp2);
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dec(l,4);
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inc(l1);
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end;
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if l <> -4 then
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begin
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inc(l,4);
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for l1 := l1 downto 1 do
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begin
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hp2 := hp1;
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inc(l,4);
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end;
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getLastInstruction(p,hp3);
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l1 := 0;
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while (hp2 <> hp3) and
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assigned(hp1) and
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(hp1.typ = ait_instruction) and
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(taicpu(hp1).opcode = A_PUSH) and
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(taicpu(hp1).oper[0]^.typ = top_reg) and
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(taicpu(hp1).oper[0]^.reg.enum = taicpu(hp2).oper[0]^.reg.enum) do
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begin
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{ change it to a two op operation }
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taicpu(hp2).oper[1]^.typ:=top_none;
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taicpu(hp2).ops:=2;
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taicpu(hp2).opcode := A_MOV;
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taicpu(hp2).loadoper(1,taicpu(hp1).oper[0]^);
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reference_reset(tmpref);
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tmpRef.base.enum:=R_INTREGISTER;
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tmpRef.base.number:=NR_STACK_POINTER_REG;
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convert_register_to_enum(tmpref.base);
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tmpRef.offset := l;
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taicpu(hp2).loadRef(0,tmpRef);
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hp4 := hp1;
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getNextInstruction(hp1,hp1);
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asml.remove(hp4);
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hp4.free;
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getLastInstruction(hp2,hp2);
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dec(l,4);
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inc(l1);
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end;
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if l <> -4 then
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begin
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inc(l,4);
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for l1 := l1 downto 1 do
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begin
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getNextInstruction(hp2,hp2);
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dec(taicpu(hp2).oper[0]^.ref^.offset,l);
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end
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getNextInstruction(hp2,hp2);
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dec(taicpu(hp2).oper[0]^.ref^.offset,l);
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end
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end
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end
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else
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begin
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if (taicpu(p).oper[0]^.typ = top_reg) and
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GetNextInstruction(p, hp1) and
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(tai(hp1).typ=ait_instruction) and
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(taicpu(hp1).opcode=A_PUSH) and
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(taicpu(hp1).oper[0]^.typ = top_reg) and
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(taicpu(hp1).oper[0]^.reg.enum=taicpu(p).oper[0]^.reg.enum) then
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begin
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{ change it to a two op operation }
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taicpu(p).oper[1]^.typ:=top_none;
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taicpu(p).ops:=2;
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taicpu(p).opcode := A_MOV;
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taicpu(p).loadoper(1,taicpu(p).oper[0]^);
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reference_reset(tmpref);
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TmpRef.base.enum := R_ESP;
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taicpu(p).loadRef(0,TmpRef);
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asml.remove(hp1);
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hp1.free;
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end;
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end;
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end;
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*)
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A_PUSH:
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end
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end
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else
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begin
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if (taicpu(p).opsize = S_W) and
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(taicpu(p).oper[0]^.typ = Top_Const) and
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GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_PUSH) and
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(taicpu(hp1).oper[0]^.typ = Top_Const) and
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(taicpu(hp1).opsize = S_W) then
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if (taicpu(p).oper[0]^.typ = top_reg) and
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GetNextInstruction(p, hp1) and
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(tai(hp1).typ=ait_instruction) and
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(taicpu(hp1).opcode=A_PUSH) and
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(taicpu(hp1).oper[0]^.typ = top_reg) and
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(taicpu(hp1).oper[0]^.reg.enum=taicpu(p).oper[0]^.reg.enum) then
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begin
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taicpu(p).changeopsize(S_L);
|
||||
taicpu(p).loadConst(0,taicpu(p).oper[0]^.val shl 16 + word(taicpu(hp1).oper[0]^.val));
|
||||
{ change it to a two op operation }
|
||||
taicpu(p).oper[1]^.typ:=top_none;
|
||||
taicpu(p).ops:=2;
|
||||
taicpu(p).opcode := A_MOV;
|
||||
taicpu(p).loadoper(1,taicpu(p).oper[0]^);
|
||||
reference_reset(tmpref);
|
||||
TmpRef.base.enum := R_ESP;
|
||||
taicpu(p).loadRef(0,TmpRef);
|
||||
asml.remove(hp1);
|
||||
hp1.free;
|
||||
Result:=true;
|
||||
end;
|
||||
end;
|
||||
A_SHL, A_SAL:
|
||||
Result:=OptPass1SHLSAL(p);
|
||||
A_SUB:
|
||||
Result:=OptPass1Sub(p);
|
||||
A_MOVAPD,
|
||||
A_MOVAPS,
|
||||
A_MOVUPD,
|
||||
A_MOVUPS,
|
||||
A_VMOVAPS,
|
||||
A_VMOVAPD,
|
||||
A_VMOVUPS,
|
||||
A_VMOVUPD:
|
||||
Result:=OptPass1_V_MOVAP(p);
|
||||
A_VDIVSD,
|
||||
A_VDIVSS,
|
||||
A_VSUBSD,
|
||||
A_VSUBSS,
|
||||
A_VMULSD,
|
||||
A_VMULSS,
|
||||
A_VADDSD,
|
||||
A_VADDSS,
|
||||
A_VANDPD,
|
||||
A_VANDPS,
|
||||
A_VORPD,
|
||||
A_VORPS,
|
||||
A_VXORPD,
|
||||
A_VXORPS:
|
||||
Result:=OptPass1VOP(p);
|
||||
A_MULSD,
|
||||
A_MULSS,
|
||||
A_ADDSD,
|
||||
A_ADDSS:
|
||||
Result:=OptPass1OP(p);
|
||||
A_VMOVSD,
|
||||
A_VMOVSS,
|
||||
A_MOVSD,
|
||||
A_MOVSS:
|
||||
Result:=OptPass1MOVXX(p);
|
||||
A_SETcc:
|
||||
Result:=OptPass1SETcc(p);
|
||||
else
|
||||
;
|
||||
end;
|
||||
end; { if is_jmp }
|
||||
*)
|
||||
A_PUSH:
|
||||
begin
|
||||
if (taicpu(p).opsize = S_W) and
|
||||
(taicpu(p).oper[0]^.typ = Top_Const) and
|
||||
GetNextInstruction(p, hp1) and
|
||||
(tai(hp1).typ = ait_instruction) and
|
||||
(taicpu(hp1).opcode = A_PUSH) and
|
||||
(taicpu(hp1).oper[0]^.typ = Top_Const) and
|
||||
(taicpu(hp1).opsize = S_W) then
|
||||
begin
|
||||
taicpu(p).changeopsize(S_L);
|
||||
taicpu(p).loadConst(0,taicpu(p).oper[0]^.val shl 16 + word(taicpu(hp1).oper[0]^.val));
|
||||
asml.remove(hp1);
|
||||
hp1.free;
|
||||
Result:=true;
|
||||
end;
|
||||
end;
|
||||
A_SHL, A_SAL:
|
||||
Result:=OptPass1SHLSAL(p);
|
||||
A_SUB:
|
||||
Result:=OptPass1Sub(p);
|
||||
A_MOVAPD,
|
||||
A_MOVAPS,
|
||||
A_MOVUPD,
|
||||
A_MOVUPS,
|
||||
A_VMOVAPS,
|
||||
A_VMOVAPD,
|
||||
A_VMOVUPS,
|
||||
A_VMOVUPD:
|
||||
Result:=OptPass1_V_MOVAP(p);
|
||||
A_VDIVSD,
|
||||
A_VDIVSS,
|
||||
A_VSUBSD,
|
||||
A_VSUBSS,
|
||||
A_VMULSD,
|
||||
A_VMULSS,
|
||||
A_VADDSD,
|
||||
A_VADDSS,
|
||||
A_VANDPD,
|
||||
A_VANDPS,
|
||||
A_VORPD,
|
||||
A_VORPS,
|
||||
A_VXORPD,
|
||||
A_VXORPS:
|
||||
Result:=OptPass1VOP(p);
|
||||
A_MULSD,
|
||||
A_MULSS,
|
||||
A_ADDSD,
|
||||
A_ADDSS:
|
||||
Result:=OptPass1OP(p);
|
||||
A_VMOVSD,
|
||||
A_VMOVSS,
|
||||
A_MOVSD,
|
||||
A_MOVSS:
|
||||
Result:=OptPass1MOVXX(p);
|
||||
A_SETcc:
|
||||
Result:=OptPass1SETcc(p);
|
||||
else
|
||||
;
|
||||
end;
|
||||
end;
|
||||
else
|
||||
;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user