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+ removal of superflouos cld/std instructions
This commit is contained in:
Jonas Maebe
parent
d6e74e2082
commit
8a527432e7
@ -27,6 +27,7 @@
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Type TwoWords = Record
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Word1, Word2: Word
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End;
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Function Reg32(Reg: TRegister): TRegister;
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{Returns the 32 bit component of Reg if it exists, otherwise Reg is returned}
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Begin
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@ -88,14 +89,12 @@ Const MaxCh = 3;
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Type TChange = (C_None,
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C_EAX, C_ECX, C_EDX, C_EBX, C_ESP, C_EBP, C_ESI, C_EDI,
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{ C_AX, C_CX, C_DX, C_BX, C_SP, C_BP, C_SI, C_DI,
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C_AL, C_CL, C_DL, C_BL,
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C_AH, C_CH, C_BH, C_DH,
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C_DEFAULT_SEG, C_CS, C_DS, C_ES, C_FS, C_GS, C_SS,
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} C_Flags, C_FPU,
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C_CDirFlag, C_SDirFlag, C_Flags, C_FPU,
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C_Op1, C_Op2, C_Op3,
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C_MemEDI);
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TFlagContents = (F_Unknown, F_NotSet, F_Set);
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TAsmInstrucProp = Record
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NCh: Byte;
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Ch: Array[1..MaxCh] of TChange;
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@ -103,8 +102,8 @@ Type TChange = (C_None,
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TContent = Record
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StartMod: Pointer; {start and end of block instructions that defines the
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content of this register; If Typ = con_const, then
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Longint(StartMod) = value of the constant)}
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content of this register; If Typ = con_const, then
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Longint(StartMod) = value of the constant)}
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State: Word; {starts at 0, gets increased everytime the register is modified}
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NrOfMods: Byte;
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{ ModReg: TRegister; }{if one register gets a block assigned from an other register,
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@ -121,6 +120,7 @@ Type TChange = (C_None,
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Regs: TRegContent;
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{ FPURegs: TRegFPUContent;} {currently not yet used}
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LineSave: Longint;
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DirFlag: TFlagContents;
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{can this instruction be removed?}
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CanBeRemoved: Boolean;
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End;
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@ -190,7 +190,7 @@ Const AsmInstr: Array[tasmop] Of TAsmInstrucProp = (
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{NONE} (NCh: 0; Ch: (C_None, C_None, C_None)),
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{ENTER} (NCh: 1; Ch: (C_ESP, C_None, C_None)),
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{LEAVE} (NCh: 1; Ch: (C_ESP, C_None, C_None)),
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{CLD} (NCh: 1; Ch: (C_Flags, C_None, C_None)),
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{CLD} (NCh: 1; Ch: (C_CDirFlag, C_None, C_None)),
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{MOVS} (NCh: 3; Ch: (C_ESI, C_EDI, C_MemEDI)),
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{REP} (NCh: 1; Ch: (C_ECX, C_None, C_None)),
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{SHL} (NCh: 2; Ch: (C_Op2, C_Flags, C_None)),
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@ -249,7 +249,7 @@ Const AsmInstr: Array[tasmop] Of TAsmInstrucProp = (
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{PUSHF} (NCh: 1; Ch: (C_ESP, C_None, C_None)),
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{PUSHFD} (NCh: 1; Ch: (C_ESP, C_None, C_None)),
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{STC} (NCh: 1; Ch: (C_Flags, C_None, C_None)),
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{STD} (NCh: 1; Ch: (C_Flags, C_None, C_None)),
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{STD} (NCh: 1; Ch: (C_SDirFlag, C_None, C_None)),
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{STI} (NCh: 1; Ch: (C_Flags, C_None, C_None)),
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{STOS} (NCh: 2; Ch: (C_MemEDI, C_EDI, C_None)),
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{WAIT} (NCh: 0; Ch: (C_None, C_None, C_None)),
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@ -470,52 +470,52 @@ Const AsmInstr: Array[tasmop] Of TAsmInstrucProp = (
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{POPFD} (NCh: 2; Ch: (C_ESP, C_Flags, C_None)),
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{below are the MMX instructions}
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{A_EMMS} (NCh: 1; Ch: (C_FPU, C_None, C_None)),
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{A_MOVD} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_MOVQ} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_MOVD} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_MOVQ} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PACKSSDW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PACKSSWB} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PACKUSWB} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PADDB} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PADDD} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PADDSB} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PADDSW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PADDUSB} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PADDUSW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PADDW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PAND} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PANDN} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PADDB} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PADDD} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PADDSB} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PADDSW} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PADDUSB} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PADDUSW} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PADDW} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PAND} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PANDN} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PCMPEQB} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PCMPEQD} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PCMPEQW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PCMPGTB} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PCMPGTD} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PCMPGTW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PMADDWD} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PMADDWD} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PMULHW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PMULLW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_POR} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSLLD} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSLLQ} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSLLW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSRAD} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSRAW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSRLD} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSRLQ} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSRLW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSUBB} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSUBD} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSUBSB} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSUBSW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSUBUSB} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSUBUSW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PSUBW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_POR} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSLLD} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSLLQ} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSLLW} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSRAD} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSRAW} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSRLD} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSRLQ} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSRLW} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSUBB} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSUBD} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSUBSB} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSUBSW} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSUBUSB} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSUBUSW} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PSUBW} (NCh: 1; Ch: (C_Op2, C_None, C_None)),
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{A_PUNPCKHBW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PUNPCKHDQ} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PUNPCKHWD} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PUNPCKLBW} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PUNPCKLDQ} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PUNPCKLWD} (NCh: 255; Ch: (C_FPU, C_None, C_None)),
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{A_PXOR} (NCh: 255; Ch: (C_FPU, C_None, C_None)));
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{A_PXOR} (NCh: 1; Ch: (C_Op2, C_None, C_None)));
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Var NrOfPaiObjs, NrOfPaiFast: Longint;
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PaiPropBlock: PPaiPropBlock;
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@ -778,6 +778,7 @@ Var Counter: TRegister;
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Begin {initializes/desrtoys all registers}
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For Counter := R_EAX To R_EDI Do
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DestroyReg(p, Counter);
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PPaiProp(p^.line)^.DirFlag := F_Unknown;
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End;
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Procedure Destroy(PaiObj: Pai; opt: Longint; Op: Pointer);
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@ -933,6 +934,9 @@ Begin
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For Cnt := 1 To InstrProp.NCh Do
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Case InstrProp.Ch[Cnt] Of
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C_None:;
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C_EAX..C_EDI: DestroyReg(p, TCh2Reg(InstrProp.Ch[Cnt]));
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C_CDirFlag: PPaiProp(Pai(p)^.line)^.DirFlag := F_NotSet;
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C_SDirFlag: PPaiProp(Pai(p)^.line)^.DirFlag := F_Set;
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C_Op1: Destroy(p, Pai386(p)^.op1t, Pai386(p)^.op1);
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C_Op2: Destroy(p, Pai386(p)^.op2t, Pai386(p)^.op2);
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C_Op3: Destroy(p, Pai386(p)^.op2t, Pointer(Longint(TwoWords(Pai386(p)^.op2).word2)));
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@ -942,7 +946,6 @@ Begin
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TmpRef.Base := R_EDI;
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DestroyRefs(p, TmpRef, R_NO)
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End;
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C_EAX..C_EDI: DestroyReg(p, TCh2Reg(InstrProp.Ch[Cnt]));
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C_Flags, C_FPU:;
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End
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Else
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@ -977,6 +980,9 @@ Begin
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ait_instruction:
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Begin
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Case Pai386(p)^._operator Of
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A_CLD: If Assigned(p^.last) And
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(PPaiProp(Pai(p^.last)^.line)^.DirFlag = F_NotSet) Then
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PPaiProp(Pai(p)^.line)^.CanBeRemoved := True;
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{$IfDef OptimizeMovs}
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A_MOV{, A_MOVZX, A_MOVSX}:
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Begin
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@ -1060,6 +1066,9 @@ Begin
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End;
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End;
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{$EndIf OptimizeMovs}
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A_STD: If Assigned(p^.last) And
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(PPaiProp(Pai(p^.last)^.line)^.DirFlag = F_Set) Then
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PPaiProp(Pai(p)^.line)^.CanBeRemoved := True;
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A_XOR:
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Begin
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If (Pai386(p)^.op1t = top_reg) And
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@ -1169,8 +1178,11 @@ End;
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{
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$Log$
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Revision 1.1 1998-03-25 11:18:12 root
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Initial revision
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Revision 1.2 1998-04-06 22:42:32 jonas
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+ removal of superflouos cld/std instructions
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Revision 1.1.1.1 1998/03/25 11:18:12 root
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* Restored version
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Revision 1.22 1998/03/24 21:48:29 florian
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* just a couple of fixes applied:
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