mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-21 18:09:30 +02:00
+ initial support for arm-freertos largely based on patch by Michael Ring
git-svn-id: trunk@44871 -
This commit is contained in:
florian
parent
0750fdf410
commit
8ac8c79a71
@ -199,7 +199,7 @@ implementation
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(atype<>sec_toc) and
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(atype<>sec_user) and
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{ on embedded systems every byte counts, so smartlink bss too }
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((atype<>sec_bss) or (target_info.system in systems_embedded));
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((atype<>sec_bss) or (target_info.system in (systems_embedded+systems_freertos)));
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end;
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function TGNUAssembler.sectionname(atype:TAsmSectiontype;const aname:string;aorder:TAsmSectionOrder):string;
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@ -442,7 +442,7 @@ unit agarmgas;
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asmbin : 'as';
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asmcmd : '-o $OBJ $EXTRAOPT $ASM';
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supported_targets : [system_arm_linux,system_arm_netbsd,system_arm_wince,system_arm_gba,system_arm_palmos,system_arm_nds,
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system_arm_embedded,system_arm_symbian,system_arm_android,system_arm_aros];
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system_arm_embedded,system_arm_symbian,system_arm_android,system_arm_aros,system_arm_freertos];
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flags : [af_needar,af_smartlink_sections];
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labelprefix : '.L';
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comment : '# ';
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@ -974,7 +974,7 @@ implementation
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supported_targets : [system_arm_embedded,system_arm_darwin,
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system_arm_linux,system_arm_netbsd,
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system_arm_gba,system_arm_nds,
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system_arm_aros];
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system_arm_aros,system_arm_freertos];
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flags : [af_outputbinary,af_smartlink_sections,af_supports_dwarf];
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labelprefix : '.L';
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comment : '';
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@ -347,6 +347,9 @@ Type
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ct_stm32f756xe,
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ct_stm32f756xg,
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ct_stm32g071rb,
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ct_nucleog071rb,
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{ TI - Fury Class - 64 K Flash, 16 K SRAM Devices }
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ct_lm3s1110,
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ct_lm3s1133,
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@ -819,8 +822,8 @@ Const
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(controllertypestr:'STM32F401RD'; controllerunitstr:'STM32F401XX'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00060000; srambase:$20000000; sramsize:$00018000),
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(controllertypestr:'STM32F401VD'; controllerunitstr:'STM32F401XX'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00060000; srambase:$20000000; sramsize:$00018000),
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(controllertypestr:'STM32F401CE'; controllerunitstr:'STM32F401XX'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
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(controllertypestr:'STM32F401RE'; controllerunitstr:'STM32F401XX'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
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(controllertypestr:'NUCLEOF401RE'; controllerunitstr:'STM32F401XX'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
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(controllertypestr:'STM32F401RE'; controllerunitstr:'STM32F401XE'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
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(controllertypestr:'NUCLEOF401RE'; controllerunitstr:'STM32F401XE'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
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(controllertypestr:'STM32F401VE'; controllerunitstr:'STM32F401XX'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
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(controllertypestr:'STM32F407VG'; controllerunitstr:'STM32F407XX'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00100000; srambase:$20000000; sramsize:$00020000),
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(controllertypestr:'DISCOVERYF407VG'; controllerunitstr:'STM32F407XX'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00100000; srambase:$20000000; sramsize:$00020000),
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@ -870,6 +873,9 @@ Const
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(controllertypestr:'STM32F756XE'; controllerunitstr:'STM32F756'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20010000; sramsize:$00040000),
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(controllertypestr:'STM32F756XG'; controllerunitstr:'STM32F756'; cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00100000; srambase:$20010000; sramsize:$00040000),
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(controllertypestr:'STM32G071RB' ; controllerunitstr:'STM32G071XX' ; cputype:cpu_armv6m; fputype:fpu_soft; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00009000),
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(controllertypestr:'NUCLEOG071RB' ; controllerunitstr:'STM32G071XX' ; cputype:cpu_armv6m; fputype:fpu_soft; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00009000),
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(controllertypestr:'LM3S1110'; controllerunitstr:'LM3FURY'; cputype:cpu_armv7m; fputype:fpu_soft; flashbase:$00000000; flashsize:$00010000; srambase:$20000000; sramsize:$00004000),
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(controllertypestr:'LM3S1133'; controllerunitstr:'LM3FURY'; cputype:cpu_armv7m; fputype:fpu_soft; flashbase:$00000000; flashsize:$00010000; srambase:$20000000; sramsize:$00004000),
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(controllertypestr:'LM3S1138'; controllerunitstr:'LM3FURY'; cputype:cpu_armv7m; fputype:fpu_soft; flashbase:$00000000; flashsize:$00010000; srambase:$20000000; sramsize:$00004000),
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@ -68,6 +68,10 @@ implementation
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{$ifndef NOTARGETAROS}
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,t_aros
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{$endif}
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{$ifndef NOTARGETFREERTOS}
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,t_freertos
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{$endif}
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{**************************************
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Assemblers
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@ -3940,7 +3940,7 @@ begin
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end;
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{ Set up default value for the heap }
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if target_info.system in systems_embedded then
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if target_info.system in (systems_embedded+systems_freertos) then
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begin
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case target_info.system of
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{$ifdef AVR}
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@ -3950,6 +3950,11 @@ begin
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else
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heapsize:=128;
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{$endif AVR}
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system_arm_freertos:
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heapsize:=8192;
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system_xtensa_freertos:
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{ keep default value }
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;
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system_arm_embedded:
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heapsize:=256;
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system_mipsel_embedded:
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@ -193,7 +193,8 @@
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system_x86_64_haiku, { 102 }
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system_xtensa_embedded, { 103 }
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system_xtensa_freertos, { 104 }
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system_xtensa_linux { 105 }
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system_xtensa_linux, { 105 }
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system_arm_freertos { 106 }
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);
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type
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@ -305,7 +305,7 @@ interface
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system_xtensa_embedded];
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{ all FreeRTOS systems }
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systems_freertos = [system_xtensa_freertos];
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systems_freertos = [system_xtensa_freertos,system_arm_freertos];
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{ all systems that allow section directive }
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systems_allow_section = systems_embedded;
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@ -718,6 +718,73 @@ unit i_freertos;
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llvmdatalayout : 'e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S32';
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);
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system_arm_freertos_info : tsysteminfo =
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(
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system : system_arm_freertos;
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name : 'FreeRTOS';
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shortname : 'freertos';
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flags : [tf_needs_symbol_size,tf_files_case_sensitive,tf_requires_proper_alignment,
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tf_smartlink_sections,tf_init_final_units_by_calls];
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cpu : cpu_arm;
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unit_env : '';
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extradefines : '';
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exeext : '';
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defext : '.def';
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scriptext : '.sh';
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smartext : '.sl';
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unitext : '.ppu';
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unitlibext : '.ppl';
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asmext : '.s';
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objext : '.o';
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resext : '.res';
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resobjext : '.or';
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sharedlibext : '.so';
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staticlibext : '.a';
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staticlibprefix : 'libp';
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sharedlibprefix : 'lib';
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sharedClibext : '.so';
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staticClibext : '.a';
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staticClibprefix : 'lib';
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sharedClibprefix : 'lib';
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importlibprefix : 'libimp';
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importlibext : '.a';
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Cprefix : '';
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newline : #10;
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dirsep : '/';
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assem : as_gas;
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assemextern : as_gas;
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link : ld_none;
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linkextern : ld_freertos;
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ar : ar_gnu_ar;
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res : res_none;
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dbg : dbg_dwarf2;
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script : script_unix;
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endian : endian_little;
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alignment :
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(
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procalign : 4;
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loopalign : 4;
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jumpalign : 0;
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jumpalignskipmax : 0;
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coalescealign : 0;
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coalescealignskipmax: 0;
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constalignmin : 0;
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constalignmax : 4;
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varalignmin : 0;
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varalignmax : 4;
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localalignmin : 4;
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localalignmax : 16;
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recordalignmin : 0;
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recordalignmax : 4;
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maxCrecordalign : 4
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);
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first_parm_offset : 8;
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stacksize : 65536;
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stackalign : 16;
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abi : abi_default;
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llvmdatalayout : 'e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S32';
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);
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implementation
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initialization
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@ -471,6 +471,9 @@ begin
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ct_stm32f756xe,
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ct_stm32f756xg,
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ct_stm32g071rb,
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ct_nucleog071rb,
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{ TI - 64 K Flash, 16 K SRAM Devices }
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ct_lm3s1110,
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ct_lm3s1133,
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@ -222,479 +222,55 @@ begin
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end;
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{$ifdef ARM}
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case current_settings.controllertype of
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ct_none:
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begin
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end;
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ct_lpc810m021fn8,
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ct_lpc811m001fdh16,
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ct_lpc812m101fdh16,
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ct_lpc812m101fd20,
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ct_lpc812m101fdh20,
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ct_lpc1110fd20,
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ct_lpc1111fdh20_002,
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ct_lpc1111fhn33_101,
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ct_lpc1111fhn33_102,
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ct_lpc1111fhn33_103,
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ct_lpc1111fhn33_201,
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ct_lpc1111fhn33_202,
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ct_lpc1111fhn33_203,
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ct_lpc1112fd20_102,
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ct_lpc1112fdh20_102,
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ct_lpc1112fdh28_102,
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ct_lpc1112fhn33_101,
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ct_lpc1112fhn33_102,
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ct_lpc1112fhn33_103,
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ct_lpc1112fhn33_201,
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ct_lpc1112fhn24_202,
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ct_lpc1112fhn33_202,
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ct_lpc1112fhn33_203,
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ct_lpc1112fhi33_202,
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ct_lpc1112fhi33_203,
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ct_lpc1113fhn33_201,
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ct_lpc1113fhn33_202,
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ct_lpc1113fhn33_203,
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ct_lpc1113fhn33_301,
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ct_lpc1113fhn33_302,
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ct_lpc1113fhn33_303,
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ct_lpc1113bfd48_301,
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ct_lpc1113bfd48_302,
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ct_lpc1113bfd48_303,
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ct_lpc1114fdh28_102,
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ct_lpc1114fn28_102,
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ct_lpc1114fhn33_201,
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ct_lpc1114fhn33_202,
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ct_lpc1114fhn33_203,
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ct_lpc1114fhn33_301,
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ct_lpc1114fhn33_302,
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ct_lpc1114fhn33_303,
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ct_lpc1114fhn33_333,
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ct_lpc1114fhi33_302,
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ct_lpc1114fhi33_303,
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ct_lpc1114bfd48_301,
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ct_lpc1114bfd48_302,
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ct_lpc1114bfd48_303,
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ct_lpc1114bfd48_323,
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ct_lpc1114bfd48_333,
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ct_lpc1115bfd48_303,
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ct_lpc11c12fd48_301,
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ct_lpc11c14fd48_301,
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ct_lpc11c22fd48_301,
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ct_lpc11c24fd48_301,
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ct_lpc11d24fd48_301,
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ct_lpc1224fbd48_101,
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ct_lpc1224fbd48_121,
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ct_lpc1224fbd64_101,
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ct_lpc1224fbd64_121,
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ct_lpc1225fbd48_301,
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ct_lpc1225fbd48_321,
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ct_lpc1225fbd64_301,
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ct_lpc1225fbd64_321,
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ct_lpc1226fbd48_301,
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ct_lpc1226fbd64_301,
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ct_lpc1227fbd48_301,
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ct_lpc1227fbd64_301,
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ct_lpc12d27fbd100_301,
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ct_lpc1311fhn33,
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ct_lpc1311fhn33_01,
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ct_lpc1313fhn33,
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ct_lpc1313fhn33_01,
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ct_lpc1313fbd48,
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ct_lpc1313fbd48_01,
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ct_lpc1315fhn33,
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ct_lpc1315fbd48,
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ct_lpc1316fhn33,
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ct_lpc1316fbd48,
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ct_lpc1317fhn33,
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ct_lpc1317fbd48,
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ct_lpc1317fbd64,
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ct_lpc1342fhn33,
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ct_lpc1342fbd48,
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ct_lpc1343fhn33,
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ct_lpc1343fbd48,
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ct_lpc1345fhn33,
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ct_lpc1345fbd48,
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ct_lpc1346fhn33,
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ct_lpc1346fbd48,
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ct_lpc1347fhn33,
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ct_lpc1347fbd48,
|
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ct_lpc1347fbd64,
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ct_lpc2114,
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ct_lpc2124,
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ct_lpc2194,
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ct_lpc1768,
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ct_at91sam7s256,
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ct_at91sam7se256,
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ct_at91sam7x256,
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ct_at91sam7xc256,
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with embedded_controllers[current_settings.controllertype] do
|
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with linkres do
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begin
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Add('ENTRY(_START)');
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Add('MEMORY');
|
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Add('{');
|
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if flashsize<>0 then
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begin
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LinkStr := ' flash : ORIGIN = 0x' + IntToHex(flashbase,8)
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+ ', LENGTH = 0x' + IntToHex(flashsize,8);
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Add(LinkStr);
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end;
|
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|
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ct_stm32f030c6,
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ct_stm32f030c8,
|
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ct_stm32f030f4,
|
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ct_stm32f030k6,
|
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ct_stm32f030r8,
|
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ct_stm32f050c4,
|
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ct_stm32f050c6,
|
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ct_stm32f050f4,
|
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ct_stm32f050f6,
|
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ct_stm32f050g4,
|
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ct_stm32f050g6,
|
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ct_stm32f050k4,
|
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ct_stm32f050k6,
|
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ct_stm32f051c4,
|
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ct_stm32f051c6,
|
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ct_stm32f051c8,
|
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ct_stm32f051k4,
|
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ct_stm32f051k6,
|
||||
ct_stm32f051k8,
|
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ct_stm32f051r4,
|
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ct_stm32f051r6,
|
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ct_stm32f051r8,
|
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LinkStr := ' ram : ORIGIN = 0x' + IntToHex(srambase,8)
|
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+ ', LENGTH = 0x' + IntToHex(sramsize,8);
|
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Add(LinkStr);
|
||||
|
||||
ct_stm32f091cc,
|
||||
ct_stm32f091cb,
|
||||
ct_stm32f091rc,
|
||||
ct_stm32f091rb,
|
||||
ct_stm32f091vc,
|
||||
ct_stm32f091vb,
|
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Add('}');
|
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Add('_stack_top = 0x' + IntToHex(sramsize+srambase,8) + ';');
|
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Add('SECTIONS');
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Add('{');
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Add(' .text :');
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Add(' {');
|
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Add(' _text_start = .;');
|
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Add(' KEEP(*(.init .init.*))');
|
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Add(' *(.text .text.*)');
|
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Add(' *(.strings)');
|
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Add(' *(.rodata .rodata.*)');
|
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Add(' *(.comment)');
|
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Add(' . = ALIGN(4);');
|
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Add(' _etext = .;');
|
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if flashsize<>0 then
|
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begin
|
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Add(' } >flash');
|
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Add(' .note.gnu.build-id : { *(.note.gnu.build-id) } >flash ');
|
||||
end
|
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else
|
||||
begin
|
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Add(' } >ram');
|
||||
Add(' .note.gnu.build-id : { *(.note.gnu.build-id) } >ram ');
|
||||
end;
|
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|
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ct_stm32f100x4,
|
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ct_stm32f100x6,
|
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ct_stm32f100x8,
|
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ct_stm32f100xB,
|
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ct_stm32f100xC,
|
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ct_stm32f100xD,
|
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ct_stm32f100xE,
|
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ct_stm32f101x4,
|
||||
ct_stm32f101x6,
|
||||
ct_stm32f101x8,
|
||||
ct_stm32f101xB,
|
||||
ct_stm32f101xC,
|
||||
ct_stm32f101xD,
|
||||
ct_stm32f101xE,
|
||||
ct_stm32f101xF,
|
||||
ct_stm32f101xG,
|
||||
ct_stm32f102x4,
|
||||
ct_stm32f102x6,
|
||||
ct_stm32f102x8,
|
||||
ct_stm32f102xB,
|
||||
ct_stm32f103x4,
|
||||
ct_stm32f103x6,
|
||||
ct_stm32f103x8,
|
||||
ct_stm32f103xB,
|
||||
ct_stm32f103xC,
|
||||
ct_stm32f103xD,
|
||||
ct_stm32f103xE,
|
||||
ct_stm32f103xF,
|
||||
ct_stm32f103xG,
|
||||
ct_stm32f107x8,
|
||||
ct_stm32f107xB,
|
||||
ct_stm32f107xC,
|
||||
ct_stm32f105r8,
|
||||
ct_stm32f105rb,
|
||||
ct_stm32f105rc,
|
||||
ct_stm32f105v8,
|
||||
ct_stm32f105vb,
|
||||
ct_stm32f105vc,
|
||||
ct_stm32f107rb,
|
||||
ct_stm32f107rc,
|
||||
ct_stm32f107vb,
|
||||
ct_stm32f107vc,
|
||||
|
||||
ct_stm32f401cb,
|
||||
ct_stm32f401rb,
|
||||
ct_stm32f401vb,
|
||||
ct_stm32f401cc,
|
||||
ct_stm32f401rc,
|
||||
ct_stm32f401vc,
|
||||
ct_discoveryf401vc,
|
||||
ct_stm32f401cd,
|
||||
ct_stm32f401rd,
|
||||
ct_stm32f401vd,
|
||||
ct_stm32f401ce,
|
||||
ct_stm32f401re,
|
||||
ct_nucleof401re,
|
||||
ct_stm32f401ve,
|
||||
ct_stm32f407vg,
|
||||
ct_discoveryf407vg,
|
||||
ct_stm32f407ig,
|
||||
ct_stm32f407zg,
|
||||
ct_stm32f407ve,
|
||||
ct_stm32f407ze,
|
||||
ct_stm32f407ie,
|
||||
ct_stm32f411cc,
|
||||
ct_stm32f411rc,
|
||||
ct_stm32f411vc,
|
||||
ct_stm32f411ce,
|
||||
ct_stm32f411re,
|
||||
ct_nucleof411re,
|
||||
ct_stm32f411ve,
|
||||
ct_discoveryf411ve,
|
||||
ct_stm32f429vg,
|
||||
ct_stm32f429zg,
|
||||
ct_stm32f429ig,
|
||||
ct_stm32f429vi,
|
||||
ct_stm32f429zi,
|
||||
ct_discoveryf429zi,
|
||||
ct_stm32f429ii,
|
||||
ct_stm32f429ve,
|
||||
ct_stm32f429ze,
|
||||
ct_stm32f429ie,
|
||||
ct_stm32f429bg,
|
||||
ct_stm32f429bi,
|
||||
ct_stm32f429be,
|
||||
ct_stm32f429ng,
|
||||
ct_stm32f429ni,
|
||||
ct_stm32f429ne,
|
||||
ct_stm32f446mc,
|
||||
ct_stm32f446rc,
|
||||
ct_stm32f446vc,
|
||||
ct_stm32f446zc,
|
||||
ct_stm32f446me,
|
||||
ct_stm32f446re,
|
||||
ct_nucleof446re,
|
||||
ct_stm32f446ve,
|
||||
ct_stm32f446ze,
|
||||
|
||||
ct_stm32f745xe,
|
||||
ct_stm32f745xg,
|
||||
ct_stm32f746xe,
|
||||
ct_stm32f746xg,
|
||||
ct_stm32f756xe,
|
||||
ct_stm32f756xg,
|
||||
|
||||
{ TI - 64 K Flash, 16 K SRAM Devices }
|
||||
ct_lm3s1110,
|
||||
ct_lm3s1133,
|
||||
ct_lm3s1138,
|
||||
ct_lm3s1150,
|
||||
ct_lm3s1162,
|
||||
ct_lm3s1165,
|
||||
ct_lm3s1166,
|
||||
ct_lm3s2110,
|
||||
ct_lm3s2139,
|
||||
ct_lm3s6100,
|
||||
ct_lm3s6110,
|
||||
|
||||
{ TI 128 K Flash, 32 K SRAM devices - Fury Class }
|
||||
ct_lm3s1601,
|
||||
ct_lm3s1608,
|
||||
ct_lm3s1620,
|
||||
ct_lm3s1635,
|
||||
ct_lm3s1636,
|
||||
ct_lm3s1637,
|
||||
ct_lm3s1651,
|
||||
ct_lm3s2601,
|
||||
ct_lm3s2608,
|
||||
ct_lm3s2620,
|
||||
ct_lm3s2637,
|
||||
ct_lm3s2651,
|
||||
ct_lm3s6610,
|
||||
ct_lm3s6611,
|
||||
ct_lm3s6618,
|
||||
ct_lm3s6633,
|
||||
ct_lm3s6637,
|
||||
ct_lm3s8630,
|
||||
|
||||
{ TI 256 K Flase, 32 K SRAM devices - Fury Class }
|
||||
ct_lm3s1911,
|
||||
ct_lm3s1918,
|
||||
ct_lm3s1937,
|
||||
ct_lm3s1958,
|
||||
ct_lm3s1960,
|
||||
ct_lm3s1968,
|
||||
ct_lm3s1969,
|
||||
ct_lm3s2911,
|
||||
ct_lm3s2918,
|
||||
ct_lm3s2919,
|
||||
ct_lm3s2939,
|
||||
ct_lm3s2948,
|
||||
ct_lm3s2950,
|
||||
ct_lm3s2965,
|
||||
ct_lm3s6911,
|
||||
ct_lm3s6918,
|
||||
ct_lm3s6938,
|
||||
ct_lm3s6950,
|
||||
ct_lm3s6952,
|
||||
ct_lm3s6965,
|
||||
ct_lm3s8930,
|
||||
ct_lm3s8933,
|
||||
ct_lm3s8938,
|
||||
ct_lm3s8962,
|
||||
ct_lm3s8970,
|
||||
ct_lm3s8971,
|
||||
|
||||
{ TI - Tempest Tempest - 256 K Flash, 64 K SRAM }
|
||||
ct_lm3s5951,
|
||||
ct_lm3s5956,
|
||||
ct_lm3s1b21,
|
||||
ct_lm3s2b93,
|
||||
ct_lm3s5b91,
|
||||
ct_lm3s9b81,
|
||||
ct_lm3s9b90,
|
||||
ct_lm3s9b92,
|
||||
ct_lm3s9b95,
|
||||
ct_lm3s9b96,
|
||||
|
||||
ct_lm3s5d51,
|
||||
|
||||
{ TI - Stellaris something }
|
||||
ct_lm4f120h5,
|
||||
|
||||
{ Infineon }
|
||||
ct_xmc4500x1024,
|
||||
ct_xmc4500x768,
|
||||
ct_xmc4502x768,
|
||||
ct_xmc4504x512,
|
||||
|
||||
{ Allwinner }
|
||||
ct_allwinner_a20,
|
||||
|
||||
{ Freescale }
|
||||
ct_mk20dx128vfm5,
|
||||
ct_mk20dx128vft5,
|
||||
ct_mk20dx128vlf5,
|
||||
ct_mk20dx128vlh5,
|
||||
ct_teensy30,
|
||||
ct_mk20dx128vmp5,
|
||||
|
||||
ct_mk20dx32vfm5,
|
||||
ct_mk20dx32vft5,
|
||||
ct_mk20dx32vlf5,
|
||||
ct_mk20dx32vlh5,
|
||||
ct_mk20dx32vmp5,
|
||||
|
||||
ct_mk20dx64vfm5,
|
||||
ct_mk20dx64vft5,
|
||||
ct_mk20dx64vlf5,
|
||||
ct_mk20dx64vlh5,
|
||||
ct_mk20dx64vmp5,
|
||||
|
||||
ct_mk20dx128vlh7,
|
||||
ct_mk20dx128vlk7,
|
||||
ct_mk20dx128vll7,
|
||||
ct_mk20dx128vmc7,
|
||||
|
||||
ct_mk20dx256vlh7,
|
||||
ct_mk20dx256vlk7,
|
||||
ct_mk20dx256vll7,
|
||||
ct_mk20dx256vmc7,
|
||||
ct_teensy31,
|
||||
ct_teensy32,
|
||||
|
||||
ct_mk20dx64vlh7,
|
||||
ct_mk20dx64vlk7,
|
||||
ct_mk20dx64vmc7,
|
||||
|
||||
ct_mk22fn512cap12,
|
||||
ct_mk22fn512cbp12,
|
||||
ct_mk22fn512vdc12,
|
||||
ct_mk22fn512vlh12,
|
||||
ct_mk22fn512vll12,
|
||||
ct_mk22fn512vmp12,
|
||||
ct_freedom_k22f,
|
||||
|
||||
{ Atmel }
|
||||
ct_sam3x8e,
|
||||
ct_arduino_due,
|
||||
ct_flip_n_click,
|
||||
|
||||
{ Nordic Semiconductor }
|
||||
ct_nrf51422_xxaa,
|
||||
ct_nrf51422_xxab,
|
||||
ct_nrf51422_xxac,
|
||||
ct_nrf51822_xxaa,
|
||||
ct_nrf51822_xxab,
|
||||
ct_nrf51822_xxac,
|
||||
ct_nrf52832_xxaa,
|
||||
ct_nrf52840_xxaa,
|
||||
|
||||
ct_sc32442b,
|
||||
|
||||
{ Raspberry Pi 2 }
|
||||
ct_raspi2,
|
||||
|
||||
ct_thumb2bare:
|
||||
begin
|
||||
with embedded_controllers[current_settings.controllertype] do
|
||||
with linkres do
|
||||
begin
|
||||
if (embedded_controllers[current_settings.controllertype].controllerunitstr='MK20D5')
|
||||
or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK20D7')
|
||||
or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK22F51212')
|
||||
or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK64F12') then
|
||||
Add('ENTRY(_LOWLEVELSTART)')
|
||||
else
|
||||
Add('ENTRY(_START)');
|
||||
Add('MEMORY');
|
||||
Add('{');
|
||||
if flashsize<>0 then
|
||||
begin
|
||||
LinkStr := ' flash : ORIGIN = 0x' + IntToHex(flashbase,8)
|
||||
+ ', LENGTH = 0x' + IntToHex(flashsize,8);
|
||||
Add(LinkStr);
|
||||
end;
|
||||
|
||||
LinkStr := ' ram : ORIGIN = 0x' + IntToHex(srambase,8)
|
||||
+ ', LENGTH = 0x' + IntToHex(sramsize,8);
|
||||
Add(LinkStr);
|
||||
|
||||
Add('}');
|
||||
Add('_stack_top = 0x' + IntToHex(sramsize+srambase,8) + ';');
|
||||
|
||||
// Add Checksum Calculation for LPC Controllers so that the bootloader starts the uploaded binary
|
||||
writeln(controllerunitstr);
|
||||
if (controllerunitstr = 'LPC8xx') or (controllerunitstr = 'LPC11XX') or (controllerunitstr = 'LPC122X') then
|
||||
Add('Startup_Checksum = 0 - (_stack_top + _START + 1 + NonMaskableInt_interrupt + 1 + Hardfault_interrupt + 1);');
|
||||
if (controllerunitstr = 'LPC13XX') then
|
||||
Add('Startup_Checksum = 0 - (_stack_top + _START + 1 + NonMaskableInt_interrupt + 1 + MemoryManagement_interrupt + 1 + BusFault_interrupt + 1 + UsageFault_interrupt + 1);');
|
||||
end;
|
||||
end
|
||||
else
|
||||
if not (cs_link_nolink in current_settings.globalswitches) then
|
||||
internalerror(200902011);
|
||||
end;
|
||||
|
||||
with linkres do
|
||||
begin
|
||||
Add('SECTIONS');
|
||||
Add('{');
|
||||
Add(' .text :');
|
||||
Add(' {');
|
||||
Add(' _text_start = .;');
|
||||
Add(' KEEP(*(.init .init.*))');
|
||||
if (embedded_controllers[current_settings.controllertype].controllerunitstr='MK20D5')
|
||||
or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK20D7')
|
||||
or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK22F51212')
|
||||
or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK64F12') then
|
||||
begin
|
||||
Add(' . = 0x400;');
|
||||
Add(' KEEP(*(.flash_config *.flash_config.*))');
|
||||
end;
|
||||
Add(' *(.text .text.*)');
|
||||
Add(' *(.strings)');
|
||||
Add(' *(.rodata .rodata.*)');
|
||||
Add(' *(.comment)');
|
||||
Add(' . = ALIGN(4);');
|
||||
Add(' _etext = .;');
|
||||
if embedded_controllers[current_settings.controllertype].flashsize<>0 then
|
||||
begin
|
||||
Add(' } >flash');
|
||||
Add(' .note.gnu.build-id : { *(.note.gnu.build-id) } >flash ');
|
||||
end
|
||||
else
|
||||
begin
|
||||
Add(' } >ram');
|
||||
Add(' .note.gnu.build-id : { *(.note.gnu.build-id) } >ram ');
|
||||
end;
|
||||
|
||||
Add(' .data :');
|
||||
Add(' {');
|
||||
Add(' _data = .;');
|
||||
Add(' *(.data .data.*)');
|
||||
Add(' KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
|
||||
Add(' _edata = .;');
|
||||
if embedded_controllers[current_settings.controllertype].flashsize<>0 then
|
||||
Add(' .data :');
|
||||
Add(' {');
|
||||
Add(' _data = .;');
|
||||
Add(' *(.data .data.*)');
|
||||
Add(' KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
|
||||
Add(' _edata = .;');
|
||||
if flashsize<>0 then
|
||||
begin
|
||||
Add(' } >ram AT >flash');
|
||||
end
|
||||
@ -708,8 +284,8 @@ begin
|
||||
Add(' *(.bss .bss.*)');
|
||||
Add(' *(COMMON)');
|
||||
Add(' } >ram');
|
||||
Add('. = ALIGN(4);');
|
||||
Add('_bss_end = . ;');
|
||||
Add(' . = ALIGN(4);');
|
||||
Add(' _bss_end = . ;');
|
||||
Add('}');
|
||||
Add('_end = .;');
|
||||
end;
|
||||
@ -1804,8 +1380,8 @@ function TlinkerFreeRTOS.postprocessexecutable(const fn : string;isdll:boolean):
|
||||
|
||||
initialization
|
||||
{$ifdef arm}
|
||||
RegisterLinker(ld_freertos,TLinkerEmbedded);
|
||||
RegisterTarget(system_arm_embedded_info);
|
||||
RegisterLinker(ld_freertos,TlinkerFreeRTOS);
|
||||
RegisterTarget(system_arm_freertos_info);
|
||||
{$endif arm}
|
||||
|
||||
{$ifdef avr}
|
||||
|
||||
@ -223,7 +223,8 @@ const
|
||||
{ 102 } 'Haiku-x86-64',
|
||||
{ 103 } 'Embedded-Xtensa',
|
||||
{ 104 } 'FreeRTos-Xtensa',
|
||||
{ 105 } 'Linux-Xtensa'
|
||||
{ 105 } 'Linux-Xtensa',
|
||||
{ 106 } 'FreeRTos-arm'
|
||||
);
|
||||
|
||||
const
|
||||
|
||||
@ -73,11 +73,11 @@ CPU_SPECIFIC_COMMON_UNITS=
|
||||
ifeq ($(ARCH),arm)
|
||||
CPU_SPECIFIC_COMMON_UNITS=sysutils math classes fgl macpas typinfo types rtlconsts getopts lineinfo
|
||||
ifeq ($(SUBARCH),armv7m)
|
||||
CPU_UNITS=lm3fury lm3tempest stm32f10x_ld stm32f10x_md stm32f10x_hd stm32f10x_xl stm32f10x_conn stm32f10x_cl lpc13xx lpc1768 lm4f120 sam3x8e xmc4500 cortexm3 cortexm4 # thumb2_bare
|
||||
CPU_UNITS=stm32f103xe cortexm3 cortexm4 # thumb2_bare
|
||||
CPU_UNITS_DEFINED=1
|
||||
endif
|
||||
ifeq ($(SUBARCH),armv7em)
|
||||
CPU_UNITS=lm4f120 xmc4500 mk20d5 mk20d7 mk22f51212 mk64f12 stm32f401xx stm32f407xx stm32f411xe stm32f429xx stm32f446xx stm32f745 stm32f746 stm32f756 nrf52 cortexm3 cortexm4 cortexm7 # thumb2_bare
|
||||
CPU_UNITS=stm32f401xe cortexm3 cortexm4 cortexm7 # thumb2_bare
|
||||
CPU_UNITS_DEFINED=1
|
||||
endif
|
||||
ifeq ($(SUBARCH),armv4t)
|
||||
@ -89,7 +89,7 @@ CPU_UNITS=lpc21x4 at91sam7x256 sc32442b
|
||||
CPU_UNITS_DEFINED=1
|
||||
endif
|
||||
ifeq ($(SUBARCH),armv6m)
|
||||
CPU_UNITS=lpc8xx lpc11xx lpc122x stm32f0xx nrf51 cortexm0
|
||||
CPU_UNITS=stm32g071xx cortexm0
|
||||
CPU_UNITS_DEFINED=1
|
||||
endif
|
||||
ifeq ($(SUBARCH),armv7a)
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -302,6 +302,13 @@ endif
|
||||
override FPCOPT+=-Cp$(SUBARCH)
|
||||
endif
|
||||
|
||||
ifeq ($(FULL_TARGET),arm-freertos)
|
||||
ifeq ($(SUBARCH),)
|
||||
$(error When compiling for arm-freertos, a sub-architecture (e.g. SUBARCH=armv6m or SUBARCH=armv7em) must be defined)
|
||||
endif
|
||||
override FPCOPT+=-Cp$(SUBARCH)
|
||||
endif
|
||||
|
||||
# Full name of the target, including CPU and OS. For OSs limited
|
||||
# to 8.3 we only use the target OS
|
||||
ifneq ($(findstring $(OS_SOURCE),$(LIMIT83fs)),)
|
||||
|
||||
@ -155,7 +155,7 @@ interface
|
||||
{dragonfly} ( false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
|
||||
{ win16 } ( false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true , false, false, false, false, false, false),
|
||||
{ wasm } ( false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false),
|
||||
{ freertos }( false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true )
|
||||
{ freertos }( false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true )
|
||||
);
|
||||
|
||||
type
|
||||
|
||||
@ -1 +1 @@
|
||||
'2020-04-19 hash 9219aaf4db'
|
||||
'0 rev 0'
|
||||
|
||||
Loading…
Reference in New Issue
Block a user