* fixed some spilling stuff

+ not(<int64>) implemented
  + small set comparisations implemented
This commit is contained in:
florian 2004-01-24 20:19:46 +00:00
parent 9e00ecb080
commit 8d335b9466
3 changed files with 64 additions and 17 deletions

View File

@ -75,6 +75,7 @@ uses
function spilling_create_load(const ref:treference;r:tregister): tai;override;
function spilling_create_store(r:tregister; const ref:treference): tai;override;
function spilling_get_operation_type(opnr: longint): topertype;override;
end;
tai_align = class(tai_align_abstract)
{ nothing to add }
@ -322,6 +323,15 @@ implementation
end;
function taicpu.spilling_get_operation_type(opnr: longint): topertype;
begin
if opnr = 0 then
result := operand_write
else
result:=operand_read;
end;
procedure InitAsm;
begin
end;
@ -414,11 +424,15 @@ implementation
curdata.free;
end;
end.
{
$Log$
Revision 1.23 2004-01-23 15:12:49 florian
Revision 1.24 2004-01-24 20:19:46 florian
* fixed some spilling stuff
+ not(<int64>) implemented
+ small set comparisations implemented
Revision 1.23 2004/01/23 15:12:49 florian
* fixed generic shl/shr operations
+ added register allocation hook calls for arm specific operand types:
register set and shifter op

View File

@ -1120,6 +1120,11 @@ unit cgcpu;
list.concat(setoppostfix(taicpu.op_reg_reg_const(A_RSB,regdst.reglo,regsrc.reglo,0),PF_S));
list.concat(taicpu.op_reg_reg_const(A_RSC,regdst.reghi,regsrc.reghi,0));
end;
OP_NOT:
begin
cg.a_op_reg_reg(list,OP_NOT,OS_INT,regsrc.reglo,regdst.reglo);
cg.a_op_reg_reg(list,OP_NOT,OS_INT,regsrc.reghi,regdst.reghi);
end;
else
a_op64_reg_reg_reg(list,op,regsrc,regdst,regdst);
end;
@ -1223,7 +1228,12 @@ begin
end.
{
$Log$
Revision 1.38 2004-01-24 01:33:20 florian
Revision 1.39 2004-01-24 20:19:46 florian
* fixed some spilling stuff
+ not(<int64>) implemented
+ small set comparisations implemented
Revision 1.38 2004/01/24 01:33:20 florian
* fixref fixed if index, base and offset were given
Revision 1.37 2004/01/22 20:13:18 florian

View File

@ -205,25 +205,43 @@ interface
procedure tarmaddnode.second_cmpsmallset;
var
zeroreg : tregister;
tmpreg : tregister;
begin
{!!!!!!!
pass_left_right;
force_reg_left_right(true,true);
zeroreg.enum:=R_INTREGISTER;
zeroreg.number:=NR_G0;
if right.location.loc = LOC_CONSTANT then
tcgsparc(cg).handle_reg_const_reg(exprasmlist,A_SUBcc,left.location.register,right.location.value,zeroreg)
else
exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUBcc,left.location.register,right.location.register,zeroreg));
location_reset(location,LOC_FLAGS,OS_NO);
location.resflags:=getresflags(true);
force_reg_left_right(false,false);
case nodetype of
equaln:
begin
exprasmlist.concat(taicpu.op_reg_reg(A_CMP,left.location.register,right.location.register));
location.resflags:=F_EQ;
end;
unequaln:
begin
exprasmlist.concat(taicpu.op_reg_reg(A_CMP,left.location.register,right.location.register));
location.resflags:=F_NE;
end;
lten,
gten:
begin
if (not(nf_swaped in flags) and
(nodetype = lten)) or
((nf_swaped in flags) and
(nodetype = gten)) then
swapleftright;
tmpreg:=cg.getintregister(exprasmlist,location.size);
exprasmlist.concat(taicpu.op_reg_reg_reg(A_AND,tmpreg,left.location.register,right.location.register));
exprasmlist.concat(taicpu.op_reg_reg(A_CMP,tmpreg,right.location.register));
cg.ungetregister(exprasmlist,tmpreg);
location.resflags:=F_EQ;
end;
else
internalerror(2004012401);
end;
release_reg_left_right;
}
end;
@ -314,7 +332,12 @@ begin
end.
{
$Log$
Revision 1.9 2004-01-24 18:12:40 florian
Revision 1.10 2004-01-24 20:19:46 florian
* fixed some spilling stuff
+ not(<int64>) implemented
+ small set comparisations implemented
Revision 1.9 2004/01/24 18:12:40 florian
* fixed several arm floating point issues
Revision 1.8 2004/01/23 00:01:48 florian