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* m68k: do not generate unnecessary unaligned load sequences for byte loads into registers, this fixes tcnvint1 test on plain 68000

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This commit is contained in:
Karoly Balogh 2022-02-08 01:26:13 +01:00
parent c42b8c43bd
commit 8f083f6342
1 changed files with 7 additions and 6 deletions
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13
compiler/m68k/cgcpu.pas
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@ -930,7 +930,13 @@ unit cgcpu;
opsize: topsize;
needsext: boolean;
begin
if needs_unaligned(ref.alignment,fromsize) then
needsext:=tcgsize2size[fromsize]<tcgsize2size[tosize];
if needsext then
size:=fromsize
else
size:=tosize;
if needs_unaligned(ref.alignment,size) then
begin
//list.concat(tai_comment.create(strpnew('a_load_ref_reg calling unaligned')));
a_load_ref_reg_unaligned(list,fromsize,tosize,ref,register);
@ -940,11 +946,6 @@ unit cgcpu;
href:=ref;
fixref(list,href,false);
needsext:=tcgsize2size[fromsize]<tcgsize2size[tosize];
if needsext then
size:=fromsize
else
size:=tosize;
opsize:=TCGSize2OpSize[size];
if isaddressregister(register) and not (opsize in [S_L]) then
hreg:=getintregister(list,OS_ADDR)