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+ optimization of sequential ands

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git-svn-id: trunk@12806 -
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florian 2009-02-27 12:59:08 +00:00
parent 20db8dc978
commit 91dcb722a2
1 changed files with 30 additions and 0 deletions
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30
compiler/arm/aoptcpu.pas
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@ -74,6 +74,7 @@ Implementation
getnextinstruction(p,next1) and
(next1.typ = ait_instruction) and
(taicpu(next1).opcode = A_MOV) and
(taicpu(p).condition=taicpu(next1).condition) and
(taicpu(next1).ops=3) and
(taicpu(next1).oper[0]^.typ = top_reg) and
(taicpu(p).oper[0]^.reg=taicpu(next1).oper[0]^.reg) and
@ -107,6 +108,35 @@ Implementation
result := true;
end;
end;
A_AND:
begin
{
change
and reg2,reg1,const1
and reg2,reg2,const2
to
and reg2,reg1,(const1 and const2)
}
if (taicpu(p).oper[0]^.typ = top_reg) and
(taicpu(p).oper[1]^.typ = top_reg) and
(taicpu(p).oper[2]^.typ = top_const) and
GetNextInstruction(p, hp1) and
(tai(hp1).typ = ait_instruction) and
(taicpu(hp1).opcode = A_AND) and
(taicpu(p).condition=taicpu(hp1).condition) and
(taicpu(p).oppostfix=PF_None) and
(taicpu(hp1).oper[0]^.typ = top_reg) and
(taicpu(hp1).oper[1]^.typ = top_reg) and
(taicpu(hp1).oper[2]^.typ = top_const) and
(taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
(taicpu(hp1).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) then
begin
taicpu(p).loadConst(2,taicpu(p).oper[2]^.val and taicpu(hp1).oper[2]^.val);
taicpu(p).oppostfix:=taicpu(hp1).oppostfix;
asml.remove(hp1);
hp1.free;
end;
end;
end;
end;
end;