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https://gitlab.com/freepascal.org/fpc/source.git
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* fixed generic in operator code
+ added debug code to check if all scratch registers are released
This commit is contained in:
parent
253df05727
commit
92a29d7e82
@ -410,7 +410,7 @@ implementation
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cg.free_scratch_reg(exprasmlist,pleftreg);
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cg.free_scratch_reg(exprasmlist,pleftreg);
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{$endif}
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{$endif}
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LOC_REGISTER :
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LOC_REGISTER :
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rg.ungetregister(exprasmlist,pleftreg);
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rg.ungetregisterint(exprasmlist,pleftreg);
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else
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else
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begin
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begin
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reference_release(exprasmlist,left.location.reference);
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reference_release(exprasmlist,left.location.reference);
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@ -436,35 +436,36 @@ implementation
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begin
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begin
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{ clear the register value, indicating result is FALSE }
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{ clear the register value, indicating result is FALSE }
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cg.a_load_const_reg(exprasmlist,OS_INT,0,location.register);
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cg.a_load_const_reg(exprasmlist,OS_INT,0,location.register);
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{$ifdef newra}
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hr:=rg.getregisterint(exprasmlist,OS_INT);
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{$else}
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hr:=cg.get_scratch_reg_int(exprasmlist,OS_INT);
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{$endif}
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case right.location.loc of
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case right.location.loc of
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LOC_REGISTER,
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LOC_REGISTER:
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hr:=right.location.register;
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LOC_CREGISTER:
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LOC_CREGISTER:
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begin
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begin
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hr:=rg.getregisterint(exprasmlist,OS_INT);
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{ load set value into register }
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{ load set value into register }
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cg.a_load_reg_reg(exprasmlist,OS_32,OS_32,
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cg.a_load_reg_reg(exprasmlist,OS_32,OS_32,
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right.location.register,hr);
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right.location.register,hr);
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location_release(exprasmlist,right.location);
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end;
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end;
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LOC_REFERENCE,
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LOC_REFERENCE,
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LOC_CREFERENCE :
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LOC_CREFERENCE :
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begin
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begin
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hr:=rg.getregisterint(exprasmlist,OS_INT);
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{ load set value into register }
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{ load set value into register }
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cg.a_load_ref_reg(exprasmlist,OS_32,
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cg.a_load_ref_reg(exprasmlist,OS_32,
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right.location.reference,hr);
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right.location.reference,hr);
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location_release(exprasmlist,right.location);
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end;
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end;
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else
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else
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internalerror(200203312);
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internalerror(200203312);
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end;
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end;
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location_release(exprasmlist,right.location);
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{ then do SHR tge register }
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{ then SHR the register }
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cg.a_op_const_reg(exprasmlist,OP_SHR,
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cg.a_op_const_reg(exprasmlist,OP_SHR,
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tordconstnode(left).value and 31,hr);
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tordconstnode(left).value and 31,hr);
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{ then extract the lowest bit }
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{ then extract the lowest bit }
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cg.a_op_const_reg(exprasmlist,OP_AND,1,hr);
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cg.a_op_const_reg(exprasmlist,OP_AND,1,hr);
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location.register:=hr;
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end
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end
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else
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else
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begin
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begin
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@ -524,13 +525,13 @@ implementation
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case right.location.loc of
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case right.location.loc of
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LOC_REGISTER,
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LOC_REGISTER,
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LOC_CREGISTER :
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LOC_CREGISTER :
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rg.ungetregisterint(exprasmlist,right.location.register);
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rg.ungetregisterint(exprasmlist,right.location.register);
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LOC_CONSTANT ,
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LOC_CONSTANT ,
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LOC_CREFERENCE,
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LOC_CREFERENCE,
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LOC_REFERENCE :
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LOC_REFERENCE :
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rg.ungetregisterint(exprasmlist,hr2);
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rg.ungetregisterint(exprasmlist,hr2);
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else
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else
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internalerror(2002032210);
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internalerror(2002032210);
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end;
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end;
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{ free bitnumber register }
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{ free bitnumber register }
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{$ifdef newra}
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{$ifdef newra}
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@ -615,7 +616,8 @@ implementation
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cg.a_param_ref(exprasmlist,OS_ADDR,right.location.reference,paramanager.getintparaloc(1));
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cg.a_param_ref(exprasmlist,OS_ADDR,right.location.reference,paramanager.getintparaloc(1));
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cg.a_call_name(exprasmlist,'FPC_SET_IN_BYTE');
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cg.a_call_name(exprasmlist,'FPC_SET_IN_BYTE');
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{ result of value is always one full register }
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{ result of value is always one full register }
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r.enum:=accumulator;
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r.enum:=R_INTREGISTER;
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r.number:=NR_ACCUMULATOR;
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cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,r,location.register);
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cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,r,location.register);
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{ release the allocated register }
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{ release the allocated register }
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if not (left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
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if not (left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
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@ -1112,7 +1114,11 @@ begin
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end.
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end.
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{
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{
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$Log$
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$Log$
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Revision 1.27 2003-04-22 10:09:35 daniel
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Revision 1.28 2003-04-22 12:45:58 florian
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* fixed generic in operator code
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+ added debug code to check if all scratch registers are released
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Revision 1.27 2003/04/22 10:09:35 daniel
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+ Implemented the actual register allocator
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+ Implemented the actual register allocator
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+ Scratch registers unavailable when new register allocator used
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+ Scratch registers unavailable when new register allocator used
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+ maybe_save/maybe_restore unavailable when new register allocator used
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+ maybe_save/maybe_restore unavailable when new register allocator used
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@ -54,7 +54,11 @@ implementation
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cclasses,globals,
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cclasses,globals,
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symconst,symbase,symtype,symsym,paramgr,
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symconst,symbase,symtype,symsym,paramgr,
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aasmbase,aasmtai,
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aasmbase,aasmtai,
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pass_1,cpubase,cgbase,regvars,nflw,rgobj;
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pass_1,cpubase,cgbase,
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{$ifdef EXTDEBUG}
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cgobj,
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{$endif EXTDEBUG}
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regvars,nflw,rgobj;
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{*****************************************************************************
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{*****************************************************************************
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SecondPass
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SecondPass
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@ -166,6 +170,7 @@ implementation
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{$endif TEMPREGDEBUG}
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{$endif TEMPREGDEBUG}
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{$ifdef EXTDEBUG}
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{$ifdef EXTDEBUG}
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oldloc : tloc;
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oldloc : tloc;
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i : longint;
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{$endif EXTDEBUG}
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{$endif EXTDEBUG}
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begin
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begin
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if not assigned(p) then
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if not assigned(p) then
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@ -198,6 +203,14 @@ implementation
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(oldloc<>LOC_INVALID) and
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(oldloc<>LOC_INVALID) and
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(p.location.loc=LOC_INVALID) then
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(p.location.loc=LOC_INVALID) then
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Comment(V_Fatal,'Location not set in secondpass: '+nodetype2str[p.nodetype]);
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Comment(V_Fatal,'Location not set in secondpass: '+nodetype2str[p.nodetype]);
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{ check if all scratch registers are freed }
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for i:=1 to max_scratch_regs do
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if not(scratch_regs[i] in cg.unusedscratchregisters) then
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begin
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writenode(p);
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internalerror(2003042201);
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end;
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{$endif EXTDEBUG}
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{$endif EXTDEBUG}
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if codegenerror then
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if codegenerror then
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include(p.flags,nf_error);
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include(p.flags,nf_error);
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@ -332,7 +345,11 @@ implementation
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end.
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end.
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{
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{
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$Log$
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$Log$
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Revision 1.43 2003-01-09 20:40:59 daniel
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Revision 1.44 2003-04-22 12:45:58 florian
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* fixed generic in operator code
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+ added debug code to check if all scratch registers are released
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Revision 1.43 2003/01/09 20:40:59 daniel
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* Converted some code in cgx86.pas to new register numbering
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* Converted some code in cgx86.pas to new register numbering
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Revision 1.42 2003/01/09 15:49:56 daniel
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Revision 1.42 2003/01/09 15:49:56 daniel
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