+ translate register variable locations, enables register variable debug info, with SSA it requires to be extended maintaining location list

git-svn-id: trunk@2409 -
This commit is contained in:
florian 2006-02-02 21:27:23 +00:00
parent 4662a12fd5
commit 94038b0d83
4 changed files with 43 additions and 16 deletions

View File

@ -100,6 +100,7 @@ unit cgobj;
procedure allocallcpuregisters(list:Taasmoutput);virtual;
procedure deallocallcpuregisters(list:Taasmoutput);virtual;
procedure do_register_allocation(list:Taasmoutput;headertai:tai);virtual;
procedure translate_register(var reg : tregister);
function makeregsize(list:Taasmoutput;reg:Tregister;size:Tcgsize):Tregister;
@ -723,6 +724,12 @@ implementation
end;
procedure tcg.translate_register(var reg : tregister);
begin
rg[getregtype(reg)].translate_register(reg);
end;
procedure tcg.a_reg_alloc(list : taasmoutput;r : tregister);
begin
list.concat(tai_regalloc.alloc(r,nil));

View File

@ -1299,21 +1299,6 @@ implementation
{$endif cpu64bit}
cg.a_reg_sync(list,sym.localloc.register);
end;
if cs_asm_source in aktglobalswitches then
begin
case sym.localloc.loc of
LOC_REGISTER,
LOC_CREGISTER :
begin
if (cs_no_regalloc in aktglobalswitches) then
list.concat(Tai_comment.Create(strpnew('Var '+sym.realname+' located in register '+
std_regname(sym.localloc.register))))
else
list.concat(Tai_comment.Create(strpnew('Var '+sym.realname+' located in register')));
end;
end
end;
end;

View File

@ -607,6 +607,20 @@ implementation
end;
procedure translate_registers(p : tnamedindexitem;list:pointer);
begin
if (tsym(p).typ in [localvarsym,paravarsym,globalvarsym]) and
(tabstractnormalvarsym(p).localloc.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_MMREGISTER,
LOC_CMMREGISTER,LOC_FPUREGISTER,LOC_CFPUREGISTER]) then
begin
cg.translate_register(tabstractnormalvarsym(p).localloc.register);
if cs_asm_source in aktglobalswitches then
taasmoutput(list).concat(Tai_comment.Create(strpnew('Var '+tabstractnormalvarsym(p).realname+' located in register '+
std_regname(tabstractnormalvarsym(p).localloc.register))))
end;
end;
procedure check_for_stack(p : tnamedindexitem;arg:pointer);
begin
if tsym(p).typ=paravarsym then
@ -893,6 +907,13 @@ implementation
allocate the registers }
cg.do_register_allocation(aktproccode,headertai);
{ translate imag. register to their real counter parts
this is necessary for debuginfo and verbose assembler output
when SSA will be implented, this will be more complicated because we've to
maintain location lists }
current_procinfo.procdef.parast.foreach_static(@translate_registers,templist);
current_procinfo.procdef.localst.foreach_static(@translate_registers,templist);
{ Add save and restore of used registers }
aktfilepos:=entrypos;
gen_save_used_regs(templist);

View File

@ -150,6 +150,8 @@ unit rgobj;
{ Adds an interference edge.
don't move this to the protected section, the arm cg requires to access this (FK) }
procedure add_edge(u,v:Tsuperregister);
{ translates a single given imaginary register to it's real register }
procedure translate_register(var reg : tregister);
protected
regtype : Tregistertype;
{ default subregister used }
@ -209,6 +211,7 @@ unit rgobj;
procedure insert_regalloc_info(list:Taasmoutput;u:tsuperregister);
procedure insert_regalloc_info_all(list:Taasmoutput);
procedure generate_interference_graph(list:Taasmoutput;headertai:tai);
{ translates the registers in the given assembler list }
procedure translate_registers(list:Taasmoutput);
function spill_registers(list:Taasmoutput;headertai:tai):boolean;virtual;
function getnewreg(subreg:tsubregister):tsuperregister;
@ -557,7 +560,9 @@ unit rgobj;
until endspill;
ibitmap.free;
translate_registers(list);
dispose_reginfo;
{ we need the translation table for debugging info and verbose assembler output (FK)
dispose_reginfo;
}
end;
@ -1565,6 +1570,15 @@ unit rgobj;
end;
procedure trgobj.translate_register(var reg : tregister);
begin
if (getregtype(reg)=regtype) then
setsupreg(reg,reginfo[getsupreg(reg)].colour)
else
internalerror(200602021);
end;
procedure Trgobj.translate_registers(list:taasmoutput);
var
hp,p,q:Tai;