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* optimized mul code generation

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florian 2004-03-14 21:42:24 +00:00
parent 26b49014ae
commit 9594866b30
1 changed files with 9 additions and 1 deletions
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compiler/arm/cgcpu.pas
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@ -299,6 +299,7 @@ unit cgcpu;
shift : byte; shift : byte;
tmpreg : tregister; tmpreg : tregister;
so : tshifterop; so : tshifterop;
l1 : longint;
begin begin
if is_shifter_const(dword(-a),shift) then if is_shifter_const(dword(-a),shift) then
case op of case op of
@ -373,6 +374,10 @@ unit cgcpu;
a_load_const_reg(list,size,0,dst) a_load_const_reg(list,size,0,dst)
else if (op in [OP_IMUL]) and (a=-1) then else if (op in [OP_IMUL]) and (a=-1) then
a_op_reg_reg(list,OP_NEG,size,src,dst) a_op_reg_reg(list,OP_NEG,size,src,dst)
{ we do this here instead in the peephole optimizer because
it saves us a register }
else if (op in [OP_MUL,OP_IMUL]) and ispowerof2(a,l1) then
a_op_const_reg_reg(list,OP_SHL,size,l1,src,dst)
else else
begin begin
tmpreg:=getintregister(list,size); tmpreg:=getintregister(list,size);
@ -1283,7 +1288,10 @@ begin
end. end.
{ {
$Log$ $Log$
Revision 1.48 2004-03-14 16:15:40 florian Revision 1.49 2004-03-14 21:42:24 florian
* optimized mul code generation
Revision 1.48 2004/03/14 16:15:40 florian
* spilling problem fixed * spilling problem fixed
* handling of floating point memory references fixed * handling of floating point memory references fixed