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* taicpu_abstract.oper[] changed to pointers
This commit is contained in:
peter
parent
a57d25b3ed
commit
96f9973b46
@ -158,7 +158,7 @@ interface
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{ local varsym that will be inserted in pass_2 }
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top_local : (localsym:pointer;localsymderef:tderef;localsymofs:longint);
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end;
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poper=^toper;
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{ ait_* types which don't result in executable code or which don't influence }
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{ the way the program runs/behaves, but which may be encountered by the }
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@ -440,8 +440,10 @@ interface
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condition : TAsmCond;
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{ Number of operands to instruction }
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ops : byte;
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{ Number of allocate oper structures }
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opercnt : byte;
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{ Operands of instruction }
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oper : array[0..max_operands-1] of toper;
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oper : array[0..max_operands-1] of poper;
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{ Actual opcode of instruction }
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opcode : tasmop;
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{$ifdef x86}
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@ -456,6 +458,7 @@ interface
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procedure ppuwrite(ppufile:tcompilerppufile);override;
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procedure derefimpl;override;
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procedure SetCondition(const c:TAsmCond);
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procedure allocate_oper(opers:longint);
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procedure loadconst(opidx:longint;l:aword);
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procedure loadsymbol(opidx:longint;s:tasmsymbol;sofs:longint);
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procedure loadlocal(opidx:longint;s:pointer;sofs:longint);
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@ -1511,19 +1514,24 @@ implementation
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destructor taicpu_abstract.Destroy;
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var
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i : longint;
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i : integer;
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begin
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for i:=0 to ops-1 do
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case oper[i].typ of
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top_ref:
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dispose(oper[i].ref);
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for i:=0 to opercnt-1 do
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begin
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with oper[i]^ do
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begin
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case typ of
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top_ref:
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dispose(ref);
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{$ifdef ARM}
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top_shifterop:
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dispose(oper[i].shifterop);
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top_shifterop:
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dispose(shifterop);
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{$endif ARM}
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end;
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end;
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end;
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dispose(oper[i]);
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end;
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inherited destroy;
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end;
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@ -1532,11 +1540,21 @@ implementation
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Loading of operands.
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---------------------------------------------------------------------}
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procedure taicpu_abstract.allocate_oper(opers:longint);
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begin
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while (opers>opercnt) do
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begin
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new(oper[opercnt]);
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fillchar(oper[opercnt]^,sizeof(toper),0);
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inc(opercnt);
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end;
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end;
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procedure taicpu_abstract.loadconst(opidx:longint;l:aword);
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begin
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if opidx>=ops then
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ops:=opidx+1;
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with oper[opidx] do
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allocate_oper(opidx+1);
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with oper[opidx]^ do
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begin
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if typ<>top_const then
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clearop(opidx);
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@ -1550,9 +1568,8 @@ implementation
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begin
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if not assigned(s) then
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internalerror(200204251);
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if opidx>=ops then
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ops:=opidx+1;
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with oper[opidx] do
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allocate_oper(opidx+1);
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with oper[opidx]^ do
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begin
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if typ<>top_symbol then
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clearop(opidx);
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@ -1568,9 +1585,8 @@ implementation
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begin
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if not assigned(s) then
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internalerror(200204251);
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if opidx>=ops then
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ops:=opidx+1;
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with oper[opidx] do
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allocate_oper(opidx+1);
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with oper[opidx]^ do
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begin
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if typ<>top_local then
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clearop(opidx);
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@ -1583,9 +1599,8 @@ implementation
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procedure taicpu_abstract.loadref(opidx:longint;const r:treference);
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begin
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if opidx>=ops then
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ops:=opidx+1;
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with oper[opidx] do
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allocate_oper(opidx+1);
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with oper[opidx]^ do
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begin
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if typ<>top_ref then
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begin
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@ -1610,9 +1625,8 @@ implementation
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procedure taicpu_abstract.loadreg(opidx:longint;r:tregister);
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begin
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if opidx>=ops then
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ops:=opidx+1;
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with oper[opidx] do
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allocate_oper(opidx+1);
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with oper[opidx]^ do
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begin
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if typ<>top_reg then
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clearop(opidx);
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@ -1624,31 +1638,33 @@ implementation
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procedure taicpu_abstract.loadoper(opidx:longint;o:toper);
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begin
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if opidx>=ops then
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ops:=opidx+1;
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allocate_oper(opidx+1);
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clearop(opidx);
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oper[opidx]:=o;
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oper[opidx]^:=o;
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{ copy also the reference }
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case oper[opidx].typ of
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top_ref:
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begin
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new(oper[opidx].ref);
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oper[opidx].ref^:=o.ref^;
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end;
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with oper[opidx]^ do
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begin
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case typ of
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top_ref:
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begin
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new(ref);
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ref^:=o.ref^;
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end;
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{$ifdef ARM}
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top_shifterop:
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begin
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new(oper[opidx].shifterop);
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oper[opidx].shifterop^:=o.shifterop^;
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end;
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top_shifterop:
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begin
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new(shifterop);
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shifterop^:=o.shifterop^;
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end;
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{$endif ARM}
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end;
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end;
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end;
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end;
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procedure taicpu_abstract.clearop(opidx:longint);
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begin
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with oper[opidx] do
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with oper[opidx]^ do
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case typ of
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top_ref:
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dispose(ref);
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@ -1736,12 +1752,12 @@ implementation
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begin
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spill_registers:=false;
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if (ops = 2) and
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(oper[1].typ=top_ref) and
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(oper[1]^.typ=top_ref) and
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{ oper[1] can also be ref in case of "lis r3,symbol@ha" or so }
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spilling_decode_loadstore(opcode,op,wasload) then
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begin
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{ the register that's being stored/loaded }
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supreg:=getsupreg(oper[0].reg);
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supreg:=getsupreg(oper[0]^.reg);
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if supregset_in(r,supreg) then
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begin
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// Example:
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@ -1762,14 +1778,14 @@ implementation
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// st? r21d, 8(r1)
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pos := get_insert_pos(Tai(previous),supreg,
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getsupreg(oper[1].ref^.base),
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getsupreg(oper[1].ref^.index),
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getsupreg(oper[1]^.ref^.base),
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getsupreg(oper[1]^.ref^.index),
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unusedregsint);
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rgget(list,pos,R_SUBWHOLE,helpreg);
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spill_registers := true;
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if wasload then
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begin
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helpins:=spilling_create_loadstore(opcode,helpreg,oper[1].ref^);
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helpins:=spilling_create_loadstore(opcode,helpreg,oper[1]^.ref^);
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loadref(1,spilltemplist[supreg]);
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opcode := op;
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end
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@ -1790,13 +1806,13 @@ implementation
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{ now the registers used in the reference }
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{ a) base }
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supreg := getsupreg(oper[1].ref^.base);
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supreg := getsupreg(oper[1]^.ref^.base);
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if supregset_in(r,supreg) then
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begin
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if wasload then
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pos:=get_insert_pos(Tai(previous),getsupreg(oper[1].ref^.index),getsupreg(oper[0].reg),0,unusedregsint)
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pos:=get_insert_pos(Tai(previous),getsupreg(oper[1]^.ref^.index),getsupreg(oper[0]^.reg),0,unusedregsint)
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else
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pos:=get_insert_pos(Tai(previous),getsupreg(oper[1].ref^.index),0,0,unusedregsint);
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pos:=get_insert_pos(Tai(previous),getsupreg(oper[1]^.ref^.index),0,0,unusedregsint);
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rgget(list,pos,R_SUBWHOLE,helpreg);
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spill_registers:=true;
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helpins:=spilling_create_load(spilltemplist[supreg],helpreg);
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@ -1804,7 +1820,7 @@ implementation
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list.insertafter(helpins,list.first)
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else
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list.insertafter(helpins,pos.next);
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oper[1].ref^.base:=helpreg;
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oper[1]^.ref^.base:=helpreg;
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rgunget(list,helpins,helpreg);
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forward_allocation(Tai(helpins.next),unusedregsint);
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{
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@ -1814,13 +1830,13 @@ implementation
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end;
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{ b) index }
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supreg := getsupreg(oper[1].ref^.index);
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supreg := getsupreg(oper[1]^.ref^.index);
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if supregset_in(r,supreg) then
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begin
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if wasload then
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pos:=get_insert_pos(Tai(previous),getsupreg(oper[1].ref^.base),getsupreg(oper[0].reg),0,unusedregsint)
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pos:=get_insert_pos(Tai(previous),getsupreg(oper[1]^.ref^.base),getsupreg(oper[0]^.reg),0,unusedregsint)
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else
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pos:=get_insert_pos(Tai(previous),getsupreg(oper[1].ref^.base),0,0,unusedregsint);
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pos:=get_insert_pos(Tai(previous),getsupreg(oper[1]^.ref^.base),0,0,unusedregsint);
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rgget(list,pos,R_SUBWHOLE,helpreg);
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spill_registers:=true;
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helpins:=spilling_create_load(spilltemplist[supreg],helpreg);
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@ -1828,7 +1844,7 @@ implementation
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list.insertafter(helpins,list.first)
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else
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list.insertafter(helpins,pos.next);
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oper[1].ref^.index:=helpreg;
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oper[1]^.ref^.index:=helpreg;
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rgunget(list,helpins,helpreg);
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forward_allocation(Tai(helpins.next),unusedregsint);
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{
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@ -1844,16 +1860,16 @@ implementation
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{ operand 0 is a register and is the destination, the others are sources }
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{ and can be either registers or constants }
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{ exception: branches (is_jmp isn't always set for them) }
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if oper[0].typ <> top_reg then
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if oper[0]^.typ <> top_reg then
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exit;
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reg1 := getsupreg(oper[0].reg);
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if oper[1].typ = top_reg then
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reg2 := getsupreg(oper[1].reg)
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reg1 := getsupreg(oper[0]^.reg);
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if oper[1]^.typ = top_reg then
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reg2 := getsupreg(oper[1]^.reg)
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else
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reg2 := 0;
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if (ops >= 3) and
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(oper[2].typ = top_reg) then
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reg3 := getsupreg(oper[2].reg)
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(oper[2]^.typ = top_reg) then
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reg3 := getsupreg(oper[2]^.reg)
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else
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reg3 := 0;
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@ -1889,9 +1905,9 @@ implementation
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end;
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for i := 1 to 2 do
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if (oper[i].typ = top_reg) then
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if (oper[i]^.typ = top_reg) then
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begin
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supreg:=getsupreg(oper[i].reg);
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supreg:=getsupreg(oper[i]^.reg);
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if supregset_in(r,supreg) then
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begin
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// Example:
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@ -1936,15 +1952,20 @@ implementation
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Function taicpu_abstract.getcopy:TLinkedListItem;
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var
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i : longint;
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p : TLinkedListItem;
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p : taicpu_abstract;
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begin
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p:=inherited getcopy;
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p:=taicpu_abstract(inherited getcopy);
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{ make a copy of the references }
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for i:=1 to ops do
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if (taicpu_abstract(p).oper[i-1].typ=top_ref) then
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p.opercnt:=0;
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p.allocate_oper(ops);
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for i:=0 to ops-1 do
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begin
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new(taicpu_abstract(p).oper[i-1].ref);
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taicpu_abstract(p).oper[i-1].ref^:=oper[i-1].ref^;
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p.oper[i]^:=oper[i]^;
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if (oper[i]^.typ=top_ref) then
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begin
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new(p.oper[i]^.ref);
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p.oper[i]^.ref^:=oper[i]^.ref^;
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end;
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end;
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getcopy:=p;
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end;
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@ -1957,9 +1978,9 @@ implementation
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inherited ppuload(t,ppufile);
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{ hopefully, we don't get problems with big/litte endian here when cross compiling :/ }
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ppufile.getdata(condition,sizeof(tasmcond));
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ops:=ppufile.getbyte;
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for i:=1 to ops do
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ppuloadoper(ppufile,oper[i-1]);
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allocate_oper(ppufile.getbyte);
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for i:=0 to ops-1 do
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ppuloadoper(ppufile,oper[i]^);
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opcode:=tasmop(ppufile.getword);
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{$ifdef i386}
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ppufile.getdata(segprefix,sizeof(Tregister));
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@ -1975,8 +1996,8 @@ implementation
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inherited ppuwrite(ppufile);
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ppufile.putdata(condition,sizeof(tasmcond));
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ppufile.putbyte(ops);
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for i:=1 to ops do
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ppuwriteoper(ppufile,oper[i-1]);
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for i:=0 to ops-1 do
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ppuwriteoper(ppufile,oper[i]^);
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ppufile.putword(word(opcode));
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{$ifdef i386}
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ppufile.putdata(segprefix,sizeof(Tregister));
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@ -1986,13 +2007,13 @@ implementation
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procedure taicpu_abstract.derefimpl;
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var
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i : integer;
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begin
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for i:=0 to ops-1 do
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ppuderefoper(oper[i]^);
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end;
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var i:byte;
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begin
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for i:=1 to ops do
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ppuderefoper(oper[i-1]);
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end;
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{****************************************************************************
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tai_align_abstract
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@ -2101,7 +2122,10 @@ implementation
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end.
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{
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$Log$
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Revision 1.44 2003-10-17 14:38:32 peter
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Revision 1.45 2003-10-21 15:15:35 peter
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* taicpu_abstract.oper[] changed to pointers
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Revision 1.44 2003/10/17 14:38:32 peter
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* 64k registers supported
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* fixed some memory leaks
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@ -1185,7 +1185,7 @@ Implementation
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{ fixup the references }
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for i:=1 to Taicpu(hp).ops do
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begin
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with Taicpu(hp).oper[i-1] do
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with Taicpu(hp).oper[i-1]^ do
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begin
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case typ of
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top_ref :
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@ -1661,7 +1661,10 @@ Implementation
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end.
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{
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$Log$
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Revision 1.57 2003-10-03 14:16:48 marco
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Revision 1.58 2003-10-21 15:15:36 peter
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* taicpu_abstract.oper[] changed to pointers
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Revision 1.57 2003/10/03 14:16:48 marco
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* -XP<prefix> support
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Revision 1.56 2003/09/30 19:54:23 peter
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@ -604,8 +604,8 @@ implementation
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(taicpu(hp).opcode=A_PUSH) or
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(taicpu(hp).opcode=A_POP)
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) and
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(taicpu(hp).oper[0].typ=top_reg) and
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is_segment_reg(taicpu(hp).oper[0].reg)
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(taicpu(hp).oper[0]^.typ=top_reg) and
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is_segment_reg(taicpu(hp).oper[0]^.reg)
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) then
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AsmWriteln(#9#9'DB'#9'066h');
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@ -640,7 +640,7 @@ implementation
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if (aktoutputformat = as_i386_wasm) and
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(taicpu(hp).opsize=S_W) and
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(taicpu(hp).opcode=A_PUSH) and
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(taicpu(hp).oper[0].typ=top_const) then
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(taicpu(hp).oper[0]^.typ=top_const) then
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begin
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AsmWriteln(#9#9'DB 66h,68h ; pushw imm16');
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AsmWrite(#9#9'DW');
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@ -652,7 +652,7 @@ implementation
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if is_calljmp(taicpu(hp).opcode) then
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begin
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AsmWrite(#9);
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WriteOper_jmp(taicpu(hp).oper[0],taicpu(hp).opsize);
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WriteOper_jmp(taicpu(hp).oper[0]^,taicpu(hp).opsize);
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end
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else
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begin
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@ -662,7 +662,7 @@ implementation
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AsmWrite(#9)
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else
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AsmWrite(',');
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WriteOper(taicpu(hp).oper[i],taicpu(hp).opsize,taicpu(hp).opcode,(i=2));
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WriteOper(taicpu(hp).oper[i]^,taicpu(hp).opsize,taicpu(hp).opcode,(i=2));
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end;
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end;
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end;
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@ -875,7 +875,10 @@ initialization
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end.
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{
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$Log$
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Revision 1.42 2003-10-19 01:34:30 florian
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Revision 1.43 2003-10-21 15:15:36 peter
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* taicpu_abstract.oper[] changed to pointers
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Revision 1.42 2003/10/19 01:34:30 florian
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* some ppc stuff fixed
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* memory leak fixed
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||||
@ -647,11 +647,11 @@ interface
|
||||
(taicpu(hp).opcode=A_FMULP))
|
||||
and (taicpu(hp).ops=0) then
|
||||
begin
|
||||
taicpu(hp).ops:=2;
|
||||
taicpu(hp).oper[0].typ:=top_reg;
|
||||
taicpu(hp).oper[0].reg:=NR_ST1;
|
||||
taicpu(hp).oper[1].typ:=top_reg;
|
||||
taicpu(hp).oper[1].reg:=NR_ST;
|
||||
taicpu(hp).allocate_oper(2);
|
||||
taicpu(hp).oper[0]^.typ:=top_reg;
|
||||
taicpu(hp).oper[0]^.reg:=NR_ST1;
|
||||
taicpu(hp).oper[1]^.typ:=top_reg;
|
||||
taicpu(hp).oper[1]^.reg:=NR_ST;
|
||||
end;
|
||||
if taicpu(hp).opcode=A_FWAIT then
|
||||
AsmWriteln(#9#9'DB'#9'09bh')
|
||||
@ -663,8 +663,8 @@ interface
|
||||
if (taicpu(hp).opsize=S_W) and
|
||||
((taicpu(hp).opcode=A_PUSH) or
|
||||
(taicpu(hp).opcode=A_POP)) and
|
||||
(taicpu(hp).oper[0].typ=top_reg) and
|
||||
(is_segment_reg(taicpu(hp).oper[0].reg)) then
|
||||
(taicpu(hp).oper[0]^.typ=top_reg) and
|
||||
(is_segment_reg(taicpu(hp).oper[0]^.reg)) then
|
||||
AsmWriteln(#9#9'DB'#9'066h');
|
||||
AsmWrite(#9#9+std_op2str[taicpu(hp).opcode]+cond2str[taicpu(hp).condition]);
|
||||
if taicpu(hp).ops<>0 then
|
||||
@ -672,7 +672,7 @@ interface
|
||||
if is_calljmp(taicpu(hp).opcode) then
|
||||
begin
|
||||
AsmWrite(#9);
|
||||
WriteOper_jmp(taicpu(hp).oper[0],taicpu(hp).opcode);
|
||||
WriteOper_jmp(taicpu(hp).oper[0]^,taicpu(hp).opcode);
|
||||
end
|
||||
else
|
||||
begin
|
||||
@ -682,7 +682,7 @@ interface
|
||||
AsmWrite(#9)
|
||||
else
|
||||
AsmWrite(',');
|
||||
WriteOper(taicpu(hp).oper[i],taicpu(hp).opsize,taicpu(hp).opcode,taicpu(hp).ops,(i=2));
|
||||
WriteOper(taicpu(hp).oper[i]^,taicpu(hp).opsize,taicpu(hp).opcode,taicpu(hp).ops,(i=2));
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
@ -900,7 +900,10 @@ initialization
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.40 2003-10-01 20:34:49 peter
|
||||
Revision 1.41 2003-10-21 15:15:36 peter
|
||||
* taicpu_abstract.oper[] changed to pointers
|
||||
|
||||
Revision 1.40 2003/10/01 20:34:49 peter
|
||||
* procinfo unit contains tprocinfo
|
||||
* cginfo renamed to cgbase
|
||||
* moved cgmessage to verbose
|
||||
|
||||
@ -208,8 +208,8 @@ interface
|
||||
{ fixup the references }
|
||||
for i:=1 to taicpu(hp2).ops do
|
||||
begin
|
||||
ResolveRef(taicpu(hp2).oper[i-1]);
|
||||
with taicpu(hp2).oper[i-1] do
|
||||
ResolveRef(taicpu(hp2).oper[i-1]^);
|
||||
with taicpu(hp2).oper[i-1]^ do
|
||||
begin
|
||||
case typ of
|
||||
top_ref :
|
||||
@ -255,7 +255,7 @@ interface
|
||||
{$endif}
|
||||
{ fixup the references }
|
||||
for i:=1 to taicpu(hp).ops do
|
||||
ResolveRef(taicpu(hp).oper[i-1]);
|
||||
ResolveRef(taicpu(hp).oper[i-1]^);
|
||||
end;
|
||||
end;
|
||||
hp:=tai(hp.next);
|
||||
@ -372,7 +372,10 @@ begin
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.44 2003-10-10 17:48:13 peter
|
||||
Revision 1.45 2003-10-21 15:15:36 peter
|
||||
* taicpu_abstract.oper[] changed to pointers
|
||||
|
||||
Revision 1.44 2003/10/10 17:48:13 peter
|
||||
* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
|
||||
* tregisteralloctor renamed to trgobj
|
||||
* removed rgobj from a lot of units
|
||||
|
||||
@ -2006,7 +2006,7 @@ implementation
|
||||
if assigned(left) then
|
||||
begin
|
||||
if left.nodetype=callparan then
|
||||
tcallparanode(left).firstcallparan(false)
|
||||
tcallparanode(left).firstcallparan
|
||||
else
|
||||
firstpass(left);
|
||||
left_max;
|
||||
@ -2358,7 +2358,10 @@ begin
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.120 2003-10-08 19:19:45 peter
|
||||
Revision 1.121 2003-10-21 15:15:36 peter
|
||||
* taicpu_abstract.oper[] changed to pointers
|
||||
|
||||
Revision 1.120 2003/10/08 19:19:45 peter
|
||||
* set_varstate cleanup
|
||||
|
||||
Revision 1.119 2003/10/01 20:34:48 peter
|
||||
|
||||
@ -854,9 +854,9 @@ implementation
|
||||
i.moveset:=ms_worklist_moves;
|
||||
i.instruction:=instr;
|
||||
worklist_moves.insert(i);
|
||||
ssupreg:=getsupreg(instr.oper[O_MOV_SOURCE].reg);
|
||||
ssupreg:=getsupreg(instr.oper[O_MOV_SOURCE]^.reg);
|
||||
add_to_movelist(ssupreg,i);
|
||||
dsupreg:=getsupreg(instr.oper[O_MOV_DEST].reg);
|
||||
dsupreg:=getsupreg(instr.oper[O_MOV_DEST]^.reg);
|
||||
if ssupreg<>dsupreg then
|
||||
{Avoid adding the same move instruction twice to a single register.}
|
||||
add_to_movelist(dsupreg,i);
|
||||
@ -1202,8 +1202,8 @@ implementation
|
||||
|
||||
begin
|
||||
m:=Tmoveins(worklist_moves.getfirst);
|
||||
x:=get_alias(getsupreg(m.instruction.oper[0].reg));
|
||||
y:=get_alias(getsupreg(m.instruction.oper[1].reg));
|
||||
x:=get_alias(getsupreg(m.instruction.oper[0]^.reg));
|
||||
y:=get_alias(getsupreg(m.instruction.oper[1]^.reg));
|
||||
if (y<first_imaginary) then
|
||||
begin
|
||||
u:=y;
|
||||
@ -1259,8 +1259,8 @@ implementation
|
||||
m:=reginfo[u].movelist^.data[i];
|
||||
if Tmoveins(m).moveset in [ms_worklist_moves,ms_active_moves] then
|
||||
begin
|
||||
x:=getsupreg(Tmoveins(m).instruction.oper[0].reg);
|
||||
y:=getsupreg(Tmoveins(m).instruction.oper[1].reg);
|
||||
x:=getsupreg(Tmoveins(m).instruction.oper[0]^.reg);
|
||||
y:=getsupreg(Tmoveins(m).instruction.oper[1]^.reg);
|
||||
if get_alias(y)=get_alias(u) then
|
||||
v:=get_alias(x)
|
||||
else
|
||||
@ -1521,9 +1521,9 @@ implementation
|
||||
begin
|
||||
m:=Tmoveins(movelist[u]^.data[j]);
|
||||
{Get the other register of the move instruction.}
|
||||
v:=m.instruction.oper[0].reg.number shr 8;
|
||||
v:=m.instruction.oper[0]^.reg.number shr 8;
|
||||
if v=u then
|
||||
v:=m.instruction.oper[1].reg.number shr 8;
|
||||
v:=m.instruction.oper[1]^.reg.number shr 8;
|
||||
repeat
|
||||
repeat
|
||||
if (u<>v) and (movelist[v]<>nil) then
|
||||
@ -1752,15 +1752,15 @@ implementation
|
||||
ait_instruction:
|
||||
begin
|
||||
for i:=0 to Taicpu_abstract(p).ops-1 do
|
||||
case Taicpu_abstract(p).oper[i].typ of
|
||||
case Taicpu_abstract(p).oper[i]^.typ of
|
||||
Top_reg:
|
||||
if (getregtype(Taicpu_abstract(p).oper[i].reg)=regtype) then
|
||||
setsupreg(Taicpu_abstract(p).oper[i].reg,reginfo[getsupreg(Taicpu_abstract(p).oper[i].reg)].colour);
|
||||
if (getregtype(Taicpu_abstract(p).oper[i]^.reg)=regtype) then
|
||||
setsupreg(Taicpu_abstract(p).oper[i]^.reg,reginfo[getsupreg(Taicpu_abstract(p).oper[i]^.reg)].colour);
|
||||
Top_ref:
|
||||
begin
|
||||
if regtype=R_INTREGISTER then
|
||||
begin
|
||||
r:=Taicpu_abstract(p).oper[i].ref;
|
||||
r:=Taicpu_abstract(p).oper[i]^.ref;
|
||||
if r^.base<>NR_NO then
|
||||
setsupreg(r^.base,reginfo[getsupreg(r^.base)].colour);
|
||||
if r^.index<>NR_NO then
|
||||
@ -1770,7 +1770,7 @@ implementation
|
||||
{$ifdef arm}
|
||||
Top_shifterop:
|
||||
begin
|
||||
so:=Taicpu_abstract(p).oper[i].shifterop;
|
||||
so:=Taicpu_abstract(p).oper[i]^.shifterop;
|
||||
if so^.rs<>NR_NO then
|
||||
setsupreg(so^.rs,table[getsupreg(so^.rs)]);
|
||||
end;
|
||||
@ -1796,7 +1796,10 @@ implementation
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.90 2003-10-19 12:36:36 florian
|
||||
Revision 1.91 2003-10-21 15:15:36 peter
|
||||
* taicpu_abstract.oper[] changed to pointers
|
||||
|
||||
Revision 1.90 2003/10/19 12:36:36 florian
|
||||
* improved speed; reduced memory usage of the interference bitmap
|
||||
|
||||
Revision 1.89 2003/10/19 01:34:30 florian
|
||||
|
||||
@ -213,10 +213,10 @@ interface
|
||||
procedure ppuderefoper(var o:toper);override;
|
||||
private
|
||||
{ next fields are filled in pass1, so pass2 is faster }
|
||||
insentry : PInsEntry;
|
||||
inssize : shortint;
|
||||
insoffset,
|
||||
inssize : longint;
|
||||
LastInsOffset : longint; { need to be public to be reset }
|
||||
insentry : PInsEntry;
|
||||
function InsEnd:longint;
|
||||
procedure create_ot;
|
||||
function Matches(p:PInsEntry):longint;
|
||||
@ -648,59 +648,62 @@ implementation
|
||||
addsize : boolean;
|
||||
begin
|
||||
s:='['+std_op2str[opcode];
|
||||
for i:=1to ops do
|
||||
for i:=0 to ops-1 do
|
||||
begin
|
||||
if i=1 then
|
||||
s:=s+' '
|
||||
else
|
||||
s:=s+',';
|
||||
{ type }
|
||||
addsize:=false;
|
||||
if (oper[i-1].ot and OT_XMMREG)=OT_XMMREG then
|
||||
s:=s+'xmmreg'
|
||||
else
|
||||
if (oper[i-1].ot and OT_MMXREG)=OT_MMXREG then
|
||||
s:=s+'mmxreg'
|
||||
else
|
||||
if (oper[i-1].ot and OT_FPUREG)=OT_FPUREG then
|
||||
s:=s+'fpureg'
|
||||
else
|
||||
if (oper[i-1].ot and OT_REGISTER)=OT_REGISTER then
|
||||
with oper[i]^ do
|
||||
begin
|
||||
s:=s+'reg';
|
||||
addsize:=true;
|
||||
end
|
||||
else
|
||||
if (oper[i-1].ot and OT_IMMEDIATE)=OT_IMMEDIATE then
|
||||
begin
|
||||
s:=s+'imm';
|
||||
addsize:=true;
|
||||
end
|
||||
else
|
||||
if (oper[i-1].ot and OT_MEMORY)=OT_MEMORY then
|
||||
begin
|
||||
s:=s+'mem';
|
||||
addsize:=true;
|
||||
end
|
||||
else
|
||||
s:=s+'???';
|
||||
{ size }
|
||||
if addsize then
|
||||
begin
|
||||
if (oper[i-1].ot and OT_BITS8)<>0 then
|
||||
s:=s+'8'
|
||||
else
|
||||
if (oper[i-1].ot and OT_BITS16)<>0 then
|
||||
s:=s+'16'
|
||||
else
|
||||
if (oper[i-1].ot and OT_BITS32)<>0 then
|
||||
s:=s+'32'
|
||||
else
|
||||
s:=s+'??';
|
||||
{ signed }
|
||||
if (oper[i-1].ot and OT_SIGNED)<>0 then
|
||||
s:=s+'s';
|
||||
end;
|
||||
if i=0 then
|
||||
s:=s+' '
|
||||
else
|
||||
s:=s+',';
|
||||
{ type }
|
||||
addsize:=false;
|
||||
if (ot and OT_XMMREG)=OT_XMMREG then
|
||||
s:=s+'xmmreg'
|
||||
else
|
||||
if (ot and OT_MMXREG)=OT_MMXREG then
|
||||
s:=s+'mmxreg'
|
||||
else
|
||||
if (ot and OT_FPUREG)=OT_FPUREG then
|
||||
s:=s+'fpureg'
|
||||
else
|
||||
if (ot and OT_REGISTER)=OT_REGISTER then
|
||||
begin
|
||||
s:=s+'reg';
|
||||
addsize:=true;
|
||||
end
|
||||
else
|
||||
if (ot and OT_IMMEDIATE)=OT_IMMEDIATE then
|
||||
begin
|
||||
s:=s+'imm';
|
||||
addsize:=true;
|
||||
end
|
||||
else
|
||||
if (ot and OT_MEMORY)=OT_MEMORY then
|
||||
begin
|
||||
s:=s+'mem';
|
||||
addsize:=true;
|
||||
end
|
||||
else
|
||||
s:=s+'???';
|
||||
{ size }
|
||||
if addsize then
|
||||
begin
|
||||
if (ot and OT_BITS8)<>0 then
|
||||
s:=s+'8'
|
||||
else
|
||||
if (ot and OT_BITS16)<>0 then
|
||||
s:=s+'16'
|
||||
else
|
||||
if (ot and OT_BITS32)<>0 then
|
||||
s:=s+'32'
|
||||
else
|
||||
s:=s+'??';
|
||||
{ signed }
|
||||
if (ot and OT_SIGNED)<>0 then
|
||||
s:=s+'s';
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
GetString:=s+']';
|
||||
end;
|
||||
@ -708,7 +711,7 @@ implementation
|
||||
|
||||
procedure taicpu.Swapoperands;
|
||||
var
|
||||
p : TOper;
|
||||
p : POper;
|
||||
begin
|
||||
{ Fix the operands which are in AT&T style and we need them in Intel style }
|
||||
case ops of
|
||||
@ -826,16 +829,16 @@ implementation
|
||||
|
||||
if (
|
||||
(ops=2) and
|
||||
(oper[0].typ=top_reg) and
|
||||
(oper[1].typ=top_reg) and
|
||||
(oper[0]^.typ=top_reg) and
|
||||
(oper[1]^.typ=top_reg) and
|
||||
{ if the first is ST and the second is also a register
|
||||
it is necessarily ST1 .. ST7 }
|
||||
((oper[0].reg=NR_ST) or
|
||||
(oper[0].reg=NR_ST0))
|
||||
((oper[0]^.reg=NR_ST) or
|
||||
(oper[0]^.reg=NR_ST0))
|
||||
) or
|
||||
{ ((ops=1) and
|
||||
(oper[0].typ=top_reg) and
|
||||
(oper[0].reg in [R_ST1..R_ST7])) or}
|
||||
(oper[0]^.typ=top_reg) and
|
||||
(oper[0]^.reg in [R_ST1..R_ST7])) or}
|
||||
(ops=0) then
|
||||
begin
|
||||
if opcode=A_FSUBR then
|
||||
@ -857,9 +860,9 @@ implementation
|
||||
end;
|
||||
if (
|
||||
(ops=1) and
|
||||
(oper[0].typ=top_reg) and
|
||||
(getregtype(oper[0].reg)=R_FPUREGISTER) and
|
||||
(oper[0].reg<>NR_ST)
|
||||
(oper[0]^.typ=top_reg) and
|
||||
(getregtype(oper[0]^.reg)=R_FPUREGISTER) and
|
||||
(oper[0]^.reg<>NR_ST)
|
||||
) then
|
||||
begin
|
||||
if opcode=A_FSUBRP then
|
||||
@ -900,7 +903,7 @@ implementation
|
||||
exit;
|
||||
{ update oper[].ot field }
|
||||
for i:=0 to ops-1 do
|
||||
with oper[i] do
|
||||
with oper[i]^ do
|
||||
begin
|
||||
case typ of
|
||||
top_reg :
|
||||
@ -1002,7 +1005,7 @@ implementation
|
||||
|
||||
{ Check that no spurious colons or TOs are present }
|
||||
for i:=0 to p^.ops-1 do
|
||||
if (oper[i].ot and (not p^.optypes[i]) and (OT_COLON or OT_TO))<>0 then
|
||||
if (oper[i]^.ot and (not p^.optypes[i]) and (OT_COLON or OT_TO))<>0 then
|
||||
begin
|
||||
Matches:=0;
|
||||
exit;
|
||||
@ -1011,12 +1014,12 @@ implementation
|
||||
{ Check that the operand flags all match up }
|
||||
for i:=0 to p^.ops-1 do
|
||||
begin
|
||||
if ((p^.optypes[i] and (not oper[i].ot)) or
|
||||
if ((p^.optypes[i] and (not oper[i]^.ot)) or
|
||||
((p^.optypes[i] and OT_SIZE_MASK) and
|
||||
((p^.optypes[i] xor oper[i].ot) and OT_SIZE_MASK)))<>0 then
|
||||
((p^.optypes[i] xor oper[i]^.ot) and OT_SIZE_MASK)))<>0 then
|
||||
begin
|
||||
if ((p^.optypes[i] and (not oper[i].ot) and OT_NON_SIZE) or
|
||||
(oper[i].ot and OT_SIZE_MASK))<>0 then
|
||||
if ((p^.optypes[i] and (not oper[i]^.ot) and OT_NON_SIZE) or
|
||||
(oper[i]^.ot and OT_SIZE_MASK))<>0 then
|
||||
begin
|
||||
Matches:=0;
|
||||
exit;
|
||||
@ -1082,10 +1085,10 @@ implementation
|
||||
for i:=0 to p^.ops-1 do
|
||||
begin
|
||||
if ((p^.optypes[i] and OT_SIZE_MASK)=0) and
|
||||
((oper[i].ot and OT_SIZE_MASK and (not siz[i]))<>0) and
|
||||
((oper[i]^.ot and OT_SIZE_MASK and (not siz[i]))<>0) and
|
||||
{ Immediates can always include smaller size }
|
||||
((oper[i].ot and OT_IMMEDIATE)=0) and
|
||||
(((p^.optypes[i] and OT_SIZE_MASK) or siz[i])<(oper[i].ot and OT_SIZE_MASK)) then
|
||||
((oper[i]^.ot and OT_IMMEDIATE)=0) and
|
||||
(((p^.optypes[i] and OT_SIZE_MASK) or siz[i])<(oper[i]^.ot and OT_SIZE_MASK)) then
|
||||
Matches:=2;
|
||||
end;
|
||||
end;
|
||||
@ -1265,15 +1268,15 @@ implementation
|
||||
function taicpu.needaddrprefix(opidx:byte):boolean;
|
||||
begin
|
||||
needaddrprefix:=false;
|
||||
if (OT_MEMORY and (not oper[opidx].ot))=0 then
|
||||
if (OT_MEMORY and (not oper[opidx]^.ot))=0 then
|
||||
begin
|
||||
if (
|
||||
(oper[opidx].ref^.index<>NR_NO) and
|
||||
(getsubreg(oper[opidx].ref^.index)<>R_SUBD)
|
||||
(oper[opidx]^.ref^.index<>NR_NO) and
|
||||
(getsubreg(oper[opidx]^.ref^.index)<>R_SUBD)
|
||||
) or
|
||||
(
|
||||
(oper[opidx].ref^.base<>NR_NO) and
|
||||
(getsubreg(oper[opidx].ref^.base)<>R_SUBD)
|
||||
(oper[opidx]^.ref^.base<>NR_NO) and
|
||||
(getsubreg(oper[opidx]^.ref^.base)<>R_SUBD)
|
||||
) then
|
||||
needaddrprefix:=true;
|
||||
end;
|
||||
@ -1517,7 +1520,7 @@ implementation
|
||||
begin
|
||||
if (c>=64) and (c<=191) then
|
||||
begin
|
||||
if not process_ea(oper[(c shr 3) and 7], ea_data, 0) then
|
||||
if not process_ea(oper[(c shr 3) and 7]^, ea_data, 0) then
|
||||
Message(asmw_e_invalid_effective_address)
|
||||
else
|
||||
inc(len,ea_data.size);
|
||||
@ -1583,21 +1586,21 @@ implementation
|
||||
|
||||
procedure getvalsym(opidx:longint);
|
||||
begin
|
||||
case oper[opidx].typ of
|
||||
case oper[opidx]^.typ of
|
||||
top_ref :
|
||||
begin
|
||||
currval:=oper[opidx].ref^.offset;
|
||||
currsym:=oper[opidx].ref^.symbol;
|
||||
currval:=oper[opidx]^.ref^.offset;
|
||||
currsym:=oper[opidx]^.ref^.symbol;
|
||||
end;
|
||||
top_const :
|
||||
begin
|
||||
currval:=longint(oper[opidx].val);
|
||||
currval:=longint(oper[opidx]^.val);
|
||||
currsym:=nil;
|
||||
end;
|
||||
top_symbol :
|
||||
begin
|
||||
currval:=oper[opidx].symofs;
|
||||
currsym:=oper[opidx].sym;
|
||||
currval:=oper[opidx]^.symofs;
|
||||
currsym:=oper[opidx]^.sym;
|
||||
end;
|
||||
else
|
||||
Message(asmw_e_immediate_or_reference_expected);
|
||||
@ -1645,7 +1648,7 @@ implementation
|
||||
end;
|
||||
4,6 :
|
||||
begin
|
||||
case oper[0].reg of
|
||||
case oper[0]^.reg of
|
||||
NR_CS:
|
||||
bytes[0]:=$e;
|
||||
NR_NO,
|
||||
@ -1664,7 +1667,7 @@ implementation
|
||||
end;
|
||||
5,7 :
|
||||
begin
|
||||
case oper[0].reg of
|
||||
case oper[0]^.reg of
|
||||
NR_FS:
|
||||
bytes[0]:=$a0;
|
||||
NR_GS:
|
||||
@ -1678,7 +1681,7 @@ implementation
|
||||
end;
|
||||
8,9,10 :
|
||||
begin
|
||||
bytes[0]:=ord(codes^)+regval(oper[c-8].reg);
|
||||
bytes[0]:=ord(codes^)+regval(oper[c-8]^.reg);
|
||||
inc(codes);
|
||||
sec.writebytes(bytes,1);
|
||||
end;
|
||||
@ -1814,15 +1817,15 @@ implementation
|
||||
begin
|
||||
if (c<127) then
|
||||
begin
|
||||
if (oper[c and 7].typ=top_reg) then
|
||||
rfield:=regval(oper[c and 7].reg)
|
||||
if (oper[c and 7]^.typ=top_reg) then
|
||||
rfield:=regval(oper[c and 7]^.reg)
|
||||
else
|
||||
rfield:=regval(oper[c and 7].ref^.base);
|
||||
rfield:=regval(oper[c and 7]^.ref^.base);
|
||||
end
|
||||
else
|
||||
rfield:=c and 7;
|
||||
opidx:=(c shr 3) and 7;
|
||||
if not process_ea(oper[opidx], ea_data, rfield) then
|
||||
if not process_ea(oper[opidx]^,ea_data,rfield) then
|
||||
Message(asmw_e_invalid_effective_address);
|
||||
|
||||
pb:=@bytes;
|
||||
@ -1841,19 +1844,19 @@ implementation
|
||||
0 : ;
|
||||
1 :
|
||||
begin
|
||||
if (oper[opidx].ot and OT_MEMORY)=OT_MEMORY then
|
||||
sec.writereloc(oper[opidx].ref^.offset,1,oper[opidx].ref^.symbol,RELOC_ABSOLUTE)
|
||||
if (oper[opidx]^.ot and OT_MEMORY)=OT_MEMORY then
|
||||
sec.writereloc(oper[opidx]^.ref^.offset,1,oper[opidx]^.ref^.symbol,RELOC_ABSOLUTE)
|
||||
else
|
||||
begin
|
||||
bytes[0]:=oper[opidx].ref^.offset;
|
||||
bytes[0]:=oper[opidx]^.ref^.offset;
|
||||
sec.writebytes(bytes,1);
|
||||
end;
|
||||
inc(s);
|
||||
end;
|
||||
2,4 :
|
||||
begin
|
||||
sec.writereloc(oper[opidx].ref^.offset,ea_data.bytes,
|
||||
oper[opidx].ref^.symbol,RELOC_ABSOLUTE);
|
||||
sec.writereloc(oper[opidx]^.ref^.offset,ea_data.bytes,
|
||||
oper[opidx]^.ref^.symbol,RELOC_ABSOLUTE);
|
||||
inc(s,ea_data.bytes);
|
||||
end;
|
||||
end;
|
||||
@ -1872,8 +1875,8 @@ implementation
|
||||
{We do not check the number of operands; we assume that nobody constructs
|
||||
a mov or xchg instruction with less than 2 operands. (DM)}
|
||||
is_nop:=(opcode=A_NOP) or
|
||||
(opcode=A_MOV) and (oper[0].typ=top_reg) and (oper[1].typ=top_reg) and (oper[0].reg=oper[1].reg) or
|
||||
(opcode=A_XCHG) and (oper[0].typ=top_reg) and (oper[1].typ=top_reg) and (oper[0].reg=oper[1].reg);
|
||||
(opcode=A_MOV) and (oper[0]^.typ=top_reg) and (oper[1]^.typ=top_reg) and (oper[0]^.reg=oper[1]^.reg) or
|
||||
(opcode=A_XCHG) and (oper[0]^.typ=top_reg) and (oper[1]^.typ=top_reg) and (oper[0]^.reg=oper[1]^.reg);
|
||||
end;
|
||||
|
||||
function Taicpu.is_move:boolean;
|
||||
@ -1885,7 +1888,7 @@ implementation
|
||||
interrest to the register allocation, therefore we only return true
|
||||
for a move between two registers. (DM)}
|
||||
is_move:=((opcode=A_MOV) or (opcode=A_MOVZX) or (opcode=A_MOVSX)) and
|
||||
((oper[0].typ=top_reg) and (oper[1].typ=top_reg));
|
||||
((oper[0]^.typ=top_reg) and (oper[1]^.typ=top_reg));
|
||||
end;
|
||||
|
||||
|
||||
@ -1921,10 +1924,10 @@ implementation
|
||||
case ops of
|
||||
1:
|
||||
begin
|
||||
if (oper[0].typ=top_reg) and
|
||||
(getregtype(oper[0].reg)=R_INTREGISTER) then
|
||||
if (oper[0]^.typ=top_reg) and
|
||||
(getregtype(oper[0]^.reg)=R_INTREGISTER) then
|
||||
begin
|
||||
supreg:=getsupreg(oper[0].reg);
|
||||
supreg:=getsupreg(oper[0]^.reg);
|
||||
if supregset_in(r,supreg) then
|
||||
begin
|
||||
{Situation example:
|
||||
@ -1933,15 +1936,15 @@ implementation
|
||||
Change into:
|
||||
push [ebp-12] ; Replace register by reference }
|
||||
{ hopsize:=reg2opsize(oper[0].reg);}
|
||||
oper[0].typ:=top_ref;
|
||||
new(oper[0].ref);
|
||||
oper[0].ref^:=spilltemplist[supreg];
|
||||
{ oper[0].ref^.size:=hopsize;}
|
||||
oper[0]^.typ:=top_ref;
|
||||
new(oper[0]^.ref);
|
||||
oper[0]^.ref^:=spilltemplist[supreg];
|
||||
{ oper[0]^.ref^.size:=hopsize;}
|
||||
end;
|
||||
end;
|
||||
if oper[0].typ=top_ref then
|
||||
if oper[0]^.typ=top_ref then
|
||||
begin
|
||||
supreg:=getsupreg(oper[0].ref^.base);
|
||||
supreg:=getsupreg(oper[0]^.ref^.base);
|
||||
if supregset_in(r,supreg) then
|
||||
begin
|
||||
{Situation example:
|
||||
@ -1951,23 +1954,23 @@ implementation
|
||||
|
||||
mov r23d,[ebp-12] ; Use a help register
|
||||
push [r23d+4*r22d] ; Replace register by helpregister }
|
||||
subreg:=getsubreg(oper[0].ref^.base);
|
||||
if oper[0].ref^.index=NR_NO then
|
||||
subreg:=getsubreg(oper[0]^.ref^.base);
|
||||
if oper[0]^.ref^.index=NR_NO then
|
||||
pos:=Tai(previous)
|
||||
else
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[0].ref^.index),RS_INVALID,RS_INVALID,unusedregsint);
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[0]^.ref^.index),RS_INVALID,RS_INVALID,unusedregsint);
|
||||
rgget(list,pos,subreg,helpreg);
|
||||
spill_registers:=true;
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,reg2opsize(oper[0].ref^.base),spilltemplist[supreg],helpreg);
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,reg2opsize(oper[0]^.ref^.base),spilltemplist[supreg],helpreg);
|
||||
if pos=nil then
|
||||
list.insertafter(helpins,list.first)
|
||||
else
|
||||
list.insertafter(helpins,pos.next);
|
||||
rgunget(list,helpins,helpreg);
|
||||
forward_allocation(Tai(helpins.next),unusedregsint);
|
||||
oper[0].ref^.base:=helpreg;
|
||||
oper[0]^.ref^.base:=helpreg;
|
||||
end;
|
||||
supreg:=getsupreg(oper[0].ref^.index);
|
||||
supreg:=getsupreg(oper[0]^.ref^.index);
|
||||
if supregset_in(r,supreg) then
|
||||
begin
|
||||
{Situation example:
|
||||
@ -1977,21 +1980,21 @@ implementation
|
||||
|
||||
mov r23d,[ebp-12] ; Use a help register
|
||||
push [r21d+4*r23d] ; Replace register by helpregister }
|
||||
subreg:=getsubreg(oper[0].ref^.index);
|
||||
if oper[0].ref^.base=NR_NO then
|
||||
subreg:=getsubreg(oper[0]^.ref^.index);
|
||||
if oper[0]^.ref^.base=NR_NO then
|
||||
pos:=Tai(previous)
|
||||
else
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[0].ref^.base),RS_INVALID,RS_INVALID,unusedregsint);
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[0]^.ref^.base),RS_INVALID,RS_INVALID,unusedregsint);
|
||||
rgget(list,pos,subreg,helpreg);
|
||||
spill_registers:=true;
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,reg2opsize(oper[0].ref^.index),spilltemplist[supreg],helpreg);
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,reg2opsize(oper[0]^.ref^.index),spilltemplist[supreg],helpreg);
|
||||
if pos=nil then
|
||||
list.insertafter(helpins,list.first)
|
||||
else
|
||||
list.insertafter(helpins,pos.next);
|
||||
rgunget(list,helpins,helpreg);
|
||||
forward_allocation(Tai(helpins.next),unusedregsint);
|
||||
oper[0].ref^.index:=helpreg;
|
||||
oper[0]^.ref^.index:=helpreg;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
@ -2001,9 +2004,9 @@ implementation
|
||||
required because the reference can be moved from this instruction
|
||||
to a MOV instruction when spilling of the register operand is done }
|
||||
for i:=0 to 1 do
|
||||
if oper[i].typ=top_ref then
|
||||
if oper[i]^.typ=top_ref then
|
||||
begin
|
||||
supreg:=getsupreg(oper[i].ref^.base);
|
||||
supreg:=getsupreg(oper[i]^.ref^.base);
|
||||
if supregset_in(r,supreg) then
|
||||
begin
|
||||
{Situation example:
|
||||
@ -2013,24 +2016,24 @@ implementation
|
||||
|
||||
mov r23d,[ebp-12] ; Use a help register
|
||||
add r20d,[r23d+4*r22d] ; Replace register by helpregister }
|
||||
subreg:=getsubreg(oper[i].ref^.base);
|
||||
subreg:=getsubreg(oper[i]^.ref^.base);
|
||||
if i=1 then
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[i].ref^.index),getsupreg(oper[0].reg),
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[i]^.ref^.index),getsupreg(oper[0]^.reg),
|
||||
RS_INVALID,unusedregsint)
|
||||
else
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[i].ref^.index),RS_INVALID,RS_INVALID,unusedregsint);
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[i]^.ref^.index),RS_INVALID,RS_INVALID,unusedregsint);
|
||||
rgget(list,pos,subreg,helpreg);
|
||||
spill_registers:=true;
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,reg2opsize(oper[i].ref^.base),spilltemplist[supreg],helpreg);
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,reg2opsize(oper[i]^.ref^.base),spilltemplist[supreg],helpreg);
|
||||
if pos=nil then
|
||||
list.insertafter(helpins,list.first)
|
||||
else
|
||||
list.insertafter(helpins,pos.next);
|
||||
oper[i].ref^.base:=helpreg;
|
||||
oper[i]^.ref^.base:=helpreg;
|
||||
rgunget(list,helpins,helpreg);
|
||||
forward_allocation(Tai(helpins.next),unusedregsint);
|
||||
end;
|
||||
supreg:=getsupreg(oper[i].ref^.index);
|
||||
supreg:=getsupreg(oper[i]^.ref^.index);
|
||||
if supregset_in(r,supreg) then
|
||||
begin
|
||||
{Situation example:
|
||||
@ -2040,31 +2043,31 @@ implementation
|
||||
|
||||
mov r23d,[ebp-12] ; Use a help register
|
||||
add r20d,[r21d+4*r23d] ; Replace register by helpregister }
|
||||
subreg:=getsubreg(oper[i].ref^.index);
|
||||
subreg:=getsubreg(oper[i]^.ref^.index);
|
||||
if i=1 then
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[i].ref^.base),getsupreg(oper[0].reg),
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[i]^.ref^.base),getsupreg(oper[0]^.reg),
|
||||
RS_INVALID,unusedregsint)
|
||||
else
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[i].ref^.base),RS_INVALID,RS_INVALID,unusedregsint);
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[i]^.ref^.base),RS_INVALID,RS_INVALID,unusedregsint);
|
||||
rgget(list,pos,subreg,helpreg);
|
||||
spill_registers:=true;
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,reg2opsize(oper[i].ref^.index),spilltemplist[supreg],helpreg);
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,reg2opsize(oper[i]^.ref^.index),spilltemplist[supreg],helpreg);
|
||||
if pos=nil then
|
||||
list.insertafter(helpins,list.first)
|
||||
else
|
||||
list.insertafter(helpins,pos.next);
|
||||
oper[i].ref^.index:=helpreg;
|
||||
oper[i]^.ref^.index:=helpreg;
|
||||
rgunget(list,helpins,helpreg);
|
||||
forward_allocation(Tai(helpins.next),unusedregsint);
|
||||
end;
|
||||
end;
|
||||
if (oper[0].typ=top_reg) and
|
||||
(getregtype(oper[0].reg)=R_INTREGISTER) then
|
||||
if (oper[0]^.typ=top_reg) and
|
||||
(getregtype(oper[0]^.reg)=R_INTREGISTER) then
|
||||
begin
|
||||
supreg:=getsupreg(oper[0].reg);
|
||||
subreg:=getsubreg(oper[0].reg);
|
||||
supreg:=getsupreg(oper[0]^.reg);
|
||||
subreg:=getsubreg(oper[0]^.reg);
|
||||
if supregset_in(r,supreg) then
|
||||
if oper[1].typ=top_ref then
|
||||
if oper[1]^.typ=top_ref then
|
||||
begin
|
||||
{Situation example:
|
||||
add [r20d],r21d ; r21d must be spilled into [ebp-12]
|
||||
@ -2073,17 +2076,17 @@ implementation
|
||||
|
||||
mov r22d,[ebp-12] ; Use a help register
|
||||
add [r20d],r22d ; Replace register by helpregister }
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[0].reg),
|
||||
getsupreg(oper[1].ref^.base),getsupreg(oper[1].ref^.index),
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[0]^.reg),
|
||||
getsupreg(oper[1]^.ref^.base),getsupreg(oper[1]^.ref^.index),
|
||||
unusedregsint);
|
||||
rgget(list,pos,subreg,helpreg);
|
||||
spill_registers:=true;
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,reg2opsize(oper[0].reg),spilltemplist[supreg],helpreg);
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,reg2opsize(oper[0]^.reg),spilltemplist[supreg],helpreg);
|
||||
if pos=nil then
|
||||
list.insertafter(helpins,list.first)
|
||||
else
|
||||
list.insertafter(helpins,pos.next);
|
||||
oper[0].reg:=helpreg;
|
||||
oper[0]^.reg:=helpreg;
|
||||
rgunget(list,helpins,helpreg);
|
||||
forward_allocation(Tai(helpins.next),unusedregsint);
|
||||
end
|
||||
@ -2095,19 +2098,19 @@ implementation
|
||||
Change into:
|
||||
|
||||
add r20d,[ebp-12] ; Replace register by reference }
|
||||
oper[0].typ:=top_ref;
|
||||
new(oper[0].ref);
|
||||
oper[0].ref^:=spilltemplist[supreg];
|
||||
oper[0]^.typ:=top_ref;
|
||||
new(oper[0]^.ref);
|
||||
oper[0]^.ref^:=spilltemplist[supreg];
|
||||
end;
|
||||
end;
|
||||
if (oper[1].typ=top_reg) and
|
||||
(getregtype(oper[1].reg)=R_INTREGISTER) then
|
||||
if (oper[1]^.typ=top_reg) and
|
||||
(getregtype(oper[1]^.reg)=R_INTREGISTER) then
|
||||
begin
|
||||
supreg:=getsupreg(oper[1].reg);
|
||||
subreg:=getsubreg(oper[1].reg);
|
||||
supreg:=getsupreg(oper[1]^.reg);
|
||||
subreg:=getsubreg(oper[1]^.reg);
|
||||
if supregset_in(r,supreg) then
|
||||
begin
|
||||
if oper[0].typ=top_ref then
|
||||
if oper[0]^.typ=top_ref then
|
||||
begin
|
||||
{Situation example:
|
||||
add r20d,[r21d] ; r20d must be spilled into [ebp-12]
|
||||
@ -2116,8 +2119,8 @@ implementation
|
||||
|
||||
mov r22d,[r21d] ; Use a help register
|
||||
add [ebp-12],r22d ; Replace register by helpregister }
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[0].ref^.base),
|
||||
getsupreg(oper[0].ref^.index),RS_INVALID,unusedregsint);
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[0]^.ref^.base),
|
||||
getsupreg(oper[0]^.ref^.index),RS_INVALID,unusedregsint);
|
||||
rgget(list,pos,subreg,helpreg);
|
||||
spill_registers:=true;
|
||||
op:=A_MOV;
|
||||
@ -2127,19 +2130,19 @@ implementation
|
||||
{Because 'movzx memory,register' does not exist...}
|
||||
op:=opcode;
|
||||
opcode:=A_MOV;
|
||||
opsize:=reg2opsize(oper[1].reg);
|
||||
opsize:=reg2opsize(oper[1]^.reg);
|
||||
end;
|
||||
helpins:=Taicpu.op_ref_reg(op,hopsize,oper[0].ref^,helpreg);
|
||||
helpins:=Taicpu.op_ref_reg(op,hopsize,oper[0]^.ref^,helpreg);
|
||||
if pos=nil then
|
||||
list.insertafter(helpins,list.first)
|
||||
else
|
||||
list.insertafter(helpins,pos.next);
|
||||
dispose(oper[0].ref);
|
||||
oper[0].typ:=top_reg;
|
||||
oper[0].reg:=helpreg;
|
||||
oper[1].typ:=top_ref;
|
||||
new(oper[1].ref);
|
||||
oper[1].ref^:=spilltemplist[supreg];
|
||||
dispose(oper[0]^.ref);
|
||||
oper[0]^.typ:=top_reg;
|
||||
oper[0]^.reg:=helpreg;
|
||||
oper[1]^.typ:=top_ref;
|
||||
new(oper[1]^.ref);
|
||||
oper[1]^.ref^:=spilltemplist[supreg];
|
||||
rgunget(list,helpins,helpreg);
|
||||
forward_allocation(Tai(helpins.next),unusedregsint);
|
||||
end
|
||||
@ -2158,32 +2161,32 @@ implementation
|
||||
op:=opcode;
|
||||
hopsize:=opsize;
|
||||
opcode:=A_MOV;
|
||||
opsize:=reg2opsize(oper[1].reg);
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[0].reg),RS_INVALID,RS_INVALID,unusedregsint);
|
||||
opsize:=reg2opsize(oper[1]^.reg);
|
||||
pos:=get_insert_pos(Tai(previous),getsupreg(oper[0]^.reg),RS_INVALID,RS_INVALID,unusedregsint);
|
||||
rgget(list,pos,subreg,helpreg);
|
||||
helpins:=Taicpu.op_reg_reg(op,hopsize,oper[0].reg,helpreg);
|
||||
helpins:=Taicpu.op_reg_reg(op,hopsize,oper[0]^.reg,helpreg);
|
||||
if pos=nil then
|
||||
list.insertafter(helpins,list.first)
|
||||
else
|
||||
list.insertafter(helpins,pos.next);
|
||||
oper[0].reg:=helpreg;
|
||||
oper[0]^.reg:=helpreg;
|
||||
rgunget(list,helpins,helpreg);
|
||||
forward_allocation(Tai(helpins.next),unusedregsint);
|
||||
end;
|
||||
oper[1].typ:=top_ref;
|
||||
new(oper[1].ref);
|
||||
oper[1].ref^:=spilltemplist[supreg];
|
||||
oper[1]^.typ:=top_ref;
|
||||
new(oper[1]^.ref);
|
||||
oper[1]^.ref^:=spilltemplist[supreg];
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
|
||||
{ The i386 instruction set never gets boring...
|
||||
some opcodes do not support a memory location as destination }
|
||||
if (oper[1].typ=top_ref) and
|
||||
if (oper[1]^.typ=top_ref) and
|
||||
(
|
||||
(oper[0].typ=top_const) or
|
||||
((oper[0].typ=top_reg) and
|
||||
(getregtype(oper[0].reg)=R_INTREGISTER))
|
||||
(oper[0]^.typ=top_const) or
|
||||
((oper[0]^.typ=top_reg) and
|
||||
(getregtype(oper[0]^.reg)=R_INTREGISTER))
|
||||
) then
|
||||
begin
|
||||
case opcode of
|
||||
@ -2205,16 +2208,16 @@ implementation
|
||||
rgget(list,Tai(previous),subreg,helpreg);
|
||||
spill_registers:=true;
|
||||
{First help instruction.}
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,opsize,oper[1].ref^,helpreg);
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,opsize,oper[1]^.ref^,helpreg);
|
||||
if previous=nil then
|
||||
list.insert(helpins)
|
||||
else
|
||||
list.insertafter(helpins,previous);
|
||||
{Second help instruction.}
|
||||
helpins:=Taicpu.op_reg_ref(A_MOV,opsize,helpreg,oper[1].ref^);
|
||||
dispose(oper[1].ref);
|
||||
oper[1].typ:=top_reg;
|
||||
oper[1].reg:=helpreg;
|
||||
helpins:=Taicpu.op_reg_ref(A_MOV,opsize,helpreg,oper[1]^.ref^);
|
||||
dispose(oper[1]^.ref);
|
||||
oper[1]^.typ:=top_reg;
|
||||
oper[1]^.reg:=helpreg;
|
||||
list.insertafter(helpins,self);
|
||||
rgunget(list,self,helpreg);
|
||||
end;
|
||||
@ -2223,9 +2226,9 @@ implementation
|
||||
|
||||
{ The i386 instruction set never gets boring...
|
||||
some opcodes do not support a memory location as source }
|
||||
if (oper[0].typ=top_ref) and
|
||||
(oper[1].typ=top_reg) and
|
||||
(getregtype(oper[1].reg)=R_INTREGISTER) then
|
||||
if (oper[0]^.typ=top_ref) and
|
||||
(oper[1]^.typ=top_reg) and
|
||||
(getregtype(oper[1]^.reg)=R_INTREGISTER) then
|
||||
begin
|
||||
case opcode of
|
||||
A_BT,A_BTS,
|
||||
@ -2245,14 +2248,14 @@ implementation
|
||||
rgget(list,Tai(previous),subreg,helpreg);
|
||||
spill_registers:=true;
|
||||
{First help instruction.}
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,opsize,oper[0].ref^,helpreg);
|
||||
helpins:=Taicpu.op_ref_reg(A_MOV,opsize,oper[0]^.ref^,helpreg);
|
||||
if previous=nil then
|
||||
list.insert(helpins)
|
||||
else
|
||||
list.insertafter(helpins,previous);
|
||||
dispose(oper[0].ref);
|
||||
oper[0].typ:=top_reg;
|
||||
oper[0].reg:=helpreg;
|
||||
dispose(oper[0]^.ref);
|
||||
oper[0]^.typ:=top_reg;
|
||||
oper[0]^.reg:=helpreg;
|
||||
rgunget(list,helpins,helpreg);
|
||||
end;
|
||||
end;
|
||||
@ -2315,7 +2318,10 @@ implementation
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.32 2003-10-17 14:38:32 peter
|
||||
Revision 1.33 2003-10-21 15:15:36 peter
|
||||
* taicpu_abstract.oper[] changed to pointers
|
||||
|
||||
Revision 1.32 2003/10/17 14:38:32 peter
|
||||
* 64k registers supported
|
||||
* fixed some memory leaks
|
||||
|
||||
|
||||
@ -176,8 +176,8 @@ interface
|
||||
AsmWrite(#9+gas_op2str[op]+cond2str[taicpu(hp).condition]);
|
||||
{ suffix needed ? fnstsw,fldcw don't support suffixes
|
||||
with binutils 2.9.5 under linux }
|
||||
{ if (Taicpu(hp).oper[0].typ=top_reg) and
|
||||
(Taicpu(hp).oper[0].reg.enum>lastreg) then
|
||||
{ if (Taicpu(hp).oper[0]^.typ=top_reg) and
|
||||
(Taicpu(hp).oper[0]^.reg.enum>lastreg) then
|
||||
internalerror(200301081);}
|
||||
|
||||
if (not calljmp) and
|
||||
@ -185,8 +185,8 @@ interface
|
||||
(op<>A_FNSTSW) and (op<>A_FSTSW) and
|
||||
(op<>A_FNSTCW) and (op<>A_FSTCW) and
|
||||
(op<>A_FLDCW) and not(
|
||||
(taicpu(hp).oper[0].typ=top_reg) and
|
||||
(getregtype(taicpu(hp).oper[0].reg)=R_FPUREGISTER)
|
||||
(taicpu(hp).oper[0]^.typ=top_reg) and
|
||||
(getregtype(taicpu(hp).oper[0]^.reg)=R_FPUREGISTER)
|
||||
) then
|
||||
AsmWrite(gas_opsize2str[taicpu(hp).opsize]);
|
||||
{ process operands }
|
||||
@ -195,7 +195,7 @@ interface
|
||||
if calljmp then
|
||||
begin
|
||||
AsmWrite(#9);
|
||||
WriteOper_jmp(taicpu(hp).oper[0]);
|
||||
WriteOper_jmp(taicpu(hp).oper[0]^);
|
||||
end
|
||||
else
|
||||
begin
|
||||
@ -205,7 +205,7 @@ interface
|
||||
AsmWrite(#9)
|
||||
else
|
||||
AsmWrite(',');
|
||||
WriteOper(taicpu(hp).oper[i]);
|
||||
WriteOper(taicpu(hp).oper[i]^);
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
@ -289,7 +289,10 @@ initialization
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.8 2003-10-02 21:18:06 peter
|
||||
Revision 1.9 2003-10-21 15:15:36 peter
|
||||
* taicpu_abstract.oper[] changed to pointers
|
||||
|
||||
Revision 1.8 2003/10/02 21:18:06 peter
|
||||
* remove asw
|
||||
|
||||
Revision 1.7 2003/10/01 20:34:50 peter
|
||||
|
||||
@ -661,6 +661,7 @@ begin
|
||||
ai:=taicpu.op_none(opcode,siz);
|
||||
ai.SetOperandOrder(OpOrder);
|
||||
ai.Ops:=Ops;
|
||||
ai.Allocate_oper(Ops);
|
||||
for i:=1to Ops do
|
||||
begin
|
||||
case operands[i].opr.typ of
|
||||
@ -700,7 +701,7 @@ begin
|
||||
asize:=OT_BITS80;
|
||||
end;
|
||||
if asize<>0 then
|
||||
ai.oper[i-1].ot:=(ai.oper[i-1].ot and not OT_SIZE_MASK) or asize;
|
||||
ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
@ -732,7 +733,10 @@ end;
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.10 2003-10-01 20:34:51 peter
|
||||
Revision 1.11 2003-10-21 15:15:36 peter
|
||||
* taicpu_abstract.oper[] changed to pointers
|
||||
|
||||
Revision 1.10 2003/10/01 20:34:51 peter
|
||||
* procinfo unit contains tprocinfo
|
||||
* cginfo renamed to cgbase
|
||||
* moved cgmessage to verbose
|
||||
|
||||
Loading…
Reference in New Issue
Block a user