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* the arm rescheduler has not only to move instructions but also associated register allocations
git-svn-id: trunk@20707 -
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@ -52,7 +52,7 @@ Implementation
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cutils,
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verbose,
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cgbase,cgutils,
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aasmbase,aasmcpu;
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aasmbase,aasmdata,aasmcpu;
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function CanBeCond(p : tai) : boolean;
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begin
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@ -464,9 +464,11 @@ Implementation
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{ TODO : schedule also forward }
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{ TODO : schedule distance > 1 }
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var
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hp1,hp2 : tai;
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hp1,hp2,hp3,hp4 : tai;
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list : TAsmList;
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begin
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result:=true;
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list:=TAsmList.Create;
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p := BlockStart;
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{ UsedRegs := []; }
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while (p <> BlockEnd) Do
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@ -516,16 +518,34 @@ Implementation
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not(RegModifiedByInstruction(taicpu(hp1).oper[1]^.ref^.index,p))
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) then
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begin
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hp3:=tai(p.Previous);
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asml.Remove(p);
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{ if there is a reg. dealloc instruction associated with p, move it together with p }
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while assigned(hp3) and (hp3.typ<>ait_instruction) do
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begin
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if (hp3.typ=ait_regalloc) and (tai_regalloc(hp3).ratype in [ra_dealloc]) and
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RegInInstruction(tai_regalloc(hp3).reg,p) then
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begin
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hp4:=hp3;
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hp3:=tai(hp3.Previous);
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asml.Remove(hp4);
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list.Concat(hp4);
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end
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else
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hp3:=tai(hp3.Previous);
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end;
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list.Concat(p);
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asml.Remove(hp1);
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{$ifdef DEBUG_PREREGSCHEDULER}
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asml.InsertBefore(tai_comment.Create(strpnew('Rescheduled')),hp2);
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{$endif DEBUG_PREREGSCHEDULER}
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asml.InsertBefore(hp1,hp2);
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asml.InsertBefore(p,hp2);
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asml.InsertListBefore(hp2,list);
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end;
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p := tai(p.next)
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end;
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list.Free;
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end;
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