mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-08-25 04:29:10 +02:00
* merged i386/cpubase and x86_64/cpubase to x86/cpubase;
different stuff went to cpubase.inc
This commit is contained in:
florian
parent
6aa01a99a9
commit
98d09473e4
@ -63,10 +63,6 @@
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'xmm0','xmm1','xmm2','xmm3','xmm4','xmm5','xmm6','xmm7'
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);
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{*****************************************************************************
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Constants
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*****************************************************************************}
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firstsaveintreg = RS_EAX;
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lastsaveintreg = RS_EDX;
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firstsavefpureg = R_NO;
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@ -74,34 +70,6 @@
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firstsavemmreg = R_MM0;
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lastsavemmreg = R_MM7;
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general_registers = [R_EAX,R_EBX,R_ECX,R_EDX];
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general_superregisters = [RS_EAX,RS_EBX,RS_ECX,RS_EDX];
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{$ifdef newra}
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usableregsint = [first_imreg..last_imreg];
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{$else}
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usableregsint = [RS_EAX,RS_EBX,RS_ECX,RS_EDX];
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{$endif}
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c_countusableregsint = 4;
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maxaddrregs = 1;
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addrregs = [R_ESI];
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usableregsaddr = [RS_ESI];
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c_countusableregsaddr = 1;
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maxvarregs = 4;
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varregs : array[1..maxvarregs] of Toldregister =
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(R_EBX,R_EDX,R_ECX,R_EAX);
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maxfpuvarregs = 8;
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{# Registers which are defined as scratch and no need to save across
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routine calls or in assembler blocks.
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}
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{$ifndef newra}
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max_scratch_regs = 1;
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scratch_regs : array[1..max_scratch_regs] of Tsuperregister = (RS_EDI);
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{$endif}
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{*****************************************************************************
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GDB Information
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*****************************************************************************}
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@ -202,10 +170,7 @@
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{
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$Log$
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Revision 1.2 2002-04-25 16:12:09 florian
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* fixed more problems with cpubase and x86-64
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Revision 1.1 2003/04/25 11:12:09 florian
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Revision 1.1 2003-04-25 11:12:09 florian
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* merged i386/cpubase and x86_64/cpubase to x86/cpubase;
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different stuff went to cpubase.inc
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}
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}
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File diff suppressed because it is too large
Load Diff
@ -128,34 +128,6 @@ uses
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{Super register numbers:}
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const
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{$ifdef x86_64}
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RS_SPECIAL = $00; {Special register}
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RS_RAX = $01; {EAX}
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RS_RBX = $02; {EBX}
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RS_RCX = $03; {ECX}
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RS_RDX = $04; {EDX}
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RS_RSI = $05; {ESI}
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RS_RDI = $06; {EDI}
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RS_RBP = $07; {EBP}
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RS_RSP = $08; {ESP}
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RS_R8 = $09; {R8}
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RS_R9 = $0a; {R9}
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RS_R10 = $0b; {R10}
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RS_R11 = $0c; {R11}
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RS_R12 = $0d; {R12}
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RS_R13 = $0e; {R13}
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RS_R14 = $0f; {R14}
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RS_R15 = $10; {R15}
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{ create aliases to allow code sharing between x86-64 and i386 }
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RS_EAX = RS_RAX;
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RS_EBX = RS_RBX;
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RS_ECX = RS_RCX;
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RS_EDX = RS_RDX;
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RS_ESI = RS_RSI;
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RS_EDI = RS_RDI;
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RS_EBP = RS_RBP;
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RS_ESP = RS_RSP;
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{$else x86_64}
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RS_SPECIAL = $00; {Special register}
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RS_EAX = $01; {EAX}
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RS_EBX = $02; {EBX}
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@ -165,7 +137,14 @@ uses
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RS_EDI = $06; {EDI}
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RS_EBP = $07; {EBP}
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RS_ESP = $08; {ESP}
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{$endif x86_64}
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RS_R8 = $09; {R8}
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RS_R9 = $0a; {R9}
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RS_R10 = $0b; {R10}
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RS_R11 = $0c; {R11}
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RS_R12 = $0d; {R12}
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RS_R13 = $0e; {R13}
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RS_R14 = $0f; {R14}
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RS_R15 = $10; {R15}
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{Number of first and last superregister.}
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@ -486,6 +465,9 @@ uses
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ALL_REGISTERS = [firstreg..lastreg];
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ALL_INTREGISTERS = [1..255];
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general_registers = [R_EAX,R_EBX,R_ECX,R_EDX];
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general_superregisters = [RS_EAX,RS_EBX,RS_ECX,RS_EDX];
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{# low and high of the available maximum width integer general purpose }
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{ registers }
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LoGPReg = R_EAX;
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@ -510,6 +492,12 @@ uses
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maxintregs = 4;
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intregs = [R_EAX..R_BL]-[R_ESI,R_SI];
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{$ifdef newra}
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usableregsint = [first_imreg..last_imreg];
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{$else}
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usableregsint = [RS_EAX,RS_EBX,RS_ECX,RS_EDX];
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{$endif}
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c_countusableregsint = 4;
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maxfpuregs = 8;
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fpuregs = [R_ST0..R_ST7];
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@ -520,6 +508,25 @@ uses
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usableregsmm = [R_MM0..R_MM7];
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c_countusableregsmm = 8;
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maxaddrregs = 1;
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addrregs = [R_ESI];
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usableregsaddr = [RS_ESI];
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c_countusableregsaddr = 1;
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maxvarregs = 4;
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varregs : array[1..maxvarregs] of Toldregister =
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(R_EBX,R_EDX,R_ECX,R_EAX);
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maxfpuvarregs = 8;
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{# Registers which are defined as scratch and no need to save across
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routine calls or in assembler blocks.
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}
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{$ifndef newra}
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max_scratch_regs = 1;
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scratch_regs : array[1..max_scratch_regs] of Tsuperregister = (RS_EDI);
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{$endif}
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{*****************************************************************************
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CPU Dependent Constants
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*****************************************************************************}
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@ -707,14 +714,7 @@ implementation
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end.
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{
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$Log$
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Revision 1.3 2002-04-25 20:15:40 florian
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* block nodes within expressions shouldn't release the used registers,
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fixed using a flag till the new rg is ready
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Revision 1.2 2002/04/25 16:12:09 florian
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* fixed more problems with cpubase and x86-64
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Revision 1.1 2003/04/25 11:12:09 florian
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Revision 1.1 2003-04-25 11:12:09 florian
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* merged i386/cpubase and x86_64/cpubase to x86/cpubase;
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different stuff went to cpubase.inc
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@ -81,34 +81,7 @@ const
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firstsavemmreg = R_XMM0;
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lastsavemmreg = R_XMM15;
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general_registers = [R_EAX,R_EBX,R_ECX,R_EDX];
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general_superregisters = [RS_RAX,RS_RBX,RS_RCX,RS_RDX];
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{$ifdef newra}
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usableregsint = [first_imreg..last_imreg];
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{$else}
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usableregsint = [RS_RAX,RS_RBX,RS_RCX,RS_RDX];
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{$endif}
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c_countusableregsint = 4;
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maxaddrregs = 1;
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addrregs = [R_ESI];
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usableregsaddr = [RS_RSI];
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c_countusableregsaddr = 1;
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maxvarregs = 4;
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varregs : array[1..maxvarregs] of Toldregister =
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(R_EBX,R_EDX,R_ECX,R_EAX);
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maxfpuvarregs = 8;
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{# Registers which are defined as scratch and no need to save across
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routine calls or in assembler blocks.
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}
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{$ifndef newra}
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max_scratch_regs = 1;
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scratch_regs : array[1..max_scratch_regs] of Tsuperregister = (RS_RDI);
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{$endif}
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{*****************************************************************************
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Default generic sizes
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*****************************************************************************}
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@ -126,33 +99,28 @@ const
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Generic Register names
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*****************************************************************************}
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{# Stack pointer register }
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stack_pointer_reg = R_RSP;
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NR_STACK_POINTER_REG = NR_RSP;
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{# Frame pointer register }
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frame_pointer_reg = R_RBP;
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NR_FRAME_POINTER_REG = NR_RBP;
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{ Register for addressing absolute data in a position independant way,
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such as in PIC code. The exact meaning is ABI specific. For
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further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
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}
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pic_offset_reg = R_EBX;
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accumulator = R_RAX;
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RS_ACCUMULATOR = RS_RAX;
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NR_ACCUMULATOR = NR_RAX;
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{ the return_result_reg, is used inside the called function to store its return
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value when that is a scalar value otherwise a pointer to the address of the
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result is placed inside it }
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return_result_reg = accumulator;
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RS_RETURN_RESULT_REG = RS_ACCUMULATOR;
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NR_RETURN_RESULT_REG = NR_ACCUMULATOR;
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{ location of function results }
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{ the function_result_reg contains the function result after a call to a scalar
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function othewise it contains a pointer to the returned result}
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function_result_reg = accumulator;
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stack_pointer_reg = R_RSP;
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frame_pointer_reg = R_RBP;
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self_pointer_reg = R_RSI;
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accumulator = R_RAX;
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{ the return_result_reg, is used inside the called function to store its return
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value when that is a scalar value otherwise a pointer to the address of the
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result is placed inside it }
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return_result_reg = accumulator;
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fpu_result_reg = R_ST;
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mmresultreg = R_MM0;
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{ the function_result_reg contains the function result after a call to a scalar
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function othewise it contains a pointer to the returned result}
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function_result_reg = accumulator;
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accumulatorhigh = R_RDX;
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{ the register where the vmt offset is passed to the destructor }
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{ helper routine }
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vmt_offset_reg = R_RDI;
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resultreg = R_RAX;
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resultreg64 = R_RAX;
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fpu_result_reg = R_ST;
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{*****************************************************************************
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GCC /ABI linking information
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@ -178,10 +146,7 @@ const
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{
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$Log$
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Revision 1.2 2002-04-25 16:12:09 florian
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* fixed more problems with cpubase and x86-64
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Revision 1.1 2003/04/25 11:12:09 florian
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Revision 1.1 2003-04-25 11:12:09 florian
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* merged i386/cpubase and x86_64/cpubase to x86/cpubase;
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different stuff went to cpubase.inc
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}
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@ -1,531 +0,0 @@
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{
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$Id$
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Copyright (c) 1998-2000 by Florian Klaempfl and Peter Vreman
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Contains the basic declarations for the x86-64 architecture
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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||||
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||||
You should have received a copy of the GNU General Public License
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||||
along with this program; if not, write to the Free Software
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||||
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{ This unit contains the basic declarations for the x86-64 architecture.
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}
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unit cpubase;
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{$i fpcdefs.inc}
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interface
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uses
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globals,cutils,cclasses,
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aasmbase,
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cpuinfo,
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cginfo;
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{*****************************************************************************
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Assembler Opcodes
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*****************************************************************************}
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type
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TAsmOp={$i x86_64op.inc}
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{ This should define the array of instructions as string }
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op2strtable=array[tasmop] of string[11];
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Const
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{ First value of opcode enumeration }
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firstop = low(tasmop);
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{ Last value of opcode enumeration }
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lastop = high(tasmop);
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{*****************************************************************************
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Operand Sizes
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*****************************************************************************}
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type
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topsize = (S_NO,
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S_B,S_W,S_L,S_BW,S_BL,S_WL,S_BQ,S_WQ,S_LQ,
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S_IS,S_IL,S_IQ,
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S_FS,S_FL,S_FX,S_D,S_Q,S_FV,S_FXX,
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S_NEAR,S_FAR,S_SHORT
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);
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{*****************************************************************************
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Registers
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*****************************************************************************}
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type
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{ don't change the order }
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{ it's used by the register size conversions }
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{ Enumeration of all registers of the CPU }
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tregister = (R_NO,
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R_RAX,R_RCX,R_RDX,R_RBX,R_RSP,R_RBP,R_RSI,R_RDI,
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R_R8,R_R9,R_R10,R_R11,R_R12,R_R13,R_R14,R_R15,R_RIP,
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R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,
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R_R8D,R_R9D,R_R10D,R_R11D,R_R12D,R_R13D,R_R14D,R_R15D,
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R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,
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R_R8W,R_R9W,R_R10W,R_R11W,R_R12W,R_R13W,R_R14W,R_R15W,
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R_AL,R_CL,R_DL,R_BL,R_SPL,R_BPL,R_SIL,R_DIL,
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||||
R_R8B,R_R9B,R_R10B,R_R11B,R_R12B,R_R13B,R_R14B,R_R15B,
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R_AH,R_CH,R_BH,R_DH,
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R_CS,R_DS,R_ES,R_SS,R_FS,R_GS,
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R_ST,R_ST0,R_ST1,R_ST2,R_ST3,R_ST4,R_ST5,R_ST6,R_ST7,
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R_DR0,R_DR1,R_DR2,R_DR3,R_DR6,R_DR7,
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R_CR0,R_CR2,R_CR3,R_CR4,
|
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R_TR3,R_TR4,R_TR5,R_TR6,R_TR7,
|
||||
R_MM0,R_MM1,R_MM2,R_MM3,R_MM4,R_MM5,R_MM6,R_MM7,
|
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R_XMM0,R_XMM1,R_XMM2,R_XMM3,R_XMM4,R_XMM5,R_XMM6,R_XMM7,
|
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R_XMM8,R_XMM9,R_XMM10,R_XMM11,R_XMM12,R_XMM13,R_XMM14,R_XMM15
|
||||
);
|
||||
|
||||
{ A type to store register locations for 64 Bit values. }
|
||||
tregister64 = tregister;
|
||||
|
||||
{ alias for compact code }
|
||||
treg64 = tregister64;
|
||||
|
||||
{ Set type definition for registers }
|
||||
tregisterset = set of tregister;
|
||||
|
||||
{ Type definition for the array of string of register names }
|
||||
reg2strtable = array[tregister] of string[6];
|
||||
|
||||
const
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||||
firstreg = low(tregister);
|
||||
lastreg = high(tregister);
|
||||
|
||||
firstsreg = R_CS;
|
||||
lastsreg = R_GS;
|
||||
|
||||
regset8bit : tregisterset = [R_AL..R_DH];
|
||||
regset16bit : tregisterset = [R_AX..R_DI,R_CS..R_SS];
|
||||
regset32bit : tregisterset = [R_EAX..R_EDI];
|
||||
|
||||
{ Convert reg to opsize }
|
||||
reg2opsize:array[firstreg..lastreg] of topsize = (S_NO,
|
||||
S_Q,S_Q,S_Q,S_Q,S_Q,S_Q,S_Q,S_Q,
|
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S_Q,S_Q,S_Q,S_Q,S_Q,S_Q,S_Q,S_Q,S_Q,
|
||||
S_L,S_L,S_L,S_L,S_L,S_L,S_L,S_L,
|
||||
S_L,S_L,S_L,S_L,S_L,S_L,S_L,S_L,
|
||||
S_W,S_W,S_W,S_W,S_W,S_W,S_W,S_W,
|
||||
S_W,S_W,S_W,S_W,S_W,S_W,S_W,S_W,
|
||||
S_B,S_B,S_B,S_B,S_B,S_B,S_B,S_B,
|
||||
S_B,S_B,S_B,S_B,S_B,S_B,S_B,S_B,
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S_B,S_B,S_B,S_B,
|
||||
S_W,S_W,S_W,S_W,S_W,S_W,
|
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S_FL,S_FL,S_FL,S_FL,S_FL,S_FL,S_FL,S_FL,S_FL,
|
||||
S_L,S_L,S_L,S_L,S_L,S_L,
|
||||
S_L,S_L,S_L,S_L,
|
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S_L,S_L,S_L,S_L,S_L,
|
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S_D,S_D,S_D,S_D,S_D,S_D,S_D,S_D,
|
||||
S_D,S_D,S_D,S_D,S_D,S_D,S_D,S_D,
|
||||
S_D,S_D,S_D,S_D,S_D,S_D,S_D,S_D
|
||||
);
|
||||
|
||||
{ Standard opcode string table (for each tasmop enumeration). The
|
||||
opcode strings should conform to the names as defined by the
|
||||
processor manufacturer.
|
||||
}
|
||||
std_op2str:op2strtable={$i x86_64in.inc}
|
||||
|
||||
{ Standard register table (for each tregister enumeration). The
|
||||
register strings should conform to the the names as defined
|
||||
by the processor manufacturer
|
||||
}
|
||||
std_reg2str : reg2strtable = ('',
|
||||
'rax','rcx','rdx','rbx','rsp','rbp','rsi','rdi',
|
||||
'r8','r9','r10','r11','r12','r13','r14','r15','rip',
|
||||
'eax','ecx','edx','ebx','esp','ebp','esi','edi',
|
||||
'r8d','r9d','r10d','r11d','r12d','r13d','r14d','r15d',
|
||||
'ax','cx','dx','bx','sp','bp','si','di',
|
||||
'r8w','r9w','r10w','r11w','r12w','r13w','r14w','r15w',
|
||||
'al','cl','dl','bl','spl','bpl','sil','dil',
|
||||
'r8b','r9b','r10b','r11b','r12b','r13b','r14b','r15b',
|
||||
'ah','ch','bh','dh',
|
||||
'cs','ds','es','ss','fs','gs',
|
||||
'st','st(0)','st(1)','st(2)','st(3)','st(4)','st(5)','st(6)','st(7)',
|
||||
'dr0','dr1','dr2','dr3','dr6','dr7',
|
||||
'cr0','cr2','cr3','cr4',
|
||||
'tr3','tr4','tr5','tr6','tr7',
|
||||
'mm0','mm1','mm2','mm3','mm4','mm5','mm6','mm7',
|
||||
'xmm0','xmm1','xmm2','xmm3','xmm4','xmm5','xmm6','xmm7',
|
||||
'xmm8','xmm9','xmm10','xmm11','xmm12','xmm13','xmm14','xmm15');
|
||||
|
||||
{*****************************************************************************
|
||||
Conditions
|
||||
*****************************************************************************}
|
||||
|
||||
type
|
||||
TAsmCond=(C_None,
|
||||
C_A,C_AE,C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_NA,C_NAE,
|
||||
C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_NO,C_NP,
|
||||
C_NS,C_NZ,C_O,C_P,C_PE,C_PO,C_S,C_Z
|
||||
);
|
||||
|
||||
const
|
||||
cond2str:array[TAsmCond] of string[3]=('',
|
||||
'a','ae','b','be','c','e','g','ge','l','le','na','nae',
|
||||
'nb','nbe','nc','ne','ng','nge','nl','nle','no','np',
|
||||
'ns','nz','o','p','pe','po','s','z'
|
||||
);
|
||||
inverse_cond:array[TAsmCond] of TAsmCond=(C_None,
|
||||
C_NA,C_NAE,C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_A,C_AE,
|
||||
C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_O,C_P,
|
||||
C_S,C_Z,C_NO,C_NP,C_NP,C_P,C_NS,C_NZ
|
||||
);
|
||||
|
||||
|
||||
{*****************************************************************************
|
||||
Flags
|
||||
*****************************************************************************}
|
||||
|
||||
type
|
||||
TResFlags = (F_E,F_NE,F_G,F_L,F_GE,F_LE,F_C,F_NC,F_A,F_AE,F_B,F_BE);
|
||||
|
||||
{*****************************************************************************
|
||||
Reference
|
||||
*****************************************************************************}
|
||||
|
||||
type
|
||||
trefoptions=(ref_none,ref_parafixup,ref_localfixup,ref_selffixup);
|
||||
|
||||
{ immediate/reference record }
|
||||
preference = ^treference;
|
||||
treference = packed record
|
||||
offset : longint;
|
||||
symbol : tasmsymbol;
|
||||
offsetfixup : longint;
|
||||
segment,
|
||||
base,
|
||||
index : tregister;
|
||||
scalefactor : byte;
|
||||
options : trefoptions;
|
||||
alignment : byte;
|
||||
end;
|
||||
|
||||
{ reference record }
|
||||
pparareference = ^tparareference;
|
||||
tparareference = packed record
|
||||
index : tregister;
|
||||
offset : longint;
|
||||
end;
|
||||
|
||||
{*****************************************************************************
|
||||
Operands
|
||||
*****************************************************************************}
|
||||
|
||||
{ Types of operand }
|
||||
toptype=(top_none,top_reg,top_ref,top_const,top_symbol);
|
||||
|
||||
toper=record
|
||||
ot : longint;
|
||||
case typ : toptype of
|
||||
top_none : ();
|
||||
top_reg : (reg:tregister);
|
||||
top_ref : (ref:preference);
|
||||
top_const : (val:longint);
|
||||
top_symbol : (sym:tasmsymbol;symofs:longint);
|
||||
end;
|
||||
|
||||
{*****************************************************************************
|
||||
Generic Location
|
||||
*****************************************************************************}
|
||||
|
||||
type
|
||||
TLoc=(
|
||||
{ added for tracking problems}
|
||||
LOC_INVALID,
|
||||
{ contant }
|
||||
LOC_CONSTANT,
|
||||
{ in a processor register }
|
||||
LOC_REGISTER,
|
||||
{ in memory }
|
||||
LOC_CREFERENCE,
|
||||
{ like LOC_MEM, but lvalue }
|
||||
LOC_REFERENCE,
|
||||
{ boolean results only, jump to false or true label }
|
||||
LOC_JUMP,
|
||||
{ boolean results only, flags are set }
|
||||
LOC_FLAGS,
|
||||
{ Constant register which shouldn't be modified }
|
||||
LOC_CREGISTER,
|
||||
{ MMX register }
|
||||
LOC_MMXREGISTER,
|
||||
{ Constant MMX register }
|
||||
LOC_CMMXREGISTER,
|
||||
{ FPU stack }
|
||||
LOC_FPUREGISTER,
|
||||
{ if it is a FPU register variable on the fpu stack }
|
||||
LOC_CFPUREGISTER,
|
||||
LOC_MMREGISTER,
|
||||
LOC_CMMREGISTER
|
||||
);
|
||||
|
||||
{ tparamlocation describes where a parameter for a procedure is stored.
|
||||
References are given from the caller's point of view. The usual
|
||||
TLocation isn't used, because contains a lot of unnessary fields.
|
||||
}
|
||||
tparalocation = packed record
|
||||
loc : TLoc;
|
||||
sp_fixup : longint;
|
||||
size : TCGSize;
|
||||
case TLoc of
|
||||
LOC_REFERENCE : (reference : tparareference);
|
||||
{ segment in reference at the same place as in loc_register }
|
||||
LOC_REGISTER,LOC_CREGISTER : (
|
||||
case longint of
|
||||
1 : (register,registerhigh : tregister);
|
||||
{ overlay a registerlow }
|
||||
2 : (registerlow : tregister);
|
||||
{ overlay a 64 Bit register type }
|
||||
3 : (reg64 : tregister64);
|
||||
4 : (register64 : tregister64);
|
||||
);
|
||||
{ it's only for better handling }
|
||||
LOC_MMXREGISTER,LOC_CMMXREGISTER : (mmxreg : tregister);
|
||||
end;
|
||||
|
||||
plocation = ^tlocation;
|
||||
tlocation = packed record
|
||||
loc : tloc;
|
||||
size : TCGSize;
|
||||
case TLoc of
|
||||
LOC_FLAGS : (resflags : tresflags);
|
||||
LOC_CONSTANT : (
|
||||
case longint of
|
||||
1 : (value : AWord);
|
||||
2 : (valuelow, valuehigh:AWord);
|
||||
{ overlay a complete 64 Bit value }
|
||||
3 : (valueqword : qword);
|
||||
);
|
||||
LOC_CREFERENCE,LOC_REFERENCE : (reference : treference);
|
||||
{ segment in reference at the same place as in loc_register }
|
||||
LOC_REGISTER,LOC_CREGISTER : (
|
||||
case longint of
|
||||
1 : (register,segment,registerhigh : tregister);
|
||||
{ overlay a registerlow }
|
||||
2 : (registerlow : tregister);
|
||||
{ overlay a 64 Bit register type }
|
||||
3 : (reg64 : tregister64);
|
||||
4 : (register64 : tregister64);
|
||||
);
|
||||
{ it's only for better handling }
|
||||
LOC_MMXREGISTER,LOC_CMMXREGISTER : (mmxreg : tregister);
|
||||
end;
|
||||
|
||||
{*****************************************************************************
|
||||
Constants
|
||||
*****************************************************************************}
|
||||
|
||||
const
|
||||
max_operands = 3;
|
||||
|
||||
lvaluelocations = [LOC_REFERENCE,LOC_CFPUREGISTER,
|
||||
LOC_CREGISTER,LOC_MMXREGISTER,LOC_CMMXREGISTER];
|
||||
|
||||
ALL_REGISTERS = [R_EAX..R_XMM15];
|
||||
|
||||
general_registers = [R_EAX,R_EBX,R_ECX,R_EDX];
|
||||
|
||||
{ low and high of the available maximum width integer general purpose }
|
||||
{ registers }
|
||||
LoGPReg = R_EAX;
|
||||
HiGPReg = R_EDI;
|
||||
|
||||
{ low and high of every possible width general purpose register (same as }
|
||||
{ above on most architctures apart from the 80x86) }
|
||||
LoReg = R_EAX;
|
||||
HiReg = R_BL;
|
||||
|
||||
intregs = general_registers;
|
||||
|
||||
maxvarregs = 4;
|
||||
varregs : array[1..maxvarregs] of tregister =
|
||||
(R_EBX,R_EDX,R_ECX,R_EAX);
|
||||
|
||||
usableregsint = [R_EAX,R_EBX,R_ECX,R_EDX];
|
||||
c_countusableregsint = 4;
|
||||
|
||||
maxfpuvarregs = 16;
|
||||
|
||||
maxintregs = maxvarregs;
|
||||
maxfpuregs = maxfpuvarregs;
|
||||
|
||||
fpuregs = [R_ST0..R_ST7];
|
||||
usableregsfpu = [];
|
||||
c_countusableregsfpu = 0;
|
||||
|
||||
mmregs = [R_MM0..R_MM7];
|
||||
usableregsmm = [R_XMM0..R_XMM15];
|
||||
c_countusableregsmm = 8;
|
||||
|
||||
{ no distinction on this platform }
|
||||
maxaddrregs = 0;
|
||||
addrregs = [];
|
||||
usableregsaddr = [];
|
||||
c_countusableregsaddr = 0;
|
||||
|
||||
|
||||
firstsaveintreg = R_EAX;
|
||||
lastsaveintreg = R_R15;
|
||||
firstsavefpureg = R_NO;
|
||||
lastsavefpureg = R_NO;
|
||||
firstsavemmreg = R_XMM0;
|
||||
lastsavemmreg = R_XMM15;
|
||||
|
||||
registers_saved_on_cdecl = [R_ESI,R_EDI,R_EBX];
|
||||
|
||||
scratch_regs : array[1..1] of tregister = (R_EDI);
|
||||
|
||||
|
||||
{*****************************************************************************
|
||||
Default generic sizes
|
||||
*****************************************************************************}
|
||||
{ Defines the default address size for a processor, }
|
||||
OS_ADDR = OS_32;
|
||||
{ the natural int size for a processor, }
|
||||
OS_INT = OS_32;
|
||||
{ the maximum float size for a processor, }
|
||||
OS_FLOAT = OS_F80;
|
||||
{ the size of a vector register for a processor }
|
||||
OS_VECTOR = OS_M64;
|
||||
|
||||
cpuflags = [];
|
||||
|
||||
{ sizes }
|
||||
pointersize = 8;
|
||||
extended_size = 10;
|
||||
sizepostfix_pointer = S_L;
|
||||
|
||||
|
||||
{*****************************************************************************
|
||||
Generic Register names
|
||||
*****************************************************************************}
|
||||
|
||||
{ location of function results }
|
||||
|
||||
stack_pointer_reg = R_RSP;
|
||||
frame_pointer_reg = R_RBP;
|
||||
self_pointer_reg = R_RSI;
|
||||
accumulator = R_RAX;
|
||||
{the return_result_reg, is used inside the called function to store its return
|
||||
value when that is a scalar value otherwise a pointer to the address of the
|
||||
result is placed inside it}
|
||||
return_result_reg = accumulator;
|
||||
|
||||
{the function_result_reg contains the function result after a call to a scalar
|
||||
function othewise it contains a pointer to the returned result}
|
||||
function_result_reg = accumulator;
|
||||
accumulatorhigh = R_RDX;
|
||||
{ the register where the vmt offset is passed to the destructor }
|
||||
{ helper routine }
|
||||
vmt_offset_reg = R_RDI;
|
||||
|
||||
resultreg = R_RAX;
|
||||
resultreg64 = R_RAX;
|
||||
fpu_result_reg = R_ST;
|
||||
|
||||
{*****************************************************************************
|
||||
GCC /ABI linking information
|
||||
*****************************************************************************}
|
||||
|
||||
const
|
||||
{ Registers which must be saved when calling a routine declared as
|
||||
cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
|
||||
saved should be the ones as defined in the target ABI and / or GCC.
|
||||
|
||||
This value can be deduced from the CALLED_USED_REGISTERS array in the
|
||||
GCC source.
|
||||
}
|
||||
std_saved_registers = [R_ESI,R_EDI,R_EBX];
|
||||
{ Required parameter alignment when calling a routine declared as
|
||||
stdcall and cdecl. The alignment value should be the one defined
|
||||
by GCC or the target ABI.
|
||||
|
||||
The value of this constant is equal to the constant
|
||||
PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
|
||||
}
|
||||
std_param_align = 8;
|
||||
|
||||
{*****************************************************************************
|
||||
Helpers
|
||||
*****************************************************************************}
|
||||
|
||||
function is_calljmp(o:tasmop):boolean;
|
||||
|
||||
function flags_to_cond(const f: TResFlags) : TAsmCond;
|
||||
|
||||
|
||||
implementation
|
||||
|
||||
{*****************************************************************************
|
||||
Helpers
|
||||
*****************************************************************************}
|
||||
|
||||
function is_calljmp(o:tasmop):boolean;
|
||||
begin
|
||||
case o of
|
||||
A_CALL,
|
||||
A_JCXZ,
|
||||
A_JECXZ,
|
||||
A_JMP,
|
||||
A_LOOP,
|
||||
A_LOOPE,
|
||||
A_LOOPNE,
|
||||
A_LOOPNZ,
|
||||
A_LOOPZ,
|
||||
A_Jcc :
|
||||
is_calljmp:=true;
|
||||
else
|
||||
is_calljmp:=false;
|
||||
end;
|
||||
end;
|
||||
|
||||
|
||||
function flags_to_cond(const f: TResFlags) : TAsmCond;
|
||||
const
|
||||
flags_2_cond : array[TResFlags] of TAsmCond =
|
||||
(C_E,C_NE,C_G,C_L,C_GE,C_LE,C_C,C_NC,C_A,C_AE,C_B,C_BE);
|
||||
begin
|
||||
result := flags_2_cond[f];
|
||||
end;
|
||||
|
||||
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.6 2003-02-02 19:25:54 carl
|
||||
* Several bugfixes for m68k target (register alloc., opcode emission)
|
||||
+ VIS target
|
||||
+ Generic add more complete (still not verified)
|
||||
|
||||
Revision 1.5 2003/01/05 13:36:54 florian
|
||||
* x86-64 compiles
|
||||
+ very basic support for float128 type (x86-64 only)
|
||||
|
||||
Revision 1.4 2002/11/17 18:26:16 mazen
|
||||
* fixed a compilation bug accmulator-->accumulator, in definition of return_result_reg
|
||||
|
||||
Revision 1.3 2002/11/17 17:49:09 mazen
|
||||
+ return_result_reg and function_result_reg are now used, in all plateforms, to pass functions result between called function and its caller. See the explanation of each one
|
||||
|
||||
Revision 1.2 2002/07/25 22:55:33 florian
|
||||
* several fixes, small test units can be compiled
|
||||
|
||||
Revision 1.1 2002/07/24 22:38:15 florian
|
||||
+ initial release of x86-64 target code
|
||||
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user