mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-11-23 16:49:37 +01:00
* i8086 far data model fixes in the copying of openarray value params
git-svn-id: trunk@27470 -
This commit is contained in:
parent
c0709eef40
commit
9da1ee0138
@ -1869,7 +1869,7 @@ unit cgcpu;
|
|||||||
|
|
||||||
{ Allocate SI and load it with source }
|
{ Allocate SI and load it with source }
|
||||||
getcpuregister(list,NR_SI);
|
getcpuregister(list,NR_SI);
|
||||||
if (ref.segment=NR_NO) or
|
if ((ref.segment=NR_NO) and (segment_regs_equal(NR_SS,NR_DS) or (ref.base<>NR_BP))) or
|
||||||
(is_segment_reg(ref.segment) and segment_regs_equal(ref.segment,NR_DS)) then
|
(is_segment_reg(ref.segment) and segment_regs_equal(ref.segment,NR_DS)) then
|
||||||
begin
|
begin
|
||||||
a_loadaddr_ref_reg(list,ref,NR_SI);
|
a_loadaddr_ref_reg(list,ref,NR_SI);
|
||||||
@ -1880,7 +1880,12 @@ unit cgcpu;
|
|||||||
hlcg.a_loadaddr_ref_reg(list,voidnearpointertype,voidnearpointertype,ref,NR_SI);
|
hlcg.a_loadaddr_ref_reg(list,voidnearpointertype,voidnearpointertype,ref,NR_SI);
|
||||||
list.concat(taicpu.op_reg(A_PUSH,S_W,NR_DS));
|
list.concat(taicpu.op_reg(A_PUSH,S_W,NR_DS));
|
||||||
saved_ds:=true;
|
saved_ds:=true;
|
||||||
list.concat(taicpu.op_reg(A_PUSH,S_W,ref.segment));
|
if ref.segment<>NR_NO then
|
||||||
|
list.concat(taicpu.op_reg(A_PUSH,S_W,ref.segment))
|
||||||
|
else if ref.base=NR_BP then
|
||||||
|
list.concat(taicpu.op_reg(A_PUSH,S_W,NR_SS))
|
||||||
|
else
|
||||||
|
internalerror(2014040403);
|
||||||
list.concat(taicpu.op_reg(A_POP,S_W,NR_DS));
|
list.concat(taicpu.op_reg(A_POP,S_W,NR_DS));
|
||||||
end;
|
end;
|
||||||
|
|
||||||
@ -1928,6 +1933,8 @@ unit cgcpu;
|
|||||||
{ patch the new address, but don't use a_load_reg_reg, that will add a move instruction
|
{ patch the new address, but don't use a_load_reg_reg, that will add a move instruction
|
||||||
that can confuse the reg allocator }
|
that can confuse the reg allocator }
|
||||||
list.concat(Taicpu.Op_reg_reg(A_MOV,S_W,NR_SP,destreg));
|
list.concat(Taicpu.Op_reg_reg(A_MOV,S_W,NR_SP,destreg));
|
||||||
|
if current_settings.x86memorymodel in x86_far_data_models then
|
||||||
|
list.concat(Taicpu.Op_reg_reg(A_MOV,S_W,NR_SS,GetNextReg(destreg)));
|
||||||
end;
|
end;
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -625,13 +625,13 @@ implementation
|
|||||||
hsym:=tparavarsym(get_high_value_sym(tparavarsym(p)));
|
hsym:=tparavarsym(get_high_value_sym(tparavarsym(p)));
|
||||||
if not assigned(hsym) then
|
if not assigned(hsym) then
|
||||||
internalerror(200306061);
|
internalerror(200306061);
|
||||||
hreg:=cg.getaddressregister(list);
|
sizedef:=getpointerdef(tparavarsym(p).vardef);
|
||||||
|
hreg:=hlcg.getaddressregister(list,sizedef);
|
||||||
if not is_packed_array(tparavarsym(p).vardef) then
|
if not is_packed_array(tparavarsym(p).vardef) then
|
||||||
hlcg.g_copyvaluepara_openarray(list,href,hsym.initialloc,tarraydef(tparavarsym(p).vardef),hreg)
|
hlcg.g_copyvaluepara_openarray(list,href,hsym.initialloc,tarraydef(tparavarsym(p).vardef),hreg)
|
||||||
else
|
else
|
||||||
internalerror(2006080401);
|
internalerror(2006080401);
|
||||||
// cg.g_copyvaluepara_packedopenarray(list,href,hsym.intialloc,tarraydef(tparavarsym(p).vardef).elepackedbitsize,hreg);
|
// cg.g_copyvaluepara_packedopenarray(list,href,hsym.intialloc,tarraydef(tparavarsym(p).vardef).elepackedbitsize,hreg);
|
||||||
sizedef:=getpointerdef(tparavarsym(p).vardef);
|
|
||||||
hlcg.a_load_reg_loc(list,sizedef,sizedef,hreg,tparavarsym(p).initialloc);
|
hlcg.a_load_reg_loc(list,sizedef,sizedef,hreg,tparavarsym(p).initialloc);
|
||||||
end;
|
end;
|
||||||
end
|
end
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user