+ support RV32E Extension

This commit is contained in:
florian 2022-07-17 22:14:13 +02:00
parent 399e699b72
commit a16f35dcb1
4 changed files with 25 additions and 14 deletions

View File

@ -233,8 +233,8 @@ unit agrvgas;
const
arch_str: array[boolean,tcputype] of string[10] = (
{$ifdef RISCV32}
('','rv32imac','rv32ima','rv32im','rv32i'),
('','rv32imafdc','rv32imafd','rv32imfd','rv32ifd')
('','rv32imac','rv32ima','rv32im','rv32i','rv32e'),
('','rv32imafdc','rv32imafd','rv32imfd','rv32ifd','rv32efd')
{$endif RISCV32}
{$ifdef RISCV64}
('','rv64imac','rv64ima','rv64im','rv64i'),

View File

@ -73,13 +73,21 @@ unit cgcpu;
procedure tcgrv32.init_register_allocators;
begin
inherited init_register_allocators;
rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
[RS_X10,RS_X11,RS_X12,RS_X13,RS_X14,RS_X15,RS_X16,RS_X17,
RS_X31,RS_X30,RS_X29,RS_X28,
RS_X5,RS_X6,RS_X7,
RS_X3,RS_X4,
RS_X9,RS_X27,RS_X26,RS_X25,RS_X24,RS_X23,RS_X22,
RS_X21,RS_X20,RS_X19,RS_X18],first_int_imreg,[]);
if CPURV_HAS_16REGISTERS in cpu_capabilities[current_settings.cputype] then
rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
[RS_X10,RS_X11,RS_X12,RS_X13,RS_X14,RS_X15,
RS_X5,RS_X6,RS_X7,
RS_X3,RS_X4,
RS_X9],first_int_imreg,[])
else
rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
[RS_X10,RS_X11,RS_X12,RS_X13,RS_X14,RS_X15,RS_X16,RS_X17,
RS_X31,RS_X30,RS_X29,RS_X28,
RS_X5,RS_X6,RS_X7,
RS_X3,RS_X4,
RS_X9,RS_X27,RS_X26,RS_X25,RS_X24,RS_X23,RS_X22,
RS_X21,RS_X20,RS_X19,RS_X18],first_int_imreg,[]);
rg[R_FPUREGISTER]:=trgcpu.create(R_FPUREGISTER,R_SUBNONE,
[RS_F10,RS_F11,RS_F12,RS_F13,RS_F14,RS_F15,RS_F16,RS_F17,
RS_F0,RS_F1,RS_F2,RS_F3,RS_F4,RS_F5,RS_F6,RS_F7,

View File

@ -38,7 +38,8 @@ Type
cpu_rv32imac,
cpu_rv32ima,
cpu_rv32im,
cpu_rv32i
cpu_rv32i,
cpu_rv32e
);
tfputype =
@ -149,7 +150,8 @@ Const
'RV32IMAC',
'RV32IMA',
'RV32IM',
'RV32I'
'RV32I',
'RV32E'
);
fputypestr : array[tfputype] of string[8] = (
@ -178,7 +180,8 @@ Const
tcpuflags =
(CPURV_HAS_MUL,
CPURV_HAS_ATOMIC,
CPURV_HAS_COMPACT
CPURV_HAS_COMPACT,
CPURV_HAS_16REGISTERS
);
const
@ -187,7 +190,8 @@ Const
{ cpu_rv32imac } [CPURV_HAS_MUL,CPURV_HAS_ATOMIC,CPURV_HAS_COMPACT],
{ cpu_rv32ima } [CPURV_HAS_MUL,CPURV_HAS_ATOMIC],
{ cpu_rv32im } [CPURV_HAS_MUL],
{ cpu_rv32i } []
{ cpu_rv32i } [],
{ cpu_rv32e } [CPURV_HAS_16REGISTERS]
);
Implementation

View File

@ -12,4 +12,3 @@ const
begin
end.