diff --git a/compiler/mips/cgcpu.pas b/compiler/mips/cgcpu.pas
index c659acc89a..309b4b943d 100644
--- a/compiler/mips/cgcpu.pas
+++ b/compiler/mips/cgcpu.pas
@@ -1643,31 +1643,32 @@ end;
 
 
 procedure TCgMPSel.g_intf_wrapper(list: tasmlist; procdef: tprocdef; const labelname: string; ioffset: longint);
-      procedure loadvmttor24;
-        var
-          href: treference;
-        begin
-          reference_reset_base(href, NR_R2, 0, sizeof(aint));  { return value }
-          cg.a_load_ref_reg(list, OS_ADDR, OS_ADDR, href, NR_R24);
-        end;
+
+  procedure loadvmttor24;
+    var
+      href: treference;
+    begin
+      reference_reset_base(href, NR_R2, 0, sizeof(aint));  { return value }
+      cg.a_load_ref_reg(list, OS_ADDR, OS_ADDR, href, NR_R24);
+    end;
 
 
-      procedure op_onr24methodaddr;
-        var
-          href : treference;
-        begin
-          if (procdef.extnumber=$ffff) then
-            Internalerror(200006139);
-          { call/jmp  vmtoffs(%eax) ; method offs }
-          reference_reset_base(href, NR_R24, tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber), sizeof(aint));
-          cg.a_load_ref_reg(list, OS_ADDR, OS_ADDR, href, NR_R24);
-          list.concat(taicpu.op_reg(A_JR, NR_R24));
-        end;
+   procedure op_onr24methodaddr;
+     var
+       href : treference;
+     begin
+       if (procdef.extnumber=$ffff) then
+         Internalerror(200006139);
+       { call/jmp  vmtoffs(%eax) ; method offs }
+       reference_reset_base(href, NR_R24, tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber), sizeof(aint));
+       cg.a_load_ref_reg(list, OS_ADDR, OS_ADDR, href, NR_R24);
+       list.concat(taicpu.op_reg(A_JR, NR_R24));
+     end;
 var
   make_global: boolean;
   href: treference;
 begin
-  if procdef.proctypeoption <> potype_none then
+  if not(procdef.proctypeoption in [potype_function,potype_procedure]) then
     Internalerror(200006137);
   if not assigned(procdef.struct) or
     (procdef.procoptions * [po_classmethod, po_staticmethod,
diff --git a/rtl/inc/system.inc b/rtl/inc/system.inc
index 2ea4336d31..f8dda92eb0 100644
--- a/rtl/inc/system.inc
+++ b/rtl/inc/system.inc
@@ -230,6 +230,25 @@ function do_isdevice(handle:thandle):boolean;forward;
   {$define SYSPROCDEFINED}
 {$endif cpuavr}
 
+{$ifdef cpumips}
+  {$ifdef SYSPROCDEFINED}
+    {$Error Can't determine processor type !}
+  {$endif}
+  {$i mips.inc}  { Case dependent, don't change }
+  {$define SYSPROCDEFINED}
+{$endif cpumips}
+
+{$ifdef cpumipsel}
+  {$ifdef SYSPROCDEFINED}
+    {$Error Can't determine processor type !}
+  {$endif}
+  {$i mipsel.inc}  { Case dependent, don't change }
+  {$define SYSPROCDEFINED}
+{$endif cpumipsel}
+
+{$ifndef SYSPROCDEFINED}
+  {$Error Can't determine processor type !}
+{$endif}
 
 procedure fillchar(var x;count : SizeInt;value : boolean);
 begin
diff --git a/rtl/linux/mips/sighnd.inc b/rtl/linux/mips/sighnd.inc
index 16e87686e9..ae71d813c4 100644
--- a/rtl/linux/mips/sighnd.inc
+++ b/rtl/linux/mips/sighnd.inc
@@ -15,17 +15,6 @@
 
  **********************************************************************}
 
-const
-  FPE_INTDIV = 1;
-  FPE_INTOVF = 2;
-  FPE_FLTDIV = 3;
-  FPE_FLTOVF = 4;
-  FPE_FLTUND = 5;
-  FPE_FLTRES = 6;
-  FPE_FLTINV = 7;
-  FPE_FLTSUB = 8;
-
-
 procedure SignalToRunerror(sig : longint; SigInfo: PSigInfo; SigContext: PSigContext);cdecl;
 var
   res : word;
@@ -36,7 +25,7 @@ begin
   case sig of
     SIGFPE :
         begin
-          addr := siginfo^._sifields._sigfault.si_addr;
+          addr := siginfo^._sifields._sigfault._addr;
           res := 207;
           case  siginfo^.si_code of
             FPE_INTDIV:
@@ -61,7 +50,7 @@ begin
     SIGBUS,
     SIGSEGV :
         begin
-          addr := siginfo^._sifields._sigfault.si_addr;
+          addr := siginfo^._sifields._sigfault._addr;
           res:=216;
         end;
   end;
diff --git a/rtl/mips/mips.inc b/rtl/mips/mips.inc
index 9fcf1400a0..18679ff60d 100644
--- a/rtl/mips/mips.inc
+++ b/rtl/mips/mips.inc
@@ -13,7 +13,6 @@
 
  **********************************************************************}
 
-
 {****************************************************************************
                            MIPS specific stuff
 ****************************************************************************}
@@ -65,14 +64,14 @@ function get_frame:pointer;assembler;nostackframe;
 {$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
 function get_caller_addr(framebp:pointer):pointer;assembler;nostackframe;
   asm
-    lw $2,4($4) #movl    4(%eax),%eax
+    lw $2,4($4) // #movl    4(%eax),%eax
   end;
 
 
 {$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
 function get_caller_frame(framebp:pointer):pointer;assembler;nostackframe;
   asm
-    lw $2,0($4)#movl    (%eax),%eax
+    lw $2,0($4) // #movl    (%eax),%eax
   end;
 
 
@@ -94,44 +93,44 @@ procedure Move(const source;var dest;count:longint);[public, alias: 'FPC_MOVE'];
     $9/l0/l1/l2 qword move
 }
 
-  sw  $4,0($23)
-  sw  $5,-4($23)
-  sw  $6,-8($23)
-  sw  $7,-12($23)
-  sw  $8,-16($23)
-  sw  $9,-20($23)
-  sw  $10,-24($23)
-  sw  $11,-28($23)
-  sw  $12,-32($23)
-  sw  $13,-36($23)
-  sw  $14,-40($23)
-  addiu  $23,$23,-44
+    sw  $4,0($23)
+    sw  $5,-4($23)
+    sw  $6,-8($23)
+    sw  $7,-12($23)
+    sw  $8,-16($23)
+    sw  $9,-20($23)
+    sw  $10,-24($23)
+    sw  $11,-28($23)
+    sw  $12,-32($23)
+    sw  $13,-36($23)
+    sw  $14,-40($23)
+    addiu  $23,$23,-44
 
 
-    # count <= 0 ?
+    // count <= 0 ?
     ble $6,$0,.Lmoveexit
     nop
 
-    # source = dest ?
+    // source = dest ?
     beq $4,$5,.Lmoveexit
     nop
 
-    # possible overlap?
+    // possible overlap?
     bgt $4,$5,.Lnopossibleoverlap
     nop
-    # source < dest ....
+    // source < dest ....
     addu $7,$6,$4
-    # overlap?
-    # source+count < dest ?
+    // overlap?
+    // source+count < dest ?
     blt $7,$5,.Lnopossibleoverlap
     nop
 
   .Lcopybackward:
-    # check alignment of source and dest
+    // check alignment of source and dest
     or $2,$4,$5
 
-    # move src and dest to the end of the blocks
-    # assuming 16 byte block size
+    // move src and dest to the end of the blocks
+    // assuming 16 byte block size
     addiu $3,$6,-1
     addu $4,$4,$3
     addu $5,$5,$3
@@ -141,14 +140,14 @@ procedure Move(const source;var dest;count:longint);[public, alias: 'FPC_MOVE'];
 
 .Lnopossibleoverlap:
 
-    # check alignment of source and dest
+    // check alignment of source and dest
     or $2,$4,$5
 
-    # everything 16 byte aligned ?
+    // everything 16 byte aligned ?
     andi $13,$2,15
 
     beq $13,$0,.Lmovetwordwise
-    # load direction in delay slot
+    // load direction in delay slot
     li $3,16
 
 
@@ -293,11 +292,11 @@ procedure Move(const source;var dest;count:longint);[public, alias: 'FPC_MOVE'];
 ****************************************************************************}
 
 {$define FPC_SYSTEM_HAS_ABS_LONGINT}
-function abs(l:longint):longint; assembler;{$ifdef SYSTEMINLINE}inline;{$endif}nostackframe;{$ifndef INTERNCONSTINTF}[internconst:fpc_in_const_abs];{$endif}
+function abs(l:longint):longint; assembler;{$ifdef SYSTEMINLINE}inline;{$endif}nostackframe;
 asm
-    sra $1,$4,31 #$at,$4,31
-    xor $2,$4,$1 #$2,$4,$at
-    sub $2,$2,$1 #$2,$2,$at
+    sra $1,$4,31 // $at,$4,31
+    xor $2,$4,$1 // $2,$4,$at
+    sub $2,$2,$1 // $2,$2,$at
 end;
 
 var
@@ -421,3 +420,32 @@ asm
   lw  $14,-40($23)
 
 end;
+
+function InterLockedDecrement (var Target: longint) : longint; assembler; nostackframe;
+asm
+  { FIXME!!!!!!!!! }
+end;
+
+
+function InterLockedIncrement (var Target: longint) : longint; assembler; nostackframe;
+asm
+ { FIXME!!!!!!!!! }
+end;
+
+
+function InterLockedExchange (var Target: longint;Source : longint) : longint; assembler; nostackframe;
+asm
+ { FIXME!!!!!!!!! }
+end;
+
+function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint; assembler; nostackframe;
+asm
+{ FIXME!!!!!!!!! }
+end;
+
+
+function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint; assembler; nostackframe;
+asm
+  { FIXME!!!!!!!!! }
+end;
+
diff --git a/rtl/mips/setjump.inc b/rtl/mips/setjump.inc
index c2c8d0b956..c2621b1fa0 100644
--- a/rtl/mips/setjump.inc
+++ b/rtl/mips/setjump.inc
@@ -15,18 +15,18 @@
 
 procedure fpc_longjmp(var s : jmp_buf;value:longint);assembler;nostackframe;[Public,alias:'FPC_LONGJMP'];compilerproc;
   asm
-    lw $31,0($4) #PC
-    lw $sp,4($4) #SP
-    lw $16,8($4) #S0,$16
-    lw $17,12($4)#S1,$16
-    lw $18,16($4)#S2,$16
-    lw $19,20($4)#S3,$16
-    lw $20,24($4)#S4,$16
-    lw $21,28($4)#S5,$16
-    lw $22,32($4)#S6,$16
-    lw $23,36($4)#S7,$16
-    lw $fp,40($4)#FP
-    lw $gp,44($4)#GP
+    lw $31,0($4)    // PC
+    lw $sp,4($4)    // SP
+    lw $16,8($4)    // S0,$16
+    lw $17,12($4)   // S1,$16
+    lw $18,16($4)   // S2,$16
+    lw $19,20($4)   // S3,$16
+    lw $20,24($4)   // S4,$16
+    lw $21,28($4)   // S5,$16
+    lw $22,32($4)   // S6,$16
+    lw $23,36($4)   // S7,$16
+    lw $fp,40($4)   // FP
+    lw $gp,44($4)   // GP
 
     j $31
     nop
@@ -35,18 +35,18 @@ procedure fpc_longjmp(var s : jmp_buf;value:longint);assembler;nostackframe;[Pub
 
 function fpc_setjmp(var S:jmp_buf):longint;assembler;nostackframe;[Public,alias:'FPC_SETJMP'];compilerproc;
   asm
-    sw $31,0($4) #PC
-    sw $sp,4($4) #SP
-    sw $16,8($4) #S0,$16
-    sw $17,12($4)#S1,$16
-    sw $18,16($4)#S2,$16
-    sw $19,20($4)#S3,$16
-    sw $20,24($4)#S4,$16
-    sw $21,28($4)#S5,$16
-    sw $22,32($4)#S6,$16
-    sw $23,36($4)#S7,$16
-    sw $fp,40($4)#FP
-    sw $gp,44($4)#GP
+    sw $31,0($4)        // PC
+    sw $sp,4($4)        // SP
+    sw $16,8($4)        // S0,$16
+    sw $17,12($4)       // S1,$16
+    sw $18,16($4)       // S2,$16
+    sw $19,20($4)       // S3,$16
+    sw $20,24($4)       // S4,$16
+    sw $21,28($4)       // S5,$16
+    sw $22,32($4)       // S6,$16
+    sw $23,36($4)       // S7,$16
+    sw $fp,40($4)       // FP
+    sw $gp,44($4)       // GP
 
     move $2,$0
   end;