From a32605bd387826b5de6573ff6c4b96521f67f59d Mon Sep 17 00:00:00 2001 From: Jonas Maebe Date: Thu, 12 Nov 2015 20:55:33 +0000 Subject: [PATCH] * don't force setelementn's into a 32 bit modifiable register if they were already in a register, as this changes the result location into a size different from what resultdef says (and only in that specific case) o modified the ppc code so that it always forces a setelementn to uinttype, as that is the size that is expected by the operations later on git-svn-id: trunk@32296 - --- compiler/ncgset.pas | 2 -- compiler/ppcgen/ngppcadd.pas | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/compiler/ncgset.pas b/compiler/ncgset.pas index 8fcd79fc28..add5378a12 100644 --- a/compiler/ncgset.pas +++ b/compiler/ncgset.pas @@ -103,8 +103,6 @@ implementation begin { load first value in 32bit register } secondpass(left); - if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then - hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,false); { also a second value ? } if assigned(right) then diff --git a/compiler/ppcgen/ngppcadd.pas b/compiler/ppcgen/ngppcadd.pas index 4580ee0775..a8d9385bed 100644 --- a/compiler/ppcgen/ngppcadd.pas +++ b/compiler/ppcgen/ngppcadd.pas @@ -448,6 +448,7 @@ implementation left.location.register,location.register) else begin + hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,u32inttype,true); tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT); cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,aint((aword(1) shl (resultdef.size*8-1))),tmpreg); register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);