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* fixing index overflow in handling new registers arrays.

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This commit is contained in:
mazen 2003-03-10 21:59:54 +00:00
parent dd0d04e20f
commit a33dd56d81
7 changed files with 76 additions and 38 deletions
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18
compiler/sparc/aasmcpu.pas
View File

@ -761,17 +761,20 @@ begin
LastInsOffset:=-1;
end;
procedure TAiCpu.SetCondition(const c:TAsmCond);
const
AsmCond2OpCode:array[TAsmCond]of TAsmOp=
(A_BN,A_BNE,A_BE,A_BG,A_BLE,A_BGE,A_BI,A_BGU,A_BLEU,A_BCC,
A_BCS,A_BPOS,A_NEG,A_BVC,A_BVS,A_BA,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE);
begin
inherited SetCondition(c);
if Opcode=A_BA
then
begin
is_jmp:=true;
case c of
C_NE:Opcode:=A_BNE;
else
InternalError(2003021800);
end;
Opcode:=AsmCond2OpCode[c];
{$IFDEF EXTDEBUG}
WriteLn('In TAiCpu.SetCondition TAsmCond=',Byte(Opcode),'==>',std_op2str[AsmCond2OpCode[c]]);
{$ENDIF EXTDEBUG}
end;
end;
function taicpu.NeedAddrPrefix(opidx:byte):boolean;
@ -1093,7 +1096,10 @@ procedure InitAsm;
end.
{
$Log$
Revision 1.17 2003-02-18 22:00:20 mazen
Revision 1.18 2003-03-10 21:59:54 mazen
* fixing index overflow in handling new registers arrays.
Revision 1.17 2003/02/18 22:00:20 mazen
* asm condition generation modified by TAiCpu.SetCondition
Revision 1.16 2003/01/08 18:43:58 daniel

32
compiler/sparc/cgcpu.pas
View File

@ -408,12 +408,27 @@ procedure TCgSparc.a_loadfpu_reg_reg(list:TAasmOutput;reg1, reg2:tregister);
end;
procedure TCgSparc.a_loadfpu_reg_ref(list:TAasmOutput;size:tcgsize;reg:tregister;CONST ref:TReference);
procedure TCgSparc.a_loadfpu_reg_ref(list:TAasmOutput;size:tcgsize;reg:tregister;const ref:TReference);
const
FpuStoreInstr: Array[OS_F32..OS_F64,boolean, boolean] of TAsmOp =
{ indexed? updating?}
(((A_STF,A_STF),(A_STF,A_STF)),
((A_STDF,A_STDF),(A_STDF,A_STDF)));
var
op: tasmop;
ref2: treference;
freereg: boolean;
begin
{ if reg <> R_ST then
a_loadfpu_reg_reg(list,reg,R_ST);}
floatstore(list,size,ref);
if not(size in [OS_F32,OS_F64])
then
internalerror(200201122);
{ ref2:=ref;
freereg:=fixref(list,ref2);
op:=fpustoreinstr[size,ref2.index.enum <> R_NO,false];
a_load_store(list,op,reg,ref2);
if freereg
then
cg.free_scratch_reg(list,ref2.base);}
end;
@ -1214,7 +1229,7 @@ procedure TCgSparc.g_concatcopy(list:taasmoutput;const source,dest:treference;le
objectlibrary.getlabel(lab);
a_label(list, lab);
list.concat(taicpu.op_reg_const_reg(A_SUB,countreg,1,countreg));
list.concat(taicpu.op_reg_ref(A_LDF,r,src));
list.concat(taicpu.op_ref_reg(A_LDF,src,r));
list.concat(taicpu.op_reg_ref(A_STD,r,dst));
//a_jmp(list,A_BC,C_NE,0,lab);
free_scratch_reg(list,countreg);
@ -1410,7 +1425,10 @@ BEGIN
END.
{
$Log$
Revision 1.40 2003-02-25 21:41:44 mazen
Revision 1.41 2003-03-10 21:59:54 mazen
* fixing index overflow in handling new registers arrays.
Revision 1.40 2003/02/25 21:41:44 mazen
* code re-aligned 2 spaces
Revision 1.39 2003/02/19 22:00:16 daniel

13
compiler/sparc/cpubase.pas
View File

@ -207,8 +207,8 @@ TYPE
Tsupregset=set of Tsuperregister;
CONST
R_NO=R_NONE;
firstreg = R_G0;
lastreg = R_I7;
firstreg = Succ(R_NONE);
lastreg = Pred(R_INTREGISTER);
{General registers.}
@ -466,8 +466,8 @@ const
lastsaveintreg = RS_I7;
firstsavefpureg = R_F0;
lastsavefpureg = R_F31;
firstsavemmreg = R_I0;
lastsavemmreg = R_I7;
firstsavemmreg = R_NONE;
lastsavemmreg = R_NONE;
lowsavereg = R_G0;
highsavereg = R_I7;
@ -676,7 +676,10 @@ END.
{
$Log$
Revision 1.24 2003-02-26 22:06:27 mazen
Revision 1.25 2003-03-10 21:59:54 mazen
* fixing index overflow in handling new registers arrays.
Revision 1.24 2003/02/26 22:06:27 mazen
* FirstReg <-- R_G0 instead of Low(TOldRegister)=R_NONE
* LastReg <-- R_L7 instead of High(R_ASR31)=High(TOldRegister)
* FirstReg..LastReg rplaced by TOldRegister in several arrays declarions

15
compiler/sparc/ncpuadd.pas
View File

@ -57,18 +57,18 @@ procedure TSparcAddNode.clear_left_right(cmpop:Boolean);
if(right.location.loc in [LOC_REGISTER,LOC_FPUREGISTER])and(cmpop or(location.register.enum <> right.location.register.enum))
then
begin
rg.ungetregister(exprasmlist,right.location.register);
rg.UnGetRegisterInt(exprasmlist,right.location.register);
if is_64bitint(right.resulttype.def)
then
rg.ungetregister(exprasmlist,right.location.registerhigh);
rg.UnGetRegisterInt(exprasmlist,right.location.registerhigh);
end;
if(left.location.loc in [LOC_REGISTER,LOC_FPUREGISTER])and(cmpop or(location.register.enum <> left.location.register.enum))
then
begin
rg.ungetregister(exprasmlist,left.location.register);
rg.UnGetRegisterInt(exprasmlist,left.location.register);
if is_64bitint(left.resulttype.def)
then
rg.ungetregister(exprasmlist,left.location.registerhigh);
rg.UnGetRegisterInt(exprasmlist,left.location.registerhigh);
end;
end;
procedure TSparcAddNode.second_addboolean;
@ -930,7 +930,7 @@ procedure TSparcAddNode.second_addfloat;
r,left.location.register,right.location.register))
end;
clear_left_right(cmpop);
// clear_left_right(cmpop);
end;
procedure TSparcAddNode.set_result_location(cmpOp,unsigned:Boolean);
begin
@ -1111,7 +1111,10 @@ begin
end.
{
$Log$
Revision 1.10 2003-02-19 22:00:17 daniel
Revision 1.11 2003-03-10 21:59:54 mazen
* fixing index overflow in handling new registers arrays.
Revision 1.10 2003/02/19 22:00:17 daniel
* Code generator converted to new register notation
- Horribily outdated todo.txt removed

9
compiler/sparc/ncpucnv.pas
View File

@ -238,7 +238,7 @@ procedure TSparctypeconvnode.second_int_to_real;
if(left.location.loc = LOC_REGISTER) or
((left.location.loc = LOC_CREGISTER) and not signed)
then
rg.ungetregister(exprasmlist,leftreg)
rg.UnGetRegisterInt(exprasmlist,leftreg)
else
cg.free_scratch_reg(exprasmlist,valuereg);
tmpfpureg := rg.getregisterfpu(exprasmlist);
@ -300,7 +300,7 @@ procedure TSparctypeconvnode.second_int_to_bool;
hreg1 := rg.getregisterint(exprasmlist,opsize);
exprasmlist.concat(taicpu.op_reg_const_reg(A_SUB,hreg1,1,hreg2));
exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUB,hreg1,hreg1,hreg2));
rg.ungetregister(exprasmlist,hreg2);
rg.UnGetRegisterInt(exprasmlist,hreg2);
end;
LOC_FLAGS :
begin
@ -388,7 +388,10 @@ begin
end.
{
$Log$
Revision 1.12 2003-02-19 22:00:17 daniel
Revision 1.13 2003-03-10 21:59:54 mazen
* fixing index overflow in handling new registers arrays.
Revision 1.12 2003/02/19 22:00:17 daniel
* Code generator converted to new register notation
- Horribily outdated todo.txt removed

15
compiler/sparc/ncpumat.pas
View File

@ -140,14 +140,14 @@ implementation
begin
exprasmlist.concat(taicpu.op_reg_reg_reg(A_SMUL,resultreg,
divider,resultreg));
rg.ungetregister(exprasmlist,divider);
rg.UnGetRegisterInt(exprasmlist,divider);
exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUB,location.register,
numerator,resultreg));
cg.free_scratch_reg(exprasmlist,resultreg);
resultreg := location.register;
end
else
rg.ungetregister(exprasmlist,divider);
rg.UnGetRegisterInt(exprasmlist,divider);
end;
{ free used registers }
if numerator.enum <> resultreg.enum then
@ -263,12 +263,12 @@ procedure tSparcshlshrnode.pass_2;
exprasmlist.concat(taicpu.op_reg_reg_reg(asmop1,R_0,hregisterlow,R_0));
exprasmlist.concat(taicpu.op_reg_reg_reg(A_OR,location.registerhigh,location.registerhigh,R_0));
exprasmlist.concat(taicpu.op_reg_reg_reg(asmop1,location.registerlow,hregisterlow,hregister1));}
rg.ungetregister(exprasmlist,r);
rg.UnGetRegisterInt(exprasmlist,r);
if right.location.loc in [LOC_CREFERENCE,LOC_REFERENCE]
then
cg.free_scratch_reg(exprasmlist,hregister1)
else
rg.ungetregister(exprasmlist,hregister1);
rg.UnGetRegisterInt(exprasmlist,hregister1);
end
end
else
@ -301,7 +301,7 @@ procedure tSparcshlshrnode.pass_2;
location_force_reg(exprasmlist,right.location,def_cgsize(right.resulttype.def),true);
hregister2 := right.location.register;
cg.a_op_reg_reg_reg(exprasmlist,op,OS_32,hregister2,hregister1,resultreg);
rg.ungetregister(exprasmlist,hregister2);
rg.UnGetRegisterInt(exprasmlist,hregister2);
end;
end;
end;
@ -478,7 +478,10 @@ begin
end.
{
$Log$
Revision 1.5 2003-02-19 22:00:17 daniel
Revision 1.6 2003-03-10 21:59:54 mazen
* fixing index overflow in handling new registers arrays.
Revision 1.5 2003/02/19 22:00:17 daniel
* Code generator converted to new register notation
- Horribily outdated todo.txt removed

12
compiler/sparc/rgcpu.pas
View File

@ -56,10 +56,10 @@ var r:Tregister;
else result := inherited GetExplicitRegisterInt(list,reg);
end;
procedure trgcpu.UngetregisterInt(list: taasmoutput; reg: tregister);
procedure trgcpu.UngetRegisterInt(list:taasmoutput;reg:tregister);
begin
if reg.enum<>R_INTREGISTER then
if reg.enum<>R_INTREGISTER
then
internalerror(200302191);
if (reg.number=RS_O7) or (reg.number=NR_I7)
then
@ -67,13 +67,15 @@ procedure trgcpu.UngetregisterInt(list: taasmoutput; reg: tregister);
else
inherited ungetregisterint(list,reg);
end;
begin
rg := trgcpu.create;
end.
{
$Log$
Revision 1.6 2003-02-19 22:00:17 daniel
Revision 1.7 2003-03-10 21:59:54 mazen
* fixing index overflow in handling new registers arrays.
Revision 1.6 2003/02/19 22:00:17 daniel
* Code generator converted to new register notation
- Horribily outdated todo.txt removed