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* Aarch64: operations affect always the full 64 bit register, so
TCpuAsmOptimizer.RegLoadedWithNewValue can use SuperRegistersEq
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@ -114,7 +114,7 @@ Implementation
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case p.oper[0]^.typ of
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case p.oper[0]^.typ of
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top_reg:
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top_reg:
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Result := (p.oper[0]^.reg = reg);
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Result := SuperRegistersEqual(p.oper[0]^.reg,reg);
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top_ref:
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top_ref:
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Result :=
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Result :=
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(taicpu(p).oper[0]^.ref^.addressmode in [AM_PREINDEXED,AM_POSTINDEXED]) and
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(taicpu(p).oper[0]^.ref^.addressmode in [AM_PREINDEXED,AM_POSTINDEXED]) and
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