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o manually applied merge request 46 by J. Gareth "Kit" Moreton:
+ x86_64: XMM-based block move optimisation
This commit is contained in:
florian
parent
860e4487c3
commit
a3666aa8c9
@ -84,6 +84,15 @@ unit aoptx86;
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protected
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class function IsMOVZXAcceptable: Boolean; static; inline;
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{ Attempts to allocate a volatile integer register for use between p and hp,
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using AUsedRegs for the current register usage information. Returns NR_NO
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if no free register could be found }
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function GetIntRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai): TRegister;
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{ Attempts to allocate a volatile MM register for use between p and hp,
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using AUsedRegs for the current register usage information. Returns NR_NO
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if no free register could be found }
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function GetMMRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai): TRegister;
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{ checks whether loading a new value in reg1 overwrites the entirety of reg2 }
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function Reg1WriteOverwritesReg2Entirely(reg1, reg2: tregister): boolean;
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{ checks whether reading the value in reg1 depends on the value of reg2. This
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@ -1003,6 +1012,121 @@ unit aoptx86;
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{$endif x86_64}
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end;
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{ Attempts to allocate a volatile integer register for use between p and hp,
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using AUsedRegs for the current register usage information. Returns NR_NO
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if no free register could be found }
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function TX86AsmOptimizer.GetIntRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai): TRegister;
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var
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RegSet: TCPURegisterSet;
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CurrentSuperReg: Integer;
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CurrentReg: TRegister;
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Currentp: tai;
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Breakout: Boolean;
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begin
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{ TODO: Currently, only the volatile registers are checked - can this be extended to use any register the procedure has preserved? }
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Result := NR_NO;
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RegSet := paramanager.get_volatile_registers_int(current_procinfo.procdef.proccalloption);
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for CurrentSuperReg := Low(RegSet) to High(RegSet) do
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begin
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CurrentReg := newreg(R_INTREGISTER, TSuperRegister(CurrentSuperReg), RegSize);
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if not AUsedRegs[R_INTREGISTER].IsUsed(CurrentReg) then
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begin
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Currentp := p;
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Breakout := False;
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while not Breakout and GetNextInstruction(Currentp, Currentp) and (Currentp <> hp) do
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begin
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case hp.typ of
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ait_instruction:
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begin
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if RegInInstruction(CurrentReg, Currentp) then
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begin
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Breakout := True;
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Break;
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end;
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{ Cannot allocate across an unconditional jump }
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if is_calljmpuncondret(taicpu(Currentp).opcode) then
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Exit;
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end;
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ait_marker:
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{ Don't try anything more if a marker is hit }
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Exit;
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else
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;
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end;
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end;
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if Breakout then
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{ Try the next register }
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Continue;
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{ We have a free register available }
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Result := CurrentReg;
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AllocRegBetween(CurrentReg, p, hp, AUsedRegs);
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Exit;
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end;
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end;
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end;
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{ Attempts to allocate a volatile MM register for use between p and hp,
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using AUsedRegs for the current register usage information. Returns NR_NO
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if no free register could be found }
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function TX86AsmOptimizer.GetMMRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai): TRegister;
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var
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RegSet: TCPURegisterSet;
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CurrentSuperReg: Integer;
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CurrentReg: TRegister;
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Currentp: tai;
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Breakout: Boolean;
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begin
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{ TODO: Currently, only the volatile registers are checked - can this be extended to use any register the procedure has preserved? }
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Result := NR_NO;
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RegSet := paramanager.get_volatile_registers_mm(current_procinfo.procdef.proccalloption);
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for CurrentSuperReg := Low(RegSet) to High(RegSet) do
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begin
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CurrentReg := newreg(R_MMREGISTER, TSuperRegister(CurrentSuperReg), RegSize);
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if not AUsedRegs[R_MMREGISTER].IsUsed(CurrentReg) then
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begin
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Currentp := p;
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Breakout := False;
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while not Breakout and GetNextInstruction(Currentp, Currentp) and (Currentp <> hp) do
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begin
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case hp.typ of
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ait_instruction:
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begin
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if RegInInstruction(CurrentReg, Currentp) then
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begin
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Breakout := True;
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Break;
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end;
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{ Cannot allocate across an unconditional jump }
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if is_calljmpuncondret(taicpu(Currentp).opcode) then
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Exit;
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end;
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ait_marker:
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{ Don't try anything more if a marker is hit }
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Exit;
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else
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;
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end;
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end;
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if Breakout then
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{ Try the next register }
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Continue;
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{ We have a free register available }
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Result := CurrentReg;
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AllocRegBetween(CurrentReg, p, hp, AUsedRegs);
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Exit;
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end;
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end;
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end;
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function TX86AsmOptimizer.Reg1WriteOverwritesReg2Entirely(reg1, reg2: tregister): boolean;
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begin
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if not SuperRegistersEqual(reg1,reg2) then
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@ -2212,6 +2336,8 @@ unit aoptx86;
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PreMessage, RegName1, RegName2, InputVal, MaskNum: string;
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NewSize: topsize;
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CurrentReg, ActiveReg: TRegister;
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SourceRef, TargetRef: TReference;
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MovAligned, MovUnaligned: TAsmOp;
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begin
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Result:=false;
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@ -2802,23 +2928,175 @@ unit aoptx86;
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end;
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end;
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top_ref:
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if (taicpu(hp1).oper[1]^.typ = top_reg) then
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begin
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{ change
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mov mem, %treg
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mov %treg, %reg
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case taicpu(hp1).oper[1]^.typ of
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top_reg:
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begin
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{ change
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mov mem, %treg
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mov %treg, %reg
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to
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to
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mov mem, %reg"
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}
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AllocRegBetween(taicpu(hp1).oper[1]^.reg,p,hp1,usedregs);
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taicpu(p).loadreg(1, taicpu(hp1).oper[1]^.reg);
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DebugMsg(SPeepholeOptimization + 'MovMov2Mov 3 done',p);
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RemoveInstruction(hp1);
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Result:=true;
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Exit;
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end;
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mov mem, %reg"
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}
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AllocRegBetween(taicpu(hp1).oper[1]^.reg,p,hp1,usedregs);
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taicpu(p).loadreg(1, taicpu(hp1).oper[1]^.reg);
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DebugMsg(SPeepholeOptimization + 'MovMov2Mov 3 done',p);
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RemoveInstruction(hp1);
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Result:=true;
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Exit;
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end;
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top_ref:
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begin
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{$ifdef x86_64}
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{ Look for the following to simplify:
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mov x(mem1), %reg
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mov %reg, y(mem2)
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mov x+8(mem1), %reg
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mov %reg, y+8(mem2)
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Change to:
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movdqu x(mem1), %xmmreg
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movdqu %xmmreg, y(mem2)
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}
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SourceRef := taicpu(p).oper[0]^.ref^;
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TargetRef := taicpu(hp1).oper[1]^.ref^;
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if (taicpu(p).opsize = S_Q) and
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GetNextInstruction(hp1, hp2) and
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MatchInstruction(hp2, A_MOV, [taicpu(p).opsize]) and
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MatchOpType(taicpu(hp2), top_ref, top_reg) then
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begin
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{ Delay calling GetNextInstruction(hp2, hp3) for as long as possible }
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UpdateUsedRegs(TmpUsedRegs, tai(hp1.Next));
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Inc(SourceRef.offset, 8);
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if UseAVX then
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begin
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MovAligned := A_VMOVDQA;
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MovUnaligned := A_VMOVDQU;
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end
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else
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begin
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MovAligned := A_MOVDQA;
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MovUnaligned := A_MOVDQU;
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end;
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if RefsEqual(SourceRef, taicpu(hp2).oper[0]^.ref^) then
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begin
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UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
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Inc(TargetRef.offset, 8);
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if GetNextInstruction(hp2, hp3) and
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MatchInstruction(hp3, A_MOV, [taicpu(p).opsize]) and
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MatchOpType(taicpu(hp3), top_reg, top_ref) and
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(taicpu(hp2).oper[1]^.reg = taicpu(hp3).oper[0]^.reg) and
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RefsEqual(TargetRef, taicpu(hp3).oper[1]^.ref^) and
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not RegUsedAfterInstruction(taicpu(hp2).oper[1]^.reg, hp3, TmpUsedRegs) then
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begin
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CurrentReg := GetMMRegisterBetween(R_SUBMMX, UsedRegs, p, hp3);
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if CurrentReg <> NR_NO then
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begin
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{ Remember that the offsets are 8 ahead }
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if ((SourceRef.offset mod 16) = 8) and
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(
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{ Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
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(SourceRef.base = current_procinfo.framepointer) or
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((SourceRef.alignment >= 16) and ((SourceRef.alignment mod 16) = 0))
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) then
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taicpu(p).opcode := MovAligned
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else
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taicpu(p).opcode := MovUnaligned;
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taicpu(p).opsize := S_XMM;
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taicpu(p).oper[1]^.reg := CurrentReg;
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if ((TargetRef.offset mod 16) = 8) and
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(
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{ Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
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(TargetRef.base = current_procinfo.framepointer) or
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((TargetRef.alignment >= 16) and ((TargetRef.alignment mod 16) = 0))
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) then
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taicpu(hp1).opcode := MovAligned
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else
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taicpu(hp1).opcode := MovUnaligned;
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taicpu(hp1).opsize := S_XMM;
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taicpu(hp1).oper[0]^.reg := CurrentReg;
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DebugMsg(SPeepholeOptimization + 'Used ' + debug_regname(CurrentReg) + ' to merge a pair of memory moves (MovMovMovMov2MovdqMovdq 1)', p);
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RemoveInstruction(hp2);
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RemoveInstruction(hp3);
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Result := True;
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Exit;
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end;
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end;
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end
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else
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begin
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{ See if the next references are 8 less rather than 8 greater }
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Dec(SourceRef.offset, 16); { -8 the other way }
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if RefsEqual(SourceRef, taicpu(hp2).oper[0]^.ref^) then
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begin
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UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
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Dec(TargetRef.offset, 8); { Only 8, not 16, as it wasn't incremented unlike SourceRef }
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if GetNextInstruction(hp2, hp3) and
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MatchInstruction(hp3, A_MOV, [taicpu(p).opsize]) and
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MatchOpType(taicpu(hp3), top_reg, top_ref) and
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(taicpu(hp2).oper[1]^.reg = taicpu(hp3).oper[0]^.reg) and
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RefsEqual(TargetRef, taicpu(hp3).oper[1]^.ref^) and
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not RegUsedAfterInstruction(taicpu(hp2).oper[1]^.reg, hp3, TmpUsedRegs) then
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begin
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CurrentReg := GetMMRegisterBetween(R_SUBMMX, UsedRegs, p, hp3);
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if CurrentReg <> NR_NO then
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begin
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{ hp2 and hp3 are the starting offsets, so mod 0 this time }
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if ((SourceRef.offset mod 16) = 0) and
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(
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{ Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
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(SourceRef.base = current_procinfo.framepointer) or
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((SourceRef.alignment >= 16) and ((SourceRef.alignment mod 16) = 0))
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) then
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taicpu(hp2).opcode := MovAligned
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else
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taicpu(hp2).opcode := MovUnaligned;
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taicpu(hp2).opsize := S_XMM;
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taicpu(hp2).oper[1]^.reg := CurrentReg;
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if ((TargetRef.offset mod 16) = 0) and
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(
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{ Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
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(TargetRef.base = current_procinfo.framepointer) or
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((TargetRef.alignment >= 16) and ((TargetRef.alignment mod 16) = 0))
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) then
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taicpu(hp3).opcode := MovAligned
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else
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taicpu(hp3).opcode := MovUnaligned;
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taicpu(hp3).opsize := S_XMM;
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taicpu(hp3).oper[0]^.reg := CurrentReg;
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DebugMsg(SPeepholeOptimization + 'Used ' + debug_regname(CurrentReg) + ' to merge a pair of memory moves (MovMovMovMov2MovdqMovdq 2)', p);
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RemoveInstruction(hp1);
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RemoveCurrentP(p, hp2);
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Result := True;
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Exit;
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end;
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end;
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end;
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end;
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end;
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{$endif x86_64}
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end;
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else
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{ The write target should be a reg or a ref }
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InternalError(2021091601);
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end;
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else
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;
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end
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@ -2921,6 +3199,7 @@ unit aoptx86;
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taicpu(p).loadoper(1,taicpu(hp2).oper[1]^);
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taicpu(hp1).loadoper(0,taicpu(hp2).oper[1]^);
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RemoveInstruction(hp2);
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Result := True;
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end
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{$ifdef i386}
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{ this is enabled for i386 only, as the rules to create the reg sets below
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@ -184,8 +184,8 @@ unit cgcpu;
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begin
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inc(regsize,sizeof(aint));
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inc(stackmisalignment,sizeof(aint));
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push_one_reg(newreg(R_INTREGISTER,regs_to_save_int[r],R_SUBWHOLE));
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hreg:=newreg(R_INTREGISTER,regs_to_save_int[r],R_SUBWHOLE);
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push_one_reg(hreg);
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if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
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current_asmdata.asmcfi.cfa_offset(list,hreg,-(regsize+sizeof(pint)*2+localsize))
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else
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