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- removed ppc64-specific a_load_ref_cgpara(), the generic one can also
handle of its special cases nowadays git-svn-id: trunk@20962 -
This commit is contained in:
Jonas Maebe
parent
b512744bfb
commit
a473cf14d6
@ -37,14 +37,6 @@ type
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procedure init_register_allocators; override;
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procedure done_register_allocators; override;
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{ passing parameters, per default the parameter is pushed }
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{ nr gives the number of the parameter (enumerated from }
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{ left to right), this allows to move the parameter to }
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{ register, if the cpu supports register calling }
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{ conventions }
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procedure a_load_ref_cgpara(list: TAsmList; size: tcgsize; const r: treference;
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const paraloc: tcgpara); override;
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procedure a_call_name(list: TAsmList; const s: string; weak: boolean); override;
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procedure a_call_reg(list: TAsmList; reg: tregister); override;
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@ -390,118 +382,6 @@ begin
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inherited done_register_allocators;
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end;
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procedure tcgppc.a_load_ref_cgpara(list: TAsmList; size: tcgsize; const r:
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treference; const paraloc: tcgpara);
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var
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tmpref, ref: treference;
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location: pcgparalocation;
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sizeleft: aint;
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adjusttail : boolean;
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begin
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location := paraloc.location;
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tmpref := r;
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sizeleft := paraloc.intsize;
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adjusttail := false;
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while assigned(location) do begin
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paramanager.allocparaloc(list,location);
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case location^.loc of
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LOC_REGISTER, LOC_CREGISTER:
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begin
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if not(size in [OS_NO,OS_128,OS_S128]) then
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a_load_ref_reg(list, size, location^.size, tmpref,
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location^.register)
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else begin
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{ load non-integral sized memory location into register. This
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memory location be 1-sizeleft byte sized.
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Always assume that this memory area is properly aligned, eg. start
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loading the larger quantities for "odd" quantities first }
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case sizeleft of
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1,2,4,8 :
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a_load_ref_reg(list, int_cgsize(sizeleft), location^.size, tmpref,
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location^.register);
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3 : begin
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a_reg_alloc(list, NR_R12);
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a_load_ref_reg(list, OS_16, location^.size, tmpref,
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NR_R12);
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inc(tmpref.offset, tcgsize2size[OS_16]);
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a_load_ref_reg(list, OS_8, location^.size, tmpref,
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location^.register);
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list.concat(taicpu.op_reg_reg_const_const(A_RLDIMI, location^.register, NR_R12, 8, 40));
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a_reg_dealloc(list, NR_R12);
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end;
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5 : begin
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a_reg_alloc(list, NR_R12);
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a_load_ref_reg(list, OS_32, location^.size, tmpref, NR_R12);
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inc(tmpref.offset, tcgsize2size[OS_32]);
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a_load_ref_reg(list, OS_8, location^.size, tmpref, location^.register);
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list.concat(taicpu.op_reg_reg_const_const(A_RLDIMI, location^.register, NR_R12, 8, 24));
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a_reg_dealloc(list, NR_R12);
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end;
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6 : begin
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a_reg_alloc(list, NR_R12);
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a_load_ref_reg(list, OS_32, location^.size, tmpref, NR_R12);
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inc(tmpref.offset, tcgsize2size[OS_32]);
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a_load_ref_reg(list, OS_16, location^.size, tmpref, location^.register);
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list.concat(taicpu.op_reg_reg_const_const(A_RLDIMI, location^.register, NR_R12, 16, 16));
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a_reg_dealloc(list, NR_R12);
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end;
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7 : begin
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a_reg_alloc(list, NR_R12);
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a_reg_alloc(list, NR_R0);
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a_load_ref_reg(list, OS_32, location^.size, tmpref, NR_R12);
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inc(tmpref.offset, tcgsize2size[OS_32]);
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a_load_ref_reg(list, OS_16, location^.size, tmpref, NR_R0);
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inc(tmpref.offset, tcgsize2size[OS_16]);
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a_load_ref_reg(list, OS_8, location^.size, tmpref, location^.register);
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list.concat(taicpu.op_reg_reg_const_const(A_RLDIMI, NR_R0, NR_R12, 16, 16));
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list.concat(taicpu.op_reg_reg_const_const(A_RLDIMI, location^.register, NR_R0, 8, 8));
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a_reg_dealloc(list, NR_R0);
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a_reg_dealloc(list, NR_R12);
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end;
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else begin
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{ still > 8 bytes to load, so load data single register now }
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a_load_ref_reg(list, location^.size, location^.size, tmpref,
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location^.register);
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{ the block is > 8 bytes, so we have to store any bytes not
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a multiple of the register size beginning with the MSB }
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adjusttail := true;
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end;
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end;
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if (adjusttail) and (sizeleft < sizeof(pint)) then
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a_op_const_reg(list, OP_SHL, OS_INT,
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(sizeof(pint) - sizeleft) * sizeof(pint),
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location^.register);
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end;
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end;
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LOC_REFERENCE:
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begin
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reference_reset_base(ref, location^.reference.index,
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location^.reference.offset,paraloc.alignment);
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g_concatcopy(list, tmpref, ref, sizeleft);
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if assigned(location^.next) then
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internalerror(2005010710);
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end;
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LOC_FPUREGISTER, LOC_CFPUREGISTER:
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case location^.size of
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OS_F32, OS_F64:
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a_loadfpu_ref_reg(list, location^.size, location^.size, tmpref, location^.register);
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else
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internalerror(2002072801);
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end;
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LOC_VOID:
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{ nothing to do }
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;
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else
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internalerror(2002081103);
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end;
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inc(tmpref.offset, tcgsize2size[location^.size]);
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dec(sizeleft, tcgsize2size[location^.size]);
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location := location^.next;
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end;
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end;
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{ calling a procedure by name }
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procedure tcgppc.a_call_name(list: TAsmList; const s: string; weak: boolean);
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