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+ make use of the 16-bit movsx and movzx instructions in tcg8086.a_load_reg_reg

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when the cpu target is 80386 or later

git-svn-id: trunk@34046 -
This commit is contained in:
nickysn 2016-07-02 14:06:25 +00:00
parent fd4e42abaa
commit a5f1ae97d4
1 changed files with 32 additions and 17 deletions
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49
compiler/i8086/cgcpu.pas
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@ -1393,20 +1393,30 @@ unit cgcpu;
case fromsize of case fromsize of
OS_8: OS_8:
begin begin
reg2 := makeregsize(list, reg2, OS_8); if current_settings.cputype>=cpu_386 then
if reg1<>reg2 then add_mov(taicpu.op_reg_reg(A_MOVZX, S_BW, reg1, reg2))
add_mov(taicpu.op_reg_reg(A_MOV, S_B, reg1, reg2)); else
setsubreg(reg2,R_SUBH); begin
list.concat(taicpu.op_const_reg(A_MOV, S_B, 0, reg2)); reg2 := makeregsize(list, reg2, OS_8);
makeregsize(list, reg2, OS_16); if reg1<>reg2 then
add_mov(taicpu.op_reg_reg(A_MOV, S_B, reg1, reg2));
setsubreg(reg2,R_SUBH);
list.concat(taicpu.op_const_reg(A_MOV, S_B, 0, reg2));
makeregsize(list, reg2, OS_16);
end;
end; end;
OS_S8: OS_S8:
begin begin
getcpuregister(list, NR_AX); if current_settings.cputype>=cpu_386 then
add_mov(taicpu.op_reg_reg(A_MOV, S_B, reg1, NR_AL)); add_mov(taicpu.op_reg_reg(A_MOVSX, S_BW, reg1, reg2))
list.concat(taicpu.op_none(A_CBW)); else
add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_AX, reg2)); begin
ungetcpuregister(list, NR_AX); getcpuregister(list, NR_AX);
add_mov(taicpu.op_reg_reg(A_MOV, S_B, reg1, NR_AL));
list.concat(taicpu.op_none(A_CBW));
add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_AX, reg2));
ungetcpuregister(list, NR_AX);
end;
end; end;
OS_16,OS_S16: OS_16,OS_S16:
begin begin
@ -1421,12 +1431,17 @@ unit cgcpu;
OS_8: OS_8:
begin begin
list.concat(taicpu.op_const_reg(A_MOV, S_W, 0, GetNextReg(reg2))); list.concat(taicpu.op_const_reg(A_MOV, S_W, 0, GetNextReg(reg2)));
reg2 := makeregsize(list, reg2, OS_8); if current_settings.cputype>=cpu_386 then
if reg1<>reg2 then add_mov(taicpu.op_reg_reg(A_MOVZX, S_BW, reg1, reg2))
add_mov(taicpu.op_reg_reg(A_MOV, S_B, reg1, reg2)); else
setsubreg(reg2,R_SUBH); begin
list.concat(taicpu.op_const_reg(A_MOV, S_B, 0, reg2)); reg2 := makeregsize(list, reg2, OS_8);
makeregsize(list, reg2, OS_16); if reg1<>reg2 then
add_mov(taicpu.op_reg_reg(A_MOV, S_B, reg1, reg2));
setsubreg(reg2,R_SUBH);
list.concat(taicpu.op_const_reg(A_MOV, S_B, 0, reg2));
makeregsize(list, reg2, OS_16);
end;
end; end;
OS_S8: OS_S8:
begin begin