From a834e6d5c5f669c48342d18763058d5a91dfc747 Mon Sep 17 00:00:00 2001
From: nickysn <nickysn@gmail.com>
Date: Sun, 11 Feb 2018 01:25:17 +0000
Subject: [PATCH] + added test tasm18b.pp, which is yet another for 3-byte
 records, which should   not set a valid operand size in the intel asm syntax
 mode. The difference   with tasm18a.pp is, this one tests
 recordtype.a3bytefield, while tasm18a.pp   tests a3byterecord directly.

git-svn-id: trunk@38199 -
---
 .gitattributes        |  1 +
 tests/test/tasm18b.pp | 39 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 40 insertions(+)
 create mode 100644 tests/test/tasm18b.pp

diff --git a/.gitattributes b/.gitattributes
index 3f015c40f4..fadb627ec0 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -12495,6 +12495,7 @@ tests/test/tasm16.pp svneol=native#text/plain
 tests/test/tasm17.pp svneol=native#text/plain
 tests/test/tasm18.pp svneol=native#text/plain
 tests/test/tasm18a.pp svneol=native#text/plain
+tests/test/tasm18b.pp svneol=native#text/plain
 tests/test/tasm2.inc svneol=native#text/plain
 tests/test/tasm2.pp svneol=native#text/plain
 tests/test/tasm2a.pp svneol=native#text/plain
diff --git a/tests/test/tasm18b.pp b/tests/test/tasm18b.pp
new file mode 100644
index 0000000000..7711bda2fb
--- /dev/null
+++ b/tests/test/tasm18b.pp
@@ -0,0 +1,39 @@
+{ %FAIL }
+{ %CPU=i8086,i386,x86_64 }
+program tasm18b;
+
+{$ifdef FPC}
+  {$asmmode intel}
+{$else}
+  {$define CPUI8086}
+{$endif FPC}
+
+const
+  cval = 1;
+
+type
+  foo3 = packed record
+    b1: byte;
+    b2: byte;
+    b3: byte;
+  end;
+  foo = packed record
+    bb1: byte;
+    fb3: foo3;
+  end;
+
+begin
+  asm
+    { this should produce an error, because foo3 is a 3-byte record and there's
+      no explicit operand size specified (i.e. no 'byte ptr' or 'word ptr') }
+{$ifdef CPUI8086}
+    test [di + foo.fb3], cval
+{$endif}
+{$ifdef CPUI386}
+    test [edi + foo.fb3], cval
+{$endif}
+{$ifdef CPUX86_64}
+    test [rdi + foo.fb3], cval
+{$endif}
+  end;
+end.