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m68k: a bunch of '000 related fixes and cleanups. generated source now compiles for '000 again, which was broken due to recent improvements conflicting with limitations of the original '000
git-svn-id: trunk@33809 -
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62e0eab89b
commit
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@ -388,7 +388,8 @@ implementation
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cg.a_load_reg_reg(current_asmdata.CurrAsmlist,left.location.size,location.size,left.location.register,location.register);
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cg.a_load_reg_reg(current_asmdata.CurrAsmlist,left.location.size,location.size,left.location.register,location.register);
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if (location.size <> right.location.size) or
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if (location.size <> right.location.size) or
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not (right.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_CONSTANT,LOC_REFERENCE,LOC_CREFERENCE]) then
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not (right.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_CONSTANT,LOC_REFERENCE,LOC_CREFERENCE]) or
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(not(CPUM68K_HAS_32BITMUL in cpu_capabilities[current_settings.cputype]) and (nodetype = muln)) then
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hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,true);
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hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,true);
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case right.location.loc of
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case right.location.loc of
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@ -441,7 +442,14 @@ implementation
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end;
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end;
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else
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else
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,opsize,left.location.register));
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if (current_settings.cputype = cpu_mc68000) and isaddressregister(left.location.register) then
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begin
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tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,opsize,left.location.register,tmpreg);
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end
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else
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tmpreg:=left.location.register;
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,opsize,tmpreg));
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end;
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end;
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location.resflags := getresflags(unsigned);
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location.resflags := getresflags(unsigned);
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exit;
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exit;
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@ -46,7 +46,7 @@ implementation
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ncon,ncal,
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ncon,ncal,
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ncgutil,
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ncgutil,
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cpubase,cpuinfo,aasmcpu,
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cpubase,cpuinfo,aasmcpu,
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rgobj,tgobj,cgobj,hlcgobj,cgutils,globtype,cgcpu;
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rgobj,tgobj,cgobj,hlcgobj,cgutils,globtype,cgcpu,cutils;
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{*****************************************************************************
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{*****************************************************************************
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@ -207,29 +207,10 @@ implementation
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end
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end
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else
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else
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begin
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begin
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{ can we optimize it, or do we need to fix the ref. ? }
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('typeconvnode second_int_to_bool')));
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if isvalidrefoffset(left.location.reference) then
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tmpreference:=left.location.reference;
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begin
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tcg68k(cg).fixref(current_asmdata.CurrAsmList,tmpreference,false);
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{ Coldfire cannot handle tst.l 123(dX) }
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_TST,TCGSize2OpSize[opsize],tmpreference));
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if (current_settings.cputype in (cpu_coldfire + [cpu_mc68000])) and
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isintregister(left.location.reference.base) then
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begin
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tmpreference:=left.location.reference;
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hreg2:=cg.getaddressregister(current_asmdata.CurrAsmList);
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tmpreference.base:=hreg2;
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_MOVE,S_L,left.location.reference.base,hreg2));
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_TST,TCGSize2OpSize[opsize],tmpreference));
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end
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else
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_TST,TCGSize2OpSize[opsize],left.location.reference));
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end
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else
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begin
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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cg.a_load_ref_reg(current_asmdata.CurrAsmList,opsize,opsize,
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left.location.reference,hreg2);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2));
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end;
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end;
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end;
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end;
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end;
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LOC_REGISTER,LOC_CREGISTER :
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LOC_REGISTER,LOC_CREGISTER :
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@ -243,7 +224,13 @@ implementation
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end
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end
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else
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else
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begin
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begin
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hreg2:=left.location.register;
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if (current_settings.cputype = cpu_mc68000) and isaddressregister(left.location.register) then
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begin
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,opsize,left.location.register,hreg2);
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end
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else
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hreg2:=left.location.register;
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2));
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2));
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end;
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end;
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end;
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end;
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@ -117,7 +117,14 @@ implementation
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else
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else
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begin
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begin
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,true);
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,true);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,tcgsize2opsize[opsize],left.location.register));
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if (current_settings.cputype = cpu_mc68000) and isaddressregister(left.location.register) then
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begin
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hreg:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,opsize,left.location.register,hreg);
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end
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else
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hreg:=left.location.register;
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,tcgsize2opsize[opsize],hreg));
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end;
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end;
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location_reset(location,LOC_FLAGS,OS_NO);
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location_reset(location,LOC_FLAGS,OS_NO);
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location.resflags:=F_E;
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location.resflags:=F_E;
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