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* several m68k fixes

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* push_value_para partially cleaned up

git-svn-id: trunk@5435 -
This commit is contained in:
florian 2006-11-20 22:13:49 +00:00
parent c0d46e65ee
commit ab919747a6
3 changed files with 41 additions and 37 deletions
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17
compiler/m68k/cgcpu.pas
View File

@ -1337,6 +1337,7 @@ unit cgcpu;
var
lowvalue : cardinal;
highvalue : cardinal;
hreg : tregister;
begin
// writeln('a_op64_const_reg');
{ is it optimized out ? }
@ -1353,8 +1354,10 @@ unit cgcpu;
case op of
OP_ADD :
begin
list.concat(taicpu.op_const_reg(A_ADD,S_L,lowvalue,regdst.reglo));
list.concat(taicpu.op_const_reg(A_ADDX,S_L,highvalue,regdst.reglo));
hreg:=cg.getintregister(list,OS_INT);
list.concat(taicpu.op_const_reg(A_MOVE,S_L,highvalue,hreg));
list.concat(taicpu.op_const_reg(A_ADD,S_L,lowvalue,regdst.reglo));
list.concat(taicpu.op_reg_reg(A_ADDX,S_L,hreg,regdst.reglo));
end;
OP_AND :
begin
@ -1366,15 +1369,17 @@ unit cgcpu;
list.concat(taicpu.op_const_reg(A_OR,S_L,lowvalue,regdst.reglo));
list.concat(taicpu.op_const_reg(A_OR,S_L,highvalue,regdst.reglo));
end;
{ this is handled in 1st pass for 32-bit cpu's (helper call) }
{ this is handled in 1st pass for 32-bit cpus (helper call) }
OP_IDIV,OP_DIV,
OP_IMUL,OP_MUL: internalerror(2002081701);
{ this is also handled in 1st pass for 32-bit cpu's (helper call) }
{ this is also handled in 1st pass for 32-bit cpus (helper call) }
OP_SAR,OP_SHL,OP_SHR: internalerror(2002081702);
OP_SUB:
begin
list.concat(taicpu.op_const_reg(A_SUB,S_L,lowvalue,regdst.reglo));
list.concat(taicpu.op_const_reg(A_SUBX,S_L,highvalue,regdst.reglo));
hreg:=cg.getintregister(list,OS_INT);
list.concat(taicpu.op_const_reg(A_MOVE,S_L,highvalue,hreg));
list.concat(taicpu.op_const_reg(A_SUB,S_L,lowvalue,regdst.reglo));
list.concat(taicpu.op_reg_reg(A_SUBX,S_L,hreg,regdst.reglo));
end;
OP_XOR:
begin

4
compiler/m68k/n68kadd.pas
View File

@ -437,7 +437,7 @@ implementation
procedure t68kaddnode.second_cmp64bit;
begin
writeln('second_cmp64bit');
// writeln('second_cmp64bit');
pass_left_right;
@ -537,7 +537,7 @@ implementation
location_reset(location,LOC_JUMP,OS_NO);
*)
location_reset(location,LOC_JUMP,OS_NO);
writeln('second_cmp64_exit');
// writeln('second_cmp64_exit');
end;

57
compiler/ncgcal.pas
View File

@ -211,8 +211,7 @@ implementation
location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
cg.a_parammm_reg(current_asmdata.CurrAsmList,left.location.size,left.location.register,tempcgpara,mms_movescalar);
end;
{$ifdef x86_64}
{ x86_64 pushes s64comp in normal register }
{$ifdef cpu64bit}
LOC_REGISTER,
LOC_CREGISTER :
begin
@ -221,7 +220,7 @@ implementation
left.location.size:=int_cgsize(tcgsize2size[left.location.size]);
cg.a_param_ref(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara);
end;
{$endif x86_64}
{$endif cpu64bit}
{$ifdef powerpc}
LOC_REGISTER,
LOC_CREGISTER :
@ -237,18 +236,7 @@ implementation
cg64.a_param64_ref(current_asmdata.CurrAsmList,left.location.reference,tempcgpara);
end;
{$endif powerpc}
{$ifdef powerpc64}
LOC_REGISTER,
LOC_CREGISTER :
begin
{ ppc64 abi passes floats of varargs in integer registers, so force a store }
location_force_mem(current_asmdata.CurrAsmList,left.location);
{ force integer size }
left.location.size:=int_cgsize(tcgsize2size[tempcgpara.location^.size]);
cg.a_param_ref(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara)
end;
{$endif powerpc64}
{$if defined(sparc) or defined(arm)}
{$if defined(sparc) or defined(arm) or defined(m68k)}
{ sparc and arm pass floats in normal registers }
LOC_REGISTER,
LOC_CREGISTER,
@ -267,8 +255,7 @@ implementation
LOC_MMREGISTER,
LOC_CMMREGISTER:
cg.a_parammm_ref(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara,mms_movescalar);
{$ifdef x86_64}
{ x86_64 pushes s64comp in normal register }
{$ifdef cpu64bit}
LOC_REGISTER,
LOC_CREGISTER :
begin
@ -276,7 +263,7 @@ implementation
left.location.size:=int_cgsize(tcgsize2size[left.location.size]);
cg.a_param_ref(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara);
end;
{$endif x86_64}
{$endif cpu64bit}
{$ifdef powerpc}
{ x86_64 pushes s64comp in normal register }
LOC_REGISTER,
@ -290,20 +277,11 @@ implementation
cg64.a_param64_ref(current_asmdata.CurrAsmList,left.location.reference,tempcgpara);
end;
{$endif powerpc}
{$ifdef powerpc64}
LOC_REGISTER,
LOC_CREGISTER :
begin
{ force integer size }
left.location.size:=int_cgsize(tcgsize2size[tempcgpara.location^.size]);
cg.a_param_ref(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara)
end;
{$endif powerpc64}
{$if defined(sparc) or defined(arm) }
{$if defined(sparc) or defined(arm) or defined(m68k)}
{ sparc and arm pass floats in normal registers }
LOC_REGISTER,
LOC_CREGISTER,
{$endif sparc}
{$endif}
LOC_REFERENCE,
LOC_CREFERENCE,
LOC_FPUREGISTER,
@ -312,6 +290,27 @@ implementation
else
internalerror(2002042431);
end;
LOC_REGISTER,
LOC_CREGISTER :
begin
{$ifndef cpu64bit}
{ use cg64 only for int64, not for 8 byte records }
if is_64bit(left.resultdef) then
cg64.a_param64_loc(current_asmdata.CurrAsmList,left.location,tempcgpara)
else
{$endif cpu64bit}
begin
{$ifndef cpu64bit}
{ Only a_param_ref supports multiple locations, when the
value is still a const or in a register then write it
to a reference first. This situation can be triggered
by typecasting an int64 constant to a record of 8 bytes }
if left.location.size in [OS_64,OS_S64] then
location_force_mem(current_asmdata.CurrAsmList,left.location);
{$endif cpu64bit}
cg.a_param_loc(current_asmdata.CurrAsmList,left.location,tempcgpara);
end;
end;
else
internalerror(2002042432);
end;