mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-06-25 16:18:18 +02:00
* moved int64 asm code to int64p.inc
* save ebx,esi
This commit is contained in:
parent
c82243df4d
commit
abbc3fa755
@ -31,54 +31,54 @@ asm
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movl dest,%edi
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movl dest,%edi
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movl source,%esi
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movl source,%esi
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movl %edi,%eax
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movl %edi,%eax
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movl count,%ebx
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movl count,%edx
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{ check for zero or negative count }
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{ check for zero or negative count }
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cmpl $0,%ebx
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cmpl $0,%edx
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jle .LMoveEnd
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jle .LMoveEnd
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{ Check for back or forward }
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{ Check for back or forward }
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sub %esi,%eax
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sub %esi,%eax
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jz .LMoveEnd { Do nothing when source=dest }
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jz .LMoveEnd { Do nothing when source=dest }
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jc .LFMove { Do forward, dest<source }
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jc .LFMove { Do forward, dest<source }
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cmp %ebx,%eax
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cmp %edx,%eax
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jb .LBMove { Dest is in range of move, do backward }
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jb .LBMove { Dest is in range of move, do backward }
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{ Forward Copy }
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{ Forward Copy }
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.LFMove:
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.LFMove:
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cld
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cld
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cmpl $15,%ebx
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cmpl $15,%edx
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jl .LFMove1
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jl .LFMove1
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movl %edi,%ecx { Align on 32bits }
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movl %edi,%ecx { Align on 32bits }
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negl %ecx
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negl %ecx
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andl $3,%ecx
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andl $3,%ecx
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subl %ecx,%ebx
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subl %ecx,%edx
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rep
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rep
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movsb
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movsb
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movl %ebx,%ecx
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movl %edx,%ecx
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andl $3,%ebx
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andl $3,%edx
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shrl $2,%ecx
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shrl $2,%ecx
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rep
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rep
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movsl
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movsl
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.LFMove1:
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.LFMove1:
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movl %ebx,%ecx
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movl %edx,%ecx
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rep
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rep
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movsb
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movsb
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jmp .LMoveEnd
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jmp .LMoveEnd
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{ Backward Copy }
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{ Backward Copy }
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.LBMove:
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.LBMove:
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std
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std
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addl %ebx,%esi
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addl %edx,%esi
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addl %ebx,%edi
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addl %edx,%edi
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movl %edi,%ecx
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movl %edi,%ecx
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decl %esi
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decl %esi
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decl %edi
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decl %edi
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cmpl $15,%ebx
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cmpl $15,%edx
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jl .LBMove1
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jl .LBMove1
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negl %ecx { Align on 32bits }
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negl %ecx { Align on 32bits }
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andl $3,%ecx
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andl $3,%ecx
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subl %ecx,%ebx
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subl %ecx,%edx
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rep
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rep
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movsb
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movsb
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movl %ebx,%ecx
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movl %edx,%ecx
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andl $3,%ebx
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andl $3,%edx
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shrl $2,%ecx
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shrl $2,%ecx
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subl $3,%esi
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subl $3,%esi
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subl $3,%edi
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subl $3,%edi
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@ -87,7 +87,7 @@ asm
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addl $3,%esi
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addl $3,%esi
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addl $3,%edi
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addl $3,%edi
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.LBMove1:
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.LBMove1:
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movl %ebx,%ecx
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movl %edx,%ecx
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rep
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rep
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movsb
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movsb
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cld
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cld
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@ -113,10 +113,10 @@ asm
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cmpl $7,%ecx
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cmpl $7,%ecx
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jl .LFill1
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jl .LFill1
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movb %al,%ah
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movb %al,%ah
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movl %eax,%ebx
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movl %eax,%edx
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shll $16,%eax
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shll $16,%eax
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movw %dx,%ax
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movl %ecx,%edx
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movl %ecx,%edx
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movw %bx,%ax
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movl %edi,%ecx { Align on 32bits }
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movl %edi,%ecx { Align on 32bits }
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negl %ecx
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negl %ecx
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andl $3,%ecx
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andl $3,%ecx
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@ -1313,7 +1313,11 @@ end;
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{
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{
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$Log$
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$Log$
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Revision 1.46 2003-09-08 18:21:37 peter
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Revision 1.47 2003-09-14 11:34:13 peter
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* moved int64 asm code to int64p.inc
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* save ebx,esi
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Revision 1.46 2003/09/08 18:21:37 peter
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* save edi,esi,ebx
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* save edi,esi,ebx
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Revision 1.45 2003/06/01 14:50:17 jonas
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Revision 1.45 2003/06/01 14:50:17 jonas
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233
rtl/i386/int64p.inc
Normal file
233
rtl/i386/int64p.inc
Normal file
@ -0,0 +1,233 @@
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{
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$Id$
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This file is part of the Free Pascal run time library.
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Copyright (c) 1999-2000 by the Free Pascal development team
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This file contains some helper routines for int64 and qword
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See the file COPYING.FPC, included in this distribution,
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for details about the copyright.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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**********************************************************************}
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{$Q- no overflow checking }
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{$R- no range checking }
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{$define FPC_SYSTEM_HAS_DIV_QWORD}
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function fpc_div_qword(n,z : qword) : qword;assembler;[public,alias: 'FPC_DIV_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
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var
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shift,lzz,lzn : longint;
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saveebx,saveedi : longint;
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asm
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movl %ebx,saveebx
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movl %edi,saveedi
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{ the following piece of code is taken from the }
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{ AMD Athlon Processor x86 Code Optimization manual }
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movl n+4,%ecx
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movl n,%ebx
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movl %ecx,%eax
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orl %ebx,%eax
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jnz .Lnodivzero
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pushl %ebp
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pushl $200
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call HandleErrorFrame
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jmp .Lexit
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.Lnodivzero:
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movl z+4,%edx
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movl z,%eax
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testl %ecx,%ecx
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jnz .Lqworddivbigdivisor
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cmpl %ebx,%edx
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jae .Lqworddivtwo_divs
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divl %ebx
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movl %ecx,%edx
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jmp .Lexit
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.Lqworddivtwo_divs:
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movl %eax,%ecx
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movl %edx,%eax
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xorl %edx,%edx
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divl %ebx
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xchgl %ecx,%eax
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divl %ebx
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movl %ecx,%edx
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jmp .Lexit
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.Lqworddivbigdivisor:
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movl %ecx,%edi
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shrl $1,%edx
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rcrl $1,%eax
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rorl $1,%edi
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rcrl $1,%ebx
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bsrl %ecx,%ecx
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shrdl %cl,%edi,%ebx
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shrdl %cl,%edx,%eax
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shrl %cl,%edx
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roll $1,%edi
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divl %ebx
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movl z,%ebx
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movl %eax,%ecx
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imull %eax,%edi
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mull n
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addl %edi,%edx
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subl %eax,%ebx
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movl %ecx,%eax
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movl z+4,%ecx
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sbbl %edx,%ecx
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sbbl $0,%eax
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xorl %edx,%edx
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.Lexit:
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movl saveebx,%ebx
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movl saveedi,%edi
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end;
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(*
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This does not work correctly
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{$define FPC_SYSTEM_HAS_MOD_QWORD}
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function fpc_mod_qword(n,z : qword) : qword;[public,alias: 'FPC_MOD_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
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var
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shift,lzz,lzn : longint;
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saveebx,saveedi : longint;
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asm
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movl %ebx,saveebx
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movl %edi,saveedi
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{ the following piece of code is taken from the }
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{ AMD Athlon Processor x86 Code Optimization manual }
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movl n+4,%ecx
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movl n,%ebx
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movl %ecx,%eax
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orl %ebx,%eax
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jnz .Lnodivzero
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pushl %ebp
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pushl $200
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call HandleErrorFrame
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jmp .Lexit
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movl z+4,%edx
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movl z,%eax
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testl %ecx,%ecx
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jnz .Lqwordmodr_big_divisior
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cmpl %ebx,%edx
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jae .Lqwordmodr_two_divs
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divl %ebx
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movl %edx,%eax
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movl %ecx,%edx
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jmp .Lexit
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.Lqwordmodr_two_divs:
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movl %eax,%ecx
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movl %edx,%eax
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xorl %edx,%edx
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divl %ebx
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movl %ecx,%eax
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divl %ebx
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movl %edx,%eax
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xorl %edx,%edx
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jmp .Lexit
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.Lqwordmodr_big_divisior:
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movl %ecx,%edi
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shrl $1,%edx
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rcrl $1,%eax
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rorl $1,%edi
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rcrl $1,%ebx
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bsrl %ecx,%ecx
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shrdl %cl,%edi,%ebx
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shrdl %cl,%edx,%eax
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shrl %cl,%edx
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rorl $1,%edi
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divl %ebx
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movl z,%ebx
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movl %eax,%ecx
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imull %eax,%edi
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mull n
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addl %edi,%edx
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subl %eax,%ebx
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movl z+4,%ecx
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movl n,%eax
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sbbl %edx,%ecx
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sbbl %edx,%edx
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andl %edx,%eax
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andl n+4,%edx
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addl %ebx,%eax
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adcl %ecx,%edx
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.Lexit:
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movl saveebx,%ebx
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movl saveedi,%edi
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end;
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*)
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||||||
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{$define FPC_SYSTEM_HAS_MUL_QWORD}
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{ multiplies two qwords
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the longbool for checkoverflow avoids a misaligned stack
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}
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function fpc_mul_qword(f1,f2 : qword;checkoverflow : longbool) : qword;[public,alias: 'FPC_MUL_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
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var
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_f1,bitpos : qword;
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l : longint;
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r : qword;
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|
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||||||
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begin
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||||||
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if not(checkoverflow) then
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|
begin
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||||||
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{ the following piece of code is taken from the }
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||||||
|
{ AMD Athlon Processor x86 Code Optimization manual }
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||||||
|
asm
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movl f1+4,%edx
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movl f2+4,%ecx
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orl %ecx,%edx
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movl f2,%edx
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movl f1,%eax
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jnz .Lqwordmultwomul
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mull %edx
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jmp .Lqwordmulready
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.Lqwordmultwomul:
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imul f1+4,%edx
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imul %eax,%ecx
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addl %edx,%ecx
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mull f2
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add %ecx,%edx
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|
.Lqwordmulready:
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|
movl %eax,r
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|
movl %edx,r+4
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|
end [ 'eax','edx','ecx' ];
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|
fpc_mul_qword:=r;
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||||||
|
end
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||||||
|
else
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|
begin
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||||||
|
fpc_mul_qword:=0;
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||||||
|
bitpos:=1;
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||||||
|
|
||||||
|
// store f1 for overflow checking
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_f1:=f1;
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||||||
|
|
||||||
|
for l:=0 to 63 do
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||||||
|
begin
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||||||
|
if (f2 and bitpos)<>0 then
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||||||
|
fpc_mul_qword:=fpc_mul_qword+f1;
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||||||
|
|
||||||
|
f1:=f1 shl 1;
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||||||
|
bitpos:=bitpos shl 1;
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||||||
|
end;
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||||||
|
|
||||||
|
{ if one of the operands is greater than the result an }
|
||||||
|
{ overflow occurs }
|
||||||
|
if checkoverflow and (_f1 <> 0) and (f2 <>0) and
|
||||||
|
((_f1>fpc_mul_qword) or (f2>fpc_mul_qword)) then
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||||||
|
HandleErrorFrame(215,get_frame);
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||||||
|
end;
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||||||
|
end;
|
||||||
|
|
||||||
|
{
|
||||||
|
$Log$
|
||||||
|
Revision 1.1 2003-09-14 11:34:13 peter
|
||||||
|
* moved int64 asm code to int64p.inc
|
||||||
|
* save ebx,esi
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||||||
|
|
||||||
|
}
|
@ -96,71 +96,17 @@
|
|||||||
count_leading_zeros:=r;
|
count_leading_zeros:=r;
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||||||
end;
|
end;
|
||||||
|
|
||||||
|
|
||||||
|
{$ifndef FPC_SYSTEM_HAS_DIV_QWORD}
|
||||||
function fpc_div_qword(n,z : qword) : qword;[public,alias: 'FPC_DIV_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
function fpc_div_qword(n,z : qword) : qword;[public,alias: 'FPC_DIV_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
||||||
|
|
||||||
var
|
var
|
||||||
shift,lzz,lzn : longint;
|
shift,lzz,lzn : longint;
|
||||||
{ one : qword; }
|
|
||||||
|
|
||||||
begin
|
begin
|
||||||
fpc_div_qword:=0;
|
fpc_div_qword:=0;
|
||||||
if n=0 then
|
if n=0 then
|
||||||
HandleErrorFrame(200,get_frame);
|
HandleErrorFrame(200,get_frame);
|
||||||
{$ifdef i386}
|
|
||||||
{ the following piece of code is taken from the }
|
|
||||||
{ AMD Athlon Processor x86 Code Optimization manual }
|
|
||||||
asm
|
|
||||||
movl n+4,%ecx
|
|
||||||
movl n,%ebx
|
|
||||||
movl z+4,%edx
|
|
||||||
movl z,%eax
|
|
||||||
testl %ecx,%ecx
|
|
||||||
jnz .Lqworddivbigdivisor
|
|
||||||
cmpl %ebx,%edx
|
|
||||||
jae .Lqworddivtwo_divs
|
|
||||||
divl %ebx
|
|
||||||
movl %ecx,%edx
|
|
||||||
leave
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|
||||||
ret $16
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|
||||||
|
|
||||||
.Lqworddivtwo_divs:
|
|
||||||
movl %eax,%ecx
|
|
||||||
movl %edx,%eax
|
|
||||||
xorl %edx,%edx
|
|
||||||
divl %ebx
|
|
||||||
xchgl %ecx,%eax
|
|
||||||
divl %ebx
|
|
||||||
movl %ecx,%edx
|
|
||||||
leave
|
|
||||||
ret $16
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|
||||||
|
|
||||||
.Lqworddivbigdivisor:
|
|
||||||
movl %ecx,%edi
|
|
||||||
shrl $1,%edx
|
|
||||||
rcrl $1,%eax
|
|
||||||
rorl $1,%edi
|
|
||||||
rcrl $1,%ebx
|
|
||||||
bsrl %ecx,%ecx
|
|
||||||
shrdl %cl,%edi,%ebx
|
|
||||||
shrdl %cl,%edx,%eax
|
|
||||||
shrl %cl,%edx
|
|
||||||
roll $1,%edi
|
|
||||||
divl %ebx
|
|
||||||
movl z,%ebx
|
|
||||||
movl %eax,%ecx
|
|
||||||
imull %eax,%edi
|
|
||||||
mull n
|
|
||||||
addl %edi,%edx
|
|
||||||
subl %eax,%ebx
|
|
||||||
movl %ecx,%eax
|
|
||||||
movl z+4,%ecx
|
|
||||||
sbbl %edx,%ecx
|
|
||||||
sbbl $0,%eax
|
|
||||||
xorl %edx,%edx
|
|
||||||
leave
|
|
||||||
ret $16
|
|
||||||
end;
|
|
||||||
{$else i386}
|
|
||||||
lzz:=count_leading_zeros(z);
|
lzz:=count_leading_zeros(z);
|
||||||
lzn:=count_leading_zeros(n);
|
lzn:=count_leading_zeros(n);
|
||||||
{ if the denominator contains less zeros }
|
{ if the denominator contains less zeros }
|
||||||
@ -179,9 +125,11 @@
|
|||||||
dec(shift);
|
dec(shift);
|
||||||
n:=n shr 1;
|
n:=n shr 1;
|
||||||
until shift<0;
|
until shift<0;
|
||||||
{$endif i386}
|
|
||||||
end;
|
end;
|
||||||
|
{$endif FPC_SYSTEM_HAS_DIV_QWORD}
|
||||||
|
|
||||||
|
|
||||||
|
{$ifndef FPC_SYSTEM_HAS_MOD_QWORD}
|
||||||
function fpc_mod_qword(n,z : qword) : qword;[public,alias: 'FPC_MOD_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
function fpc_mod_qword(n,z : qword) : qword;[public,alias: 'FPC_MOD_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
||||||
|
|
||||||
var
|
var
|
||||||
@ -191,66 +139,6 @@
|
|||||||
fpc_mod_qword:=0;
|
fpc_mod_qword:=0;
|
||||||
if n=0 then
|
if n=0 then
|
||||||
HandleErrorFrame(200,get_frame);
|
HandleErrorFrame(200,get_frame);
|
||||||
{$ifdef i386_not_working_correct}
|
|
||||||
{ the following piece of code is taken from the }
|
|
||||||
{ AMD Athlon Processor x86 Code Optimization manual }
|
|
||||||
asm
|
|
||||||
movl n+4,%ecx
|
|
||||||
movl n,%ebx
|
|
||||||
movl z+4,%edx
|
|
||||||
movl z,%eax
|
|
||||||
testl %ecx,%ecx
|
|
||||||
jnz .Lqwordmodr_big_divisior
|
|
||||||
cmpl %ebx,%edx
|
|
||||||
jae .Lqwordmodr_two_divs
|
|
||||||
divl %ebx
|
|
||||||
movl %edx,%eax
|
|
||||||
movl %ecx,%edx
|
|
||||||
leave
|
|
||||||
ret $16
|
|
||||||
|
|
||||||
.Lqwordmodr_two_divs:
|
|
||||||
movl %eax,%ecx
|
|
||||||
movl %edx,%eax
|
|
||||||
xorl %edx,%edx
|
|
||||||
divl %ebx
|
|
||||||
movl %ecx,%eax
|
|
||||||
divl %ebx
|
|
||||||
movl %edx,%eax
|
|
||||||
xorl %edx,%edx
|
|
||||||
leave
|
|
||||||
ret $16
|
|
||||||
|
|
||||||
.Lqwordmodr_big_divisior:
|
|
||||||
movl %ecx,%edi
|
|
||||||
shrl $1,%edx
|
|
||||||
rcrl $1,%eax
|
|
||||||
rorl $1,%edi
|
|
||||||
rcrl $1,%ebx
|
|
||||||
bsrl %ecx,%ecx
|
|
||||||
shrdl %cl,%edi,%ebx
|
|
||||||
shrdl %cl,%edx,%eax
|
|
||||||
shrl %cl,%edx
|
|
||||||
rorl $1,%edi
|
|
||||||
divl %ebx
|
|
||||||
movl z,%ebx
|
|
||||||
movl %eax,%ecx
|
|
||||||
imull %eax,%edi
|
|
||||||
mull n
|
|
||||||
addl %edi,%edx
|
|
||||||
subl %eax,%ebx
|
|
||||||
movl z+4,%ecx
|
|
||||||
movl n,%eax
|
|
||||||
sbbl %edx,%ecx
|
|
||||||
sbbl %edx,%edx
|
|
||||||
andl %edx,%eax
|
|
||||||
andl n+4,%edx
|
|
||||||
addl %ebx,%eax
|
|
||||||
adcl %ecx,%edx
|
|
||||||
leave
|
|
||||||
ret $16
|
|
||||||
end;
|
|
||||||
{$else i386}
|
|
||||||
lzz:=count_leading_zeros(z);
|
lzz:=count_leading_zeros(z);
|
||||||
lzn:=count_leading_zeros(n);
|
lzn:=count_leading_zeros(n);
|
||||||
{ if the denominator contains less zeros }
|
{ if the denominator contains less zeros }
|
||||||
@ -270,9 +158,11 @@
|
|||||||
n:=n shr 1;
|
n:=n shr 1;
|
||||||
until shift<0;
|
until shift<0;
|
||||||
fpc_mod_qword:=z;
|
fpc_mod_qword:=z;
|
||||||
{$endif i386}
|
|
||||||
end;
|
end;
|
||||||
|
{$endif FPC_SYSTEM_HAS_MOD_QWORD}
|
||||||
|
|
||||||
|
|
||||||
|
{$ifndef FPC_SYSTEM_HAS_DIV_INT64}
|
||||||
function fpc_div_int64(n,z : int64) : int64;[public,alias: 'FPC_DIV_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
function fpc_div_int64(n,z : int64) : int64;[public,alias: 'FPC_DIV_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
||||||
|
|
||||||
var
|
var
|
||||||
@ -307,7 +197,10 @@
|
|||||||
fpc_div_int64:=q1 div q2;
|
fpc_div_int64:=q1 div q2;
|
||||||
end;
|
end;
|
||||||
end;
|
end;
|
||||||
|
{$endif FPC_SYSTEM_HAS_DIV_INT64}
|
||||||
|
|
||||||
|
|
||||||
|
{$ifndef FPC_SYSTEM_HAS_MOD_INT64}
|
||||||
function fpc_mod_int64(n,z : int64) : int64;[public,alias: 'FPC_MOD_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
function fpc_mod_int64(n,z : int64) : int64;[public,alias: 'FPC_MOD_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
||||||
|
|
||||||
var
|
var
|
||||||
@ -340,7 +233,10 @@
|
|||||||
else
|
else
|
||||||
fpc_mod_int64:=r;
|
fpc_mod_int64:=r;
|
||||||
end;
|
end;
|
||||||
|
{$endif FPC_SYSTEM_HAS_MOD_INT64}
|
||||||
|
|
||||||
|
|
||||||
|
{$ifndef FPC_SYSTEM_HAS_MUL_QWORD}
|
||||||
{ multiplies two qwords
|
{ multiplies two qwords
|
||||||
the longbool for checkoverflow avoids a misaligned stack
|
the longbool for checkoverflow avoids a misaligned stack
|
||||||
}
|
}
|
||||||
@ -350,40 +246,7 @@
|
|||||||
_f1,bitpos : qword;
|
_f1,bitpos : qword;
|
||||||
l : longint;
|
l : longint;
|
||||||
|
|
||||||
{$ifdef i386}
|
|
||||||
r : qword;
|
|
||||||
{$endif i386}
|
|
||||||
|
|
||||||
begin
|
begin
|
||||||
{$ifdef i386}
|
|
||||||
if not(checkoverflow) then
|
|
||||||
begin
|
|
||||||
{ the following piece of code is taken from the }
|
|
||||||
{ AMD Athlon Processor x86 Code Optimization manual }
|
|
||||||
asm
|
|
||||||
movl f1+4,%edx
|
|
||||||
movl f2+4,%ecx
|
|
||||||
orl %ecx,%edx
|
|
||||||
movl f2,%edx
|
|
||||||
movl f1,%eax
|
|
||||||
jnz .Lqwordmultwomul
|
|
||||||
mull %edx
|
|
||||||
jmp .Lqwordmulready
|
|
||||||
.Lqwordmultwomul:
|
|
||||||
imul f1+4,%edx
|
|
||||||
imul %eax,%ecx
|
|
||||||
addl %edx,%ecx
|
|
||||||
mull f2
|
|
||||||
add %ecx,%edx
|
|
||||||
.Lqwordmulready:
|
|
||||||
movl %eax,r
|
|
||||||
movl %edx,r+4
|
|
||||||
end;
|
|
||||||
fpc_mul_qword:=r;
|
|
||||||
end
|
|
||||||
else
|
|
||||||
{$endif i386}
|
|
||||||
begin
|
|
||||||
fpc_mul_qword:=0;
|
fpc_mul_qword:=0;
|
||||||
bitpos:=1;
|
bitpos:=1;
|
||||||
|
|
||||||
@ -404,9 +267,11 @@
|
|||||||
if checkoverflow and (_f1 <> 0) and (f2 <>0) and
|
if checkoverflow and (_f1 <> 0) and (f2 <>0) and
|
||||||
((_f1>fpc_mul_qword) or (f2>fpc_mul_qword)) then
|
((_f1>fpc_mul_qword) or (f2>fpc_mul_qword)) then
|
||||||
HandleErrorFrame(215,get_frame);
|
HandleErrorFrame(215,get_frame);
|
||||||
end;
|
|
||||||
end;
|
end;
|
||||||
|
{$endif FPC_SYSTEM_HAS_MUL_QWORD}
|
||||||
|
|
||||||
|
|
||||||
|
{$ifndef FPC_SYSTEM_HAS_MUL_INT64}
|
||||||
function fpc_mul_int64(f1,f2 : int64;checkoverflow : longbool) : int64;[public,alias: 'FPC_MUL_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
function fpc_mul_int64(f1,f2 : int64;checkoverflow : longbool) : int64;[public,alias: 'FPC_MUL_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
||||||
|
|
||||||
var
|
var
|
||||||
@ -448,6 +313,8 @@
|
|||||||
fpc_mul_int64:=q3;
|
fpc_mul_int64:=q3;
|
||||||
end;
|
end;
|
||||||
end;
|
end;
|
||||||
|
{$endif FPC_SYSTEM_HAS_MUL_INT64}
|
||||||
|
|
||||||
|
|
||||||
procedure qword_str(value : qword;var s : string);
|
procedure qword_str(value : qword;var s : string);
|
||||||
|
|
||||||
@ -463,6 +330,7 @@
|
|||||||
s:=hs;
|
s:=hs;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
|
|
||||||
procedure int64_str(value : int64;var s : string);
|
procedure int64_str(value : int64;var s : string);
|
||||||
|
|
||||||
var
|
var
|
||||||
@ -480,6 +348,7 @@
|
|||||||
qword_str(qword(value),s);
|
qword_str(qword(value),s);
|
||||||
end;
|
end;
|
||||||
|
|
||||||
|
|
||||||
procedure fpc_shortstr_qword(v : qword;len : longint;var s : shortstring);[public,alias:'FPC_SHORTSTR_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
procedure fpc_shortstr_qword(v : qword;len : longint;var s : shortstring);[public,alias:'FPC_SHORTSTR_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
|
||||||
|
|
||||||
begin
|
begin
|
||||||
@ -641,7 +510,11 @@
|
|||||||
|
|
||||||
{
|
{
|
||||||
$Log$
|
$Log$
|
||||||
Revision 1.21 2003-09-03 14:09:37 florian
|
Revision 1.22 2003-09-14 11:34:13 peter
|
||||||
|
* moved int64 asm code to int64p.inc
|
||||||
|
* save ebx,esi
|
||||||
|
|
||||||
|
Revision 1.21 2003/09/03 14:09:37 florian
|
||||||
* arm fixes to the common rtl code
|
* arm fixes to the common rtl code
|
||||||
* some generic math code fixed
|
* some generic math code fixed
|
||||||
* ...
|
* ...
|
||||||
|
@ -245,6 +245,7 @@ end;
|
|||||||
{$i sstrings.inc}
|
{$i sstrings.inc}
|
||||||
|
|
||||||
{ requires sstrings.inc for initval }
|
{ requires sstrings.inc for initval }
|
||||||
|
{$I int64p.inc}
|
||||||
{$I int64.inc}
|
{$I int64.inc}
|
||||||
|
|
||||||
{Requires int64.inc, since that contains the VAL functions for int64 and qword}
|
{Requires int64.inc, since that contains the VAL functions for int64 and qword}
|
||||||
@ -767,7 +768,11 @@ end;
|
|||||||
|
|
||||||
{
|
{
|
||||||
$Log$
|
$Log$
|
||||||
Revision 1.42 2003-09-03 14:09:37 florian
|
Revision 1.43 2003-09-14 11:34:13 peter
|
||||||
|
* moved int64 asm code to int64p.inc
|
||||||
|
* save ebx,esi
|
||||||
|
|
||||||
|
Revision 1.42 2003/09/03 14:09:37 florian
|
||||||
* arm fixes to the common rtl code
|
* arm fixes to the common rtl code
|
||||||
* some generic math code fixed
|
* some generic math code fixed
|
||||||
* ...
|
* ...
|
||||||
|
@ -19,7 +19,7 @@
|
|||||||
|
|
||||||
{$ASMMODE ATT}
|
{$ASMMODE ATT}
|
||||||
|
|
||||||
function FpSysCall(sysnr:TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL0'];
|
function FpSysCall(sysnr:TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL0'];
|
||||||
|
|
||||||
asm
|
asm
|
||||||
{ load the registers... }
|
{ load the registers... }
|
||||||
@ -49,7 +49,7 @@ asm
|
|||||||
.LSyscOK:
|
.LSyscOK:
|
||||||
end;
|
end;
|
||||||
|
|
||||||
function FpSysCall(sysnr,param1 : TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL1'];
|
function FpSysCall(sysnr,param1 : TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL1'];
|
||||||
|
|
||||||
asm
|
asm
|
||||||
{ load the registers... }
|
{ load the registers... }
|
||||||
@ -80,7 +80,7 @@ asm
|
|||||||
.LSyscOK:
|
.LSyscOK:
|
||||||
end;
|
end;
|
||||||
|
|
||||||
function FpSysCall(sysnr,param1,param2 : TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL2'];
|
function FpSysCall(sysnr,param1,param2 : TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL2'];
|
||||||
|
|
||||||
asm
|
asm
|
||||||
{ load the registers... }
|
{ load the registers... }
|
||||||
@ -112,7 +112,7 @@ asm
|
|||||||
.LSyscOK:
|
.LSyscOK:
|
||||||
end;
|
end;
|
||||||
|
|
||||||
function FpSysCall(sysnr,param1,param2,param3:TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL3'];
|
function FpSysCall(sysnr,param1,param2,param3:TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL3'];
|
||||||
|
|
||||||
asm
|
asm
|
||||||
{ load the registers... }
|
{ load the registers... }
|
||||||
@ -145,7 +145,7 @@ asm
|
|||||||
.LSyscOK:
|
.LSyscOK:
|
||||||
end;
|
end;
|
||||||
|
|
||||||
function FpSysCall(sysnr,param1,param2,param3,param4:TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL4'];
|
function FpSysCall(sysnr,param1,param2,param3,param4:TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL4'];
|
||||||
|
|
||||||
asm
|
asm
|
||||||
{ load the registers... }
|
{ load the registers... }
|
||||||
@ -179,7 +179,7 @@ asm
|
|||||||
.LSyscOK:
|
.LSyscOK:
|
||||||
end;
|
end;
|
||||||
|
|
||||||
function FpSysCall(sysnr,param1,param2,param3,param4,param5 : TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL5'];
|
function FpSysCall(sysnr,param1,param2,param3,param4,param5 : TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL5'];
|
||||||
|
|
||||||
asm
|
asm
|
||||||
{ load the registers... }
|
{ load the registers... }
|
||||||
@ -216,7 +216,7 @@ end;
|
|||||||
|
|
||||||
{$ifdef notsupported}
|
{$ifdef notsupported}
|
||||||
{ Only 5 params are pushed, so it'll not work as expected (PFV) }
|
{ Only 5 params are pushed, so it'll not work as expected (PFV) }
|
||||||
function FpSysCall(sysnr,param1,param2,param3,param4,param5,param6 : TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL6'];
|
function FpSysCall(sysnr,param1,param2,param3,param4,param5,param6 : TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL6'];
|
||||||
|
|
||||||
asm
|
asm
|
||||||
{ load the registers... }
|
{ load the registers... }
|
||||||
@ -261,7 +261,7 @@ end;
|
|||||||
--- Main:The System Call Self ---
|
--- Main:The System Call Self ---
|
||||||
*****************************************************************************}
|
*****************************************************************************}
|
||||||
|
|
||||||
Procedure FpSysCall( callnr:TSysParam;var regs : SysCallregs );assembler;
|
Procedure FpSysCall( callnr:TSysParam;var regs : SysCallregs );assembler;{$ifndef VER1_0}oldfpccall;{$endif}
|
||||||
{
|
{
|
||||||
This function puts the registers in place, does the call, and then
|
This function puts the registers in place, does the call, and then
|
||||||
copies back the registers as they are after the SysCall.
|
copies back the registers as they are after the SysCall.
|
||||||
@ -341,7 +341,11 @@ end;
|
|||||||
|
|
||||||
{
|
{
|
||||||
$Log$
|
$Log$
|
||||||
Revision 1.7 2002-12-24 19:45:59 peter
|
Revision 1.8 2003-09-14 11:34:13 peter
|
||||||
|
* moved int64 asm code to int64p.inc
|
||||||
|
* save ebx,esi
|
||||||
|
|
||||||
|
Revision 1.7 2002/12/24 19:45:59 peter
|
||||||
* only set errno when syscall fails
|
* only set errno when syscall fails
|
||||||
|
|
||||||
Revision 1.6 2002/12/23 21:17:53 peter
|
Revision 1.6 2002/12/23 21:17:53 peter
|
||||||
|
@ -34,19 +34,23 @@ Type
|
|||||||
|
|
||||||
TSysParam = Longint;
|
TSysParam = Longint;
|
||||||
|
|
||||||
function Do_SysCall(sysnr:TSysParam):TSysResult; external name 'FPC_SYSCALL0';
|
function Do_SysCall(sysnr:TSysParam):TSysResult;{$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL0';
|
||||||
function Do_SysCall(sysnr,param1:TSysParam):TSysResult; external name 'FPC_SYSCALL1';
|
function Do_SysCall(sysnr,param1:TSysParam):TSysResult;{$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL1';
|
||||||
function Do_SysCall(sysnr,param1,param2:TSysParam):TSysResult; external name 'FPC_SYSCALL2';
|
function Do_SysCall(sysnr,param1,param2:TSysParam):TSysResult; {$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL2';
|
||||||
function Do_SysCall(sysnr,param1,param2,param3:TSysParam):TSysResult; external name 'FPC_SYSCALL3';
|
function Do_SysCall(sysnr,param1,param2,param3:TSysParam):TSysResult;{$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL3';
|
||||||
function Do_SysCall(sysnr,param1,param2,param3,param4:TSysParam):TSysResult; external name 'FPC_SYSCALL4';
|
function Do_SysCall(sysnr,param1,param2,param3,param4:TSysParam):TSysResult;{$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL4';
|
||||||
function Do_SysCall(sysnr,param1,param2,param3,param4,param5:TSysParam):TSysResult; external name 'FPC_SYSCALL5';
|
function Do_SysCall(sysnr,param1,param2,param3,param4,param5:TSysParam):TSysResult; {$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL5';
|
||||||
{$ifdef notsupported}
|
{$ifdef notsupported}
|
||||||
function Do_SysCall(sysnr,param1,param2,param3,param4,param5,param6:TSysParam):TSysResult; external name 'FPC_SYSCALL6';
|
function Do_SysCall(sysnr,param1,param2,param3,param4,param5,param6:TSysParam):TSysResult; {$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL6';
|
||||||
{$endif notsupported}
|
{$endif notsupported}
|
||||||
|
|
||||||
{
|
{
|
||||||
$Log$
|
$Log$
|
||||||
Revision 1.4 2003-07-06 21:26:10 peter
|
Revision 1.5 2003-09-14 11:34:13 peter
|
||||||
|
* moved int64 asm code to int64p.inc
|
||||||
|
* save ebx,esi
|
||||||
|
|
||||||
|
Revision 1.4 2003/07/06 21:26:10 peter
|
||||||
* syscall6 alias fixed
|
* syscall6 alias fixed
|
||||||
|
|
||||||
Revision 1.3 2002/12/18 20:41:33 peter
|
Revision 1.3 2002/12/18 20:41:33 peter
|
||||||
|
23
rtl/powerpc/int64p.inc
Normal file
23
rtl/powerpc/int64p.inc
Normal file
@ -0,0 +1,23 @@
|
|||||||
|
{
|
||||||
|
$Id$
|
||||||
|
This file is part of the Free Pascal run time library.
|
||||||
|
Copyright (c) 1999-2000 by the Free Pascal development team
|
||||||
|
|
||||||
|
This file contains some helper routines for int64 and qword
|
||||||
|
|
||||||
|
See the file COPYING.FPC, included in this distribution,
|
||||||
|
for details about the copyright.
|
||||||
|
|
||||||
|
This program is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||||
|
|
||||||
|
**********************************************************************}
|
||||||
|
|
||||||
|
{
|
||||||
|
$Log$
|
||||||
|
Revision 1.1 2003-09-14 11:34:13 peter
|
||||||
|
* moved int64 asm code to int64p.inc
|
||||||
|
* save ebx,esi
|
||||||
|
|
||||||
|
}
|
23
rtl/sparc/int64p.inc
Normal file
23
rtl/sparc/int64p.inc
Normal file
@ -0,0 +1,23 @@
|
|||||||
|
{
|
||||||
|
$Id$
|
||||||
|
This file is part of the Free Pascal run time library.
|
||||||
|
Copyright (c) 1999-2000 by the Free Pascal development team
|
||||||
|
|
||||||
|
This file contains some helper routines for int64 and qword
|
||||||
|
|
||||||
|
See the file COPYING.FPC, included in this distribution,
|
||||||
|
for details about the copyright.
|
||||||
|
|
||||||
|
This program is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||||
|
|
||||||
|
**********************************************************************}
|
||||||
|
|
||||||
|
{
|
||||||
|
$Log$
|
||||||
|
Revision 1.1 2003-09-14 11:34:13 peter
|
||||||
|
* moved int64 asm code to int64p.inc
|
||||||
|
* save ebx,esi
|
||||||
|
|
||||||
|
}
|
Loading…
Reference in New Issue
Block a user