* moved int64 asm code to int64p.inc

* save ebx,esi
This commit is contained in:
peter 2003-09-14 11:34:13 +00:00
parent c82243df4d
commit abbc3fa755
8 changed files with 358 additions and 189 deletions

View File

@ -31,54 +31,54 @@ asm
movl dest,%edi movl dest,%edi
movl source,%esi movl source,%esi
movl %edi,%eax movl %edi,%eax
movl count,%ebx movl count,%edx
{ check for zero or negative count } { check for zero or negative count }
cmpl $0,%ebx cmpl $0,%edx
jle .LMoveEnd jle .LMoveEnd
{ Check for back or forward } { Check for back or forward }
sub %esi,%eax sub %esi,%eax
jz .LMoveEnd { Do nothing when source=dest } jz .LMoveEnd { Do nothing when source=dest }
jc .LFMove { Do forward, dest<source } jc .LFMove { Do forward, dest<source }
cmp %ebx,%eax cmp %edx,%eax
jb .LBMove { Dest is in range of move, do backward } jb .LBMove { Dest is in range of move, do backward }
{ Forward Copy } { Forward Copy }
.LFMove: .LFMove:
cld cld
cmpl $15,%ebx cmpl $15,%edx
jl .LFMove1 jl .LFMove1
movl %edi,%ecx { Align on 32bits } movl %edi,%ecx { Align on 32bits }
negl %ecx negl %ecx
andl $3,%ecx andl $3,%ecx
subl %ecx,%ebx subl %ecx,%edx
rep rep
movsb movsb
movl %ebx,%ecx movl %edx,%ecx
andl $3,%ebx andl $3,%edx
shrl $2,%ecx shrl $2,%ecx
rep rep
movsl movsl
.LFMove1: .LFMove1:
movl %ebx,%ecx movl %edx,%ecx
rep rep
movsb movsb
jmp .LMoveEnd jmp .LMoveEnd
{ Backward Copy } { Backward Copy }
.LBMove: .LBMove:
std std
addl %ebx,%esi addl %edx,%esi
addl %ebx,%edi addl %edx,%edi
movl %edi,%ecx movl %edi,%ecx
decl %esi decl %esi
decl %edi decl %edi
cmpl $15,%ebx cmpl $15,%edx
jl .LBMove1 jl .LBMove1
negl %ecx { Align on 32bits } negl %ecx { Align on 32bits }
andl $3,%ecx andl $3,%ecx
subl %ecx,%ebx subl %ecx,%edx
rep rep
movsb movsb
movl %ebx,%ecx movl %edx,%ecx
andl $3,%ebx andl $3,%edx
shrl $2,%ecx shrl $2,%ecx
subl $3,%esi subl $3,%esi
subl $3,%edi subl $3,%edi
@ -87,7 +87,7 @@ asm
addl $3,%esi addl $3,%esi
addl $3,%edi addl $3,%edi
.LBMove1: .LBMove1:
movl %ebx,%ecx movl %edx,%ecx
rep rep
movsb movsb
cld cld
@ -113,10 +113,10 @@ asm
cmpl $7,%ecx cmpl $7,%ecx
jl .LFill1 jl .LFill1
movb %al,%ah movb %al,%ah
movl %eax,%ebx movl %eax,%edx
shll $16,%eax shll $16,%eax
movw %dx,%ax
movl %ecx,%edx movl %ecx,%edx
movw %bx,%ax
movl %edi,%ecx { Align on 32bits } movl %edi,%ecx { Align on 32bits }
negl %ecx negl %ecx
andl $3,%ecx andl $3,%ecx
@ -1313,7 +1313,11 @@ end;
{ {
$Log$ $Log$
Revision 1.46 2003-09-08 18:21:37 peter Revision 1.47 2003-09-14 11:34:13 peter
* moved int64 asm code to int64p.inc
* save ebx,esi
Revision 1.46 2003/09/08 18:21:37 peter
* save edi,esi,ebx * save edi,esi,ebx
Revision 1.45 2003/06/01 14:50:17 jonas Revision 1.45 2003/06/01 14:50:17 jonas

233
rtl/i386/int64p.inc Normal file
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@ -0,0 +1,233 @@
{
$Id$
This file is part of the Free Pascal run time library.
Copyright (c) 1999-2000 by the Free Pascal development team
This file contains some helper routines for int64 and qword
See the file COPYING.FPC, included in this distribution,
for details about the copyright.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
**********************************************************************}
{$Q- no overflow checking }
{$R- no range checking }
{$define FPC_SYSTEM_HAS_DIV_QWORD}
function fpc_div_qword(n,z : qword) : qword;assembler;[public,alias: 'FPC_DIV_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
var
shift,lzz,lzn : longint;
saveebx,saveedi : longint;
asm
movl %ebx,saveebx
movl %edi,saveedi
{ the following piece of code is taken from the }
{ AMD Athlon Processor x86 Code Optimization manual }
movl n+4,%ecx
movl n,%ebx
movl %ecx,%eax
orl %ebx,%eax
jnz .Lnodivzero
pushl %ebp
pushl $200
call HandleErrorFrame
jmp .Lexit
.Lnodivzero:
movl z+4,%edx
movl z,%eax
testl %ecx,%ecx
jnz .Lqworddivbigdivisor
cmpl %ebx,%edx
jae .Lqworddivtwo_divs
divl %ebx
movl %ecx,%edx
jmp .Lexit
.Lqworddivtwo_divs:
movl %eax,%ecx
movl %edx,%eax
xorl %edx,%edx
divl %ebx
xchgl %ecx,%eax
divl %ebx
movl %ecx,%edx
jmp .Lexit
.Lqworddivbigdivisor:
movl %ecx,%edi
shrl $1,%edx
rcrl $1,%eax
rorl $1,%edi
rcrl $1,%ebx
bsrl %ecx,%ecx
shrdl %cl,%edi,%ebx
shrdl %cl,%edx,%eax
shrl %cl,%edx
roll $1,%edi
divl %ebx
movl z,%ebx
movl %eax,%ecx
imull %eax,%edi
mull n
addl %edi,%edx
subl %eax,%ebx
movl %ecx,%eax
movl z+4,%ecx
sbbl %edx,%ecx
sbbl $0,%eax
xorl %edx,%edx
.Lexit:
movl saveebx,%ebx
movl saveedi,%edi
end;
(*
This does not work correctly
{$define FPC_SYSTEM_HAS_MOD_QWORD}
function fpc_mod_qword(n,z : qword) : qword;[public,alias: 'FPC_MOD_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
var
shift,lzz,lzn : longint;
saveebx,saveedi : longint;
asm
movl %ebx,saveebx
movl %edi,saveedi
{ the following piece of code is taken from the }
{ AMD Athlon Processor x86 Code Optimization manual }
movl n+4,%ecx
movl n,%ebx
movl %ecx,%eax
orl %ebx,%eax
jnz .Lnodivzero
pushl %ebp
pushl $200
call HandleErrorFrame
jmp .Lexit
movl z+4,%edx
movl z,%eax
testl %ecx,%ecx
jnz .Lqwordmodr_big_divisior
cmpl %ebx,%edx
jae .Lqwordmodr_two_divs
divl %ebx
movl %edx,%eax
movl %ecx,%edx
jmp .Lexit
.Lqwordmodr_two_divs:
movl %eax,%ecx
movl %edx,%eax
xorl %edx,%edx
divl %ebx
movl %ecx,%eax
divl %ebx
movl %edx,%eax
xorl %edx,%edx
jmp .Lexit
.Lqwordmodr_big_divisior:
movl %ecx,%edi
shrl $1,%edx
rcrl $1,%eax
rorl $1,%edi
rcrl $1,%ebx
bsrl %ecx,%ecx
shrdl %cl,%edi,%ebx
shrdl %cl,%edx,%eax
shrl %cl,%edx
rorl $1,%edi
divl %ebx
movl z,%ebx
movl %eax,%ecx
imull %eax,%edi
mull n
addl %edi,%edx
subl %eax,%ebx
movl z+4,%ecx
movl n,%eax
sbbl %edx,%ecx
sbbl %edx,%edx
andl %edx,%eax
andl n+4,%edx
addl %ebx,%eax
adcl %ecx,%edx
.Lexit:
movl saveebx,%ebx
movl saveedi,%edi
end;
*)
{$define FPC_SYSTEM_HAS_MUL_QWORD}
{ multiplies two qwords
the longbool for checkoverflow avoids a misaligned stack
}
function fpc_mul_qword(f1,f2 : qword;checkoverflow : longbool) : qword;[public,alias: 'FPC_MUL_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
var
_f1,bitpos : qword;
l : longint;
r : qword;
begin
if not(checkoverflow) then
begin
{ the following piece of code is taken from the }
{ AMD Athlon Processor x86 Code Optimization manual }
asm
movl f1+4,%edx
movl f2+4,%ecx
orl %ecx,%edx
movl f2,%edx
movl f1,%eax
jnz .Lqwordmultwomul
mull %edx
jmp .Lqwordmulready
.Lqwordmultwomul:
imul f1+4,%edx
imul %eax,%ecx
addl %edx,%ecx
mull f2
add %ecx,%edx
.Lqwordmulready:
movl %eax,r
movl %edx,r+4
end [ 'eax','edx','ecx' ];
fpc_mul_qword:=r;
end
else
begin
fpc_mul_qword:=0;
bitpos:=1;
// store f1 for overflow checking
_f1:=f1;
for l:=0 to 63 do
begin
if (f2 and bitpos)<>0 then
fpc_mul_qword:=fpc_mul_qword+f1;
f1:=f1 shl 1;
bitpos:=bitpos shl 1;
end;
{ if one of the operands is greater than the result an }
{ overflow occurs }
if checkoverflow and (_f1 <> 0) and (f2 <>0) and
((_f1>fpc_mul_qword) or (f2>fpc_mul_qword)) then
HandleErrorFrame(215,get_frame);
end;
end;
{
$Log$
Revision 1.1 2003-09-14 11:34:13 peter
* moved int64 asm code to int64p.inc
* save ebx,esi
}

View File

@ -96,71 +96,17 @@
count_leading_zeros:=r; count_leading_zeros:=r;
end; end;
{$ifndef FPC_SYSTEM_HAS_DIV_QWORD}
function fpc_div_qword(n,z : qword) : qword;[public,alias: 'FPC_DIV_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif} function fpc_div_qword(n,z : qword) : qword;[public,alias: 'FPC_DIV_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
var var
shift,lzz,lzn : longint; shift,lzz,lzn : longint;
{ one : qword; }
begin begin
fpc_div_qword:=0; fpc_div_qword:=0;
if n=0 then if n=0 then
HandleErrorFrame(200,get_frame); HandleErrorFrame(200,get_frame);
{$ifdef i386}
{ the following piece of code is taken from the }
{ AMD Athlon Processor x86 Code Optimization manual }
asm
movl n+4,%ecx
movl n,%ebx
movl z+4,%edx
movl z,%eax
testl %ecx,%ecx
jnz .Lqworddivbigdivisor
cmpl %ebx,%edx
jae .Lqworddivtwo_divs
divl %ebx
movl %ecx,%edx
leave
ret $16
.Lqworddivtwo_divs:
movl %eax,%ecx
movl %edx,%eax
xorl %edx,%edx
divl %ebx
xchgl %ecx,%eax
divl %ebx
movl %ecx,%edx
leave
ret $16
.Lqworddivbigdivisor:
movl %ecx,%edi
shrl $1,%edx
rcrl $1,%eax
rorl $1,%edi
rcrl $1,%ebx
bsrl %ecx,%ecx
shrdl %cl,%edi,%ebx
shrdl %cl,%edx,%eax
shrl %cl,%edx
roll $1,%edi
divl %ebx
movl z,%ebx
movl %eax,%ecx
imull %eax,%edi
mull n
addl %edi,%edx
subl %eax,%ebx
movl %ecx,%eax
movl z+4,%ecx
sbbl %edx,%ecx
sbbl $0,%eax
xorl %edx,%edx
leave
ret $16
end;
{$else i386}
lzz:=count_leading_zeros(z); lzz:=count_leading_zeros(z);
lzn:=count_leading_zeros(n); lzn:=count_leading_zeros(n);
{ if the denominator contains less zeros } { if the denominator contains less zeros }
@ -179,9 +125,11 @@
dec(shift); dec(shift);
n:=n shr 1; n:=n shr 1;
until shift<0; until shift<0;
{$endif i386}
end; end;
{$endif FPC_SYSTEM_HAS_DIV_QWORD}
{$ifndef FPC_SYSTEM_HAS_MOD_QWORD}
function fpc_mod_qword(n,z : qword) : qword;[public,alias: 'FPC_MOD_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif} function fpc_mod_qword(n,z : qword) : qword;[public,alias: 'FPC_MOD_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
var var
@ -191,66 +139,6 @@
fpc_mod_qword:=0; fpc_mod_qword:=0;
if n=0 then if n=0 then
HandleErrorFrame(200,get_frame); HandleErrorFrame(200,get_frame);
{$ifdef i386_not_working_correct}
{ the following piece of code is taken from the }
{ AMD Athlon Processor x86 Code Optimization manual }
asm
movl n+4,%ecx
movl n,%ebx
movl z+4,%edx
movl z,%eax
testl %ecx,%ecx
jnz .Lqwordmodr_big_divisior
cmpl %ebx,%edx
jae .Lqwordmodr_two_divs
divl %ebx
movl %edx,%eax
movl %ecx,%edx
leave
ret $16
.Lqwordmodr_two_divs:
movl %eax,%ecx
movl %edx,%eax
xorl %edx,%edx
divl %ebx
movl %ecx,%eax
divl %ebx
movl %edx,%eax
xorl %edx,%edx
leave
ret $16
.Lqwordmodr_big_divisior:
movl %ecx,%edi
shrl $1,%edx
rcrl $1,%eax
rorl $1,%edi
rcrl $1,%ebx
bsrl %ecx,%ecx
shrdl %cl,%edi,%ebx
shrdl %cl,%edx,%eax
shrl %cl,%edx
rorl $1,%edi
divl %ebx
movl z,%ebx
movl %eax,%ecx
imull %eax,%edi
mull n
addl %edi,%edx
subl %eax,%ebx
movl z+4,%ecx
movl n,%eax
sbbl %edx,%ecx
sbbl %edx,%edx
andl %edx,%eax
andl n+4,%edx
addl %ebx,%eax
adcl %ecx,%edx
leave
ret $16
end;
{$else i386}
lzz:=count_leading_zeros(z); lzz:=count_leading_zeros(z);
lzn:=count_leading_zeros(n); lzn:=count_leading_zeros(n);
{ if the denominator contains less zeros } { if the denominator contains less zeros }
@ -270,9 +158,11 @@
n:=n shr 1; n:=n shr 1;
until shift<0; until shift<0;
fpc_mod_qword:=z; fpc_mod_qword:=z;
{$endif i386}
end; end;
{$endif FPC_SYSTEM_HAS_MOD_QWORD}
{$ifndef FPC_SYSTEM_HAS_DIV_INT64}
function fpc_div_int64(n,z : int64) : int64;[public,alias: 'FPC_DIV_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif} function fpc_div_int64(n,z : int64) : int64;[public,alias: 'FPC_DIV_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif}
var var
@ -307,7 +197,10 @@
fpc_div_int64:=q1 div q2; fpc_div_int64:=q1 div q2;
end; end;
end; end;
{$endif FPC_SYSTEM_HAS_DIV_INT64}
{$ifndef FPC_SYSTEM_HAS_MOD_INT64}
function fpc_mod_int64(n,z : int64) : int64;[public,alias: 'FPC_MOD_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif} function fpc_mod_int64(n,z : int64) : int64;[public,alias: 'FPC_MOD_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif}
var var
@ -340,7 +233,10 @@
else else
fpc_mod_int64:=r; fpc_mod_int64:=r;
end; end;
{$endif FPC_SYSTEM_HAS_MOD_INT64}
{$ifndef FPC_SYSTEM_HAS_MUL_QWORD}
{ multiplies two qwords { multiplies two qwords
the longbool for checkoverflow avoids a misaligned stack the longbool for checkoverflow avoids a misaligned stack
} }
@ -350,40 +246,7 @@
_f1,bitpos : qword; _f1,bitpos : qword;
l : longint; l : longint;
{$ifdef i386}
r : qword;
{$endif i386}
begin begin
{$ifdef i386}
if not(checkoverflow) then
begin
{ the following piece of code is taken from the }
{ AMD Athlon Processor x86 Code Optimization manual }
asm
movl f1+4,%edx
movl f2+4,%ecx
orl %ecx,%edx
movl f2,%edx
movl f1,%eax
jnz .Lqwordmultwomul
mull %edx
jmp .Lqwordmulready
.Lqwordmultwomul:
imul f1+4,%edx
imul %eax,%ecx
addl %edx,%ecx
mull f2
add %ecx,%edx
.Lqwordmulready:
movl %eax,r
movl %edx,r+4
end;
fpc_mul_qword:=r;
end
else
{$endif i386}
begin
fpc_mul_qword:=0; fpc_mul_qword:=0;
bitpos:=1; bitpos:=1;
@ -404,9 +267,11 @@
if checkoverflow and (_f1 <> 0) and (f2 <>0) and if checkoverflow and (_f1 <> 0) and (f2 <>0) and
((_f1>fpc_mul_qword) or (f2>fpc_mul_qword)) then ((_f1>fpc_mul_qword) or (f2>fpc_mul_qword)) then
HandleErrorFrame(215,get_frame); HandleErrorFrame(215,get_frame);
end;
end; end;
{$endif FPC_SYSTEM_HAS_MUL_QWORD}
{$ifndef FPC_SYSTEM_HAS_MUL_INT64}
function fpc_mul_int64(f1,f2 : int64;checkoverflow : longbool) : int64;[public,alias: 'FPC_MUL_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif} function fpc_mul_int64(f1,f2 : int64;checkoverflow : longbool) : int64;[public,alias: 'FPC_MUL_INT64']; {$ifdef hascompilerproc} compilerproc; {$endif}
var var
@ -448,6 +313,8 @@
fpc_mul_int64:=q3; fpc_mul_int64:=q3;
end; end;
end; end;
{$endif FPC_SYSTEM_HAS_MUL_INT64}
procedure qword_str(value : qword;var s : string); procedure qword_str(value : qword;var s : string);
@ -463,6 +330,7 @@
s:=hs; s:=hs;
end; end;
procedure int64_str(value : int64;var s : string); procedure int64_str(value : int64;var s : string);
var var
@ -480,6 +348,7 @@
qword_str(qword(value),s); qword_str(qword(value),s);
end; end;
procedure fpc_shortstr_qword(v : qword;len : longint;var s : shortstring);[public,alias:'FPC_SHORTSTR_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif} procedure fpc_shortstr_qword(v : qword;len : longint;var s : shortstring);[public,alias:'FPC_SHORTSTR_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
begin begin
@ -641,7 +510,11 @@
{ {
$Log$ $Log$
Revision 1.21 2003-09-03 14:09:37 florian Revision 1.22 2003-09-14 11:34:13 peter
* moved int64 asm code to int64p.inc
* save ebx,esi
Revision 1.21 2003/09/03 14:09:37 florian
* arm fixes to the common rtl code * arm fixes to the common rtl code
* some generic math code fixed * some generic math code fixed
* ... * ...

View File

@ -245,6 +245,7 @@ end;
{$i sstrings.inc} {$i sstrings.inc}
{ requires sstrings.inc for initval } { requires sstrings.inc for initval }
{$I int64p.inc}
{$I int64.inc} {$I int64.inc}
{Requires int64.inc, since that contains the VAL functions for int64 and qword} {Requires int64.inc, since that contains the VAL functions for int64 and qword}
@ -767,7 +768,11 @@ end;
{ {
$Log$ $Log$
Revision 1.42 2003-09-03 14:09:37 florian Revision 1.43 2003-09-14 11:34:13 peter
* moved int64 asm code to int64p.inc
* save ebx,esi
Revision 1.42 2003/09/03 14:09:37 florian
* arm fixes to the common rtl code * arm fixes to the common rtl code
* some generic math code fixed * some generic math code fixed
* ... * ...

View File

@ -19,7 +19,7 @@
{$ASMMODE ATT} {$ASMMODE ATT}
function FpSysCall(sysnr:TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL0']; function FpSysCall(sysnr:TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL0'];
asm asm
{ load the registers... } { load the registers... }
@ -49,7 +49,7 @@ asm
.LSyscOK: .LSyscOK:
end; end;
function FpSysCall(sysnr,param1 : TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL1']; function FpSysCall(sysnr,param1 : TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL1'];
asm asm
{ load the registers... } { load the registers... }
@ -80,7 +80,7 @@ asm
.LSyscOK: .LSyscOK:
end; end;
function FpSysCall(sysnr,param1,param2 : TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL2']; function FpSysCall(sysnr,param1,param2 : TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL2'];
asm asm
{ load the registers... } { load the registers... }
@ -112,7 +112,7 @@ asm
.LSyscOK: .LSyscOK:
end; end;
function FpSysCall(sysnr,param1,param2,param3:TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL3']; function FpSysCall(sysnr,param1,param2,param3:TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL3'];
asm asm
{ load the registers... } { load the registers... }
@ -145,7 +145,7 @@ asm
.LSyscOK: .LSyscOK:
end; end;
function FpSysCall(sysnr,param1,param2,param3,param4:TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL4']; function FpSysCall(sysnr,param1,param2,param3,param4:TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL4'];
asm asm
{ load the registers... } { load the registers... }
@ -179,7 +179,7 @@ asm
.LSyscOK: .LSyscOK:
end; end;
function FpSysCall(sysnr,param1,param2,param3,param4,param5 : TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL5']; function FpSysCall(sysnr,param1,param2,param3,param4,param5 : TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL5'];
asm asm
{ load the registers... } { load the registers... }
@ -216,7 +216,7 @@ end;
{$ifdef notsupported} {$ifdef notsupported}
{ Only 5 params are pushed, so it'll not work as expected (PFV) } { Only 5 params are pushed, so it'll not work as expected (PFV) }
function FpSysCall(sysnr,param1,param2,param3,param4,param5,param6 : TSysParam):TSysResult; assembler;[public,alias:'FPC_SYSCALL6']; function FpSysCall(sysnr,param1,param2,param3,param4,param5,param6 : TSysParam):TSysResult; assembler;{$ifndef VER1_0}oldfpccall;{$endif}[public,alias:'FPC_SYSCALL6'];
asm asm
{ load the registers... } { load the registers... }
@ -261,7 +261,7 @@ end;
--- Main:The System Call Self --- --- Main:The System Call Self ---
*****************************************************************************} *****************************************************************************}
Procedure FpSysCall( callnr:TSysParam;var regs : SysCallregs );assembler; Procedure FpSysCall( callnr:TSysParam;var regs : SysCallregs );assembler;{$ifndef VER1_0}oldfpccall;{$endif}
{ {
This function puts the registers in place, does the call, and then This function puts the registers in place, does the call, and then
copies back the registers as they are after the SysCall. copies back the registers as they are after the SysCall.
@ -341,7 +341,11 @@ end;
{ {
$Log$ $Log$
Revision 1.7 2002-12-24 19:45:59 peter Revision 1.8 2003-09-14 11:34:13 peter
* moved int64 asm code to int64p.inc
* save ebx,esi
Revision 1.7 2002/12/24 19:45:59 peter
* only set errno when syscall fails * only set errno when syscall fails
Revision 1.6 2002/12/23 21:17:53 peter Revision 1.6 2002/12/23 21:17:53 peter

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@ -34,19 +34,23 @@ Type
TSysParam = Longint; TSysParam = Longint;
function Do_SysCall(sysnr:TSysParam):TSysResult; external name 'FPC_SYSCALL0'; function Do_SysCall(sysnr:TSysParam):TSysResult;{$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL0';
function Do_SysCall(sysnr,param1:TSysParam):TSysResult; external name 'FPC_SYSCALL1'; function Do_SysCall(sysnr,param1:TSysParam):TSysResult;{$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL1';
function Do_SysCall(sysnr,param1,param2:TSysParam):TSysResult; external name 'FPC_SYSCALL2'; function Do_SysCall(sysnr,param1,param2:TSysParam):TSysResult; {$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL2';
function Do_SysCall(sysnr,param1,param2,param3:TSysParam):TSysResult; external name 'FPC_SYSCALL3'; function Do_SysCall(sysnr,param1,param2,param3:TSysParam):TSysResult;{$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL3';
function Do_SysCall(sysnr,param1,param2,param3,param4:TSysParam):TSysResult; external name 'FPC_SYSCALL4'; function Do_SysCall(sysnr,param1,param2,param3,param4:TSysParam):TSysResult;{$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL4';
function Do_SysCall(sysnr,param1,param2,param3,param4,param5:TSysParam):TSysResult; external name 'FPC_SYSCALL5'; function Do_SysCall(sysnr,param1,param2,param3,param4,param5:TSysParam):TSysResult; {$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL5';
{$ifdef notsupported} {$ifdef notsupported}
function Do_SysCall(sysnr,param1,param2,param3,param4,param5,param6:TSysParam):TSysResult; external name 'FPC_SYSCALL6'; function Do_SysCall(sysnr,param1,param2,param3,param4,param5,param6:TSysParam):TSysResult; {$ifndef VER1_0}oldfpccall;{$endif}external name 'FPC_SYSCALL6';
{$endif notsupported} {$endif notsupported}
{ {
$Log$ $Log$
Revision 1.4 2003-07-06 21:26:10 peter Revision 1.5 2003-09-14 11:34:13 peter
* moved int64 asm code to int64p.inc
* save ebx,esi
Revision 1.4 2003/07/06 21:26:10 peter
* syscall6 alias fixed * syscall6 alias fixed
Revision 1.3 2002/12/18 20:41:33 peter Revision 1.3 2002/12/18 20:41:33 peter

23
rtl/powerpc/int64p.inc Normal file
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@ -0,0 +1,23 @@
{
$Id$
This file is part of the Free Pascal run time library.
Copyright (c) 1999-2000 by the Free Pascal development team
This file contains some helper routines for int64 and qword
See the file COPYING.FPC, included in this distribution,
for details about the copyright.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
**********************************************************************}
{
$Log$
Revision 1.1 2003-09-14 11:34:13 peter
* moved int64 asm code to int64p.inc
* save ebx,esi
}

23
rtl/sparc/int64p.inc Normal file
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@ -0,0 +1,23 @@
{
$Id$
This file is part of the Free Pascal run time library.
Copyright (c) 1999-2000 by the Free Pascal development team
This file contains some helper routines for int64 and qword
See the file COPYING.FPC, included in this distribution,
for details about the copyright.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
**********************************************************************}
{
$Log$
Revision 1.1 2003-09-14 11:34:13 peter
* moved int64 asm code to int64p.inc
* save ebx,esi
}