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* use rlwnm instead of slw, because, although the programming
environments manual states otherwise, slw uses the whole contents of
the register instead of bits 27-31 as shift count (rlwnm doesn't)
* fixed generation of offset inside normal sets where bits have to be
inserted
This commit is contained in:
Jonas Maebe
parent
2f4bfd6b67
commit
ac2d3341f4
@ -22,7 +22,7 @@ function fpc_set_load_small(l: fpc_small_set): fpc_normal_set;assembler;[public,
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on entry: p in r3, l in r4
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}
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asm
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stw r4,(r3)
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stw r4,0(r3)
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li r0,0
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stw r0,4(r3)
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stw r0,8(r3)
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@ -34,6 +34,7 @@ asm
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end ['r0'];
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{ checked 2001/09/28 (JM) }
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function fpc_set_create_element(b : byte): fpc_normal_set;assembler;[public,alias:'FPC_SET_CREATE_ELEMENT']; compilerproc;
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{
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create a new set in p from an element b
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@ -42,7 +43,7 @@ function fpc_set_create_element(b : byte): fpc_normal_set;assembler;[public,alia
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}
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asm
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li r0,0
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stw r0,(r3)
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stw r0,0(r3)
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stw r0,4(r3)
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stw r0,8(r3)
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stw r0,12(r3)
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@ -51,15 +52,15 @@ asm
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stw r0,24(r3)
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stw r0,28(r3)
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// r0 := 1 shl r4[27-31] -> bit index in dword (shift instructions
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// r0 := 1 shl r4[27-31] -> bit index in dword (rotate instructions
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// with count in register only consider lower 5 bits of this register)
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li r0,1
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slw r0,r0,r4
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rlwnm r0,r0,r4,0,31
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// get the index of the correct *dword* in the set
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// (((b div 8) div 4)*4= (b div 8) and not(3))
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// r5 := (r4 rotl(32-3)) and (0x0fffffff8)
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rlwinm r4,r4,29,0,31-2
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// r5 := (r4 rotl(32-3)) and (0x01ffffff8)
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rlwinm r4,r4,31-3+1,3,31-2
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// store the result
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stwx r0,r3,r4
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@ -84,12 +85,13 @@ Lset_set_byte_copy:
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subi r3,r3,32
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// get the index of the correct *dword* in the set
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// r0 := (r5 rotl(32-3)) and (0x0fffffff8)
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rlwinm r0,r5,29,0,31-2
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rlwinm r0,r5,31-3+1,3,31-2
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// load dword in which the bit has to be set (and update r3 to this address)
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lwzxu r4,r3,r0
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li r0,1
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// generate bit which has to be inserted
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slw r5,r0,r5
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// (can't use rlwimi, since that one only works for constants)
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rlwnm r5,r0,r5
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// insert it
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or r5,r4,r5
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// store result
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@ -117,12 +119,12 @@ Lset_unset_byte_copy:
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subi r3,r3,32
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// get the index of the correct *dword* in the set
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// r0 := (r4 rotl(32-3)) and (0x0fffffff8)
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rlwinm r0,r5,29,0,31-2
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rlwinm r0,r5,31-3+1,3,31-2
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// load dword in which the bit has to be set (and update r3 to this address)
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lwzxu r4,r3,r0
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li r0,1
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// generate bit which has to be removed
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slw r5,r0,r5
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rlwnm r5,r0,r5,0,31
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// remove it
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andc r5,r4,r5
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// store result
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@ -149,16 +151,16 @@ Lset_set_range_copy:
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subi r3,r3,32
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cmplw cr0,r5,r6
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bg cr0,LSET_RANGE_EXIT
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rlwinm r4,r5,32-3,0,31-2 // divide by 8 to get starting and ending byte-
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bg cr0,Lset_range_exit
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rlwinm r4,r5,31-3+1,3,31-2 // divide by 8 to get starting and ending byte-
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{ load the set the data cache }
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dcbst r3,r4
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rlwinm r9,r5,32-3,0,31-2 // address and clear two lowest bits to get
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rlwinm r9,r6,31-3+1,3,31-2 // address and clear two lowest bits to get
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// start/end longint address
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sub. r9,r4,r9 // are bit lo and hi in the same longint?
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rlwinm r6,r6,0,31-4,31 // hi := hi mod 32 (= "hi and 31", but the andi
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rlwinm r6,r6,0,31-5+1,31 // hi := hi mod 32 (= "hi and 31", but the andi
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// instr. only exists in flags modifying form)
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li r10,$ffff // r10 = $0x0ffffffff = bitmask to be inserted
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li r10,-1 // r10 = $0x0ffffffff = bitmask to be inserted
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subfic r6,r6,31 // hi := 31 - (hi mod 32) = shift count for later
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srw r10,r10,r4 // shift bitmask to clear bits below lo
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// note: shift right = opposite little endian!!
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@ -169,7 +171,7 @@ Lset_set_range_copy:
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subic. r9,r9,4 // bit hi in next longint?
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or r5,r5,r10 // merge and
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stw r5,(r3) // store current mask
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li r10,$ffff // new mask
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li r10,-1 // new mask
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lwzu r5,4(r3) // load next longint of set
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beq Lset_range_hi // bit hi in this longint -> go to adjust for hi
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Lset_range_loop:
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@ -200,12 +202,12 @@ function fpc_set_in_byte(const p: fpc_normal_set; b : byte): boolean;assembler;[
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asm
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// get the index of the correct *dword* in the set
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// r0 := (r4 rotl(32-3)) and (0x0fffffff8)
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rlwinm r0,r4,29,0,31-2
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rlwinm r0,r4,31-3+1,3,31-2
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// load dword in which the bit has to be tested
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lwzx r3,r3,r0
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li r0,1
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// generate bit which has to be tested
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slw r4,r0,r4
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rwlwnm r4,r0,r4,0,31
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// test it
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and. r3,r3,r4
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end ['r0','r3','r4','cr0'];
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@ -507,7 +509,14 @@ end;
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{
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$Log$
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Revision 1.9 2001-09-27 15:30:29 jonas
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Revision 1.10 2001-09-28 13:27:02 jonas
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* use rlwnm instead of slw, because, although the programming
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environments manual states otherwise, slw uses the whole contents of
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the register instead of bits 27-31 as shift count (rlwnm doesn't)
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* fixed generation of offset inside normal sets where bits have to be
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inserted
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Revision 1.9 2001/09/27 15:30:29 jonas
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* conversion to compilerproc and to structure used by i386 rtl
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* some bugfixes
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* powerpc.inc is almost complete (only fillchar/word/dword, get_frame etc
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