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* TOldRegister isnow just an alias for TCpuRegister
* TCpuRegister is used to define cpu register set physically available + CpuRegs array to easially create correspondence between TCpuRegister and TRegister
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@ -190,12 +190,13 @@ CONST
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TYPE
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{ enumeration for registers, don't change the order }
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{ it's used by the register size conversions }
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ToldRegister=({$INCLUDE registers.inc});
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TCpuRegister=({$INCLUDE cpuregs.inc});
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TOldRegister=TCpuRegister;
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Tnewregister=word;
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Tsuperregister=byte;
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Tsubregister=byte;
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Tregister=record
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enum:Toldregister;
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enum:TCpuRegister;
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number:Tnewregister;
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end;
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TRegister64=PACKED RECORD
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@ -203,17 +204,17 @@ TYPE
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RegLo,RegHi:TRegister;
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END;
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treg64=tregister64;{alias for compact code}
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TRegisterSet=SET OF ToldRegister;
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TRegisterSet=SET OF TCpuRegister;
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Tsupregset=set of Tsuperregister;
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CONST
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const
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R_NO=R_NONE;
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firstreg = Succ(R_NONE);
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lastreg = Pred(R_INTREGISTER);
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{General registers.}
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const
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NR_NO=$0000;
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NR_NONE=$0000;
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NR_NO=NR_NONE;
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NR_G0=$0001;
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NR_G1=$0002;
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NR_G2=$0003;
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@ -246,6 +247,114 @@ const
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NR_I5=$1600;
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NR_I6=$1700;
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NR_I7=$1800;
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{Floating point}
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NR_F0=$2000;
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NR_F1=$2000;
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NR_F2=$2000;
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NR_F3=$2000;
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NR_F4=$2000;
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NR_F5=$2000;
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NR_F6=$2000;
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NR_F7=$2000;
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NR_F8=$2000;
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NR_F9=$2000;
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NR_F10=$2000;
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NR_F11=$2000;
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NR_F12=$2000;
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NR_F13=$2000;
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NR_F14=$2000;
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NR_F15=$2000;
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NR_F16=$2000;
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NR_F17=$2000;
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NR_F18=$2000;
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NR_F19=$2000;
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NR_F20=$2000;
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NR_F21=$2000;
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NR_F22=$2000;
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NR_F23=$2000;
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NR_F24=$2000;
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NR_F25=$2000;
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NR_F26=$2000;
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NR_F27=$2000;
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NR_F28=$2000;
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NR_F29=$2000;
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NR_F30=$2000;
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NR_F31=$2000;
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{Coprocessor point}
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NR_C0=$3000;
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NR_C1=$3000;
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NR_C2=$3000;
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NR_C3=$3000;
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NR_C4=$3000;
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NR_C5=$3000;
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NR_C6=$3000;
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NR_C7=$3000;
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NR_C8=$3000;
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NR_C9=$3000;
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NR_C10=$3000;
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NR_C11=$3000;
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NR_C12=$3000;
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NR_C13=$3000;
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NR_C14=$3000;
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NR_C15=$3000;
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NR_C16=$3000;
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NR_C17=$3000;
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NR_C18=$3000;
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NR_C19=$3000;
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NR_C20=$3000;
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NR_C21=$3000;
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NR_C22=$3000;
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NR_C23=$3000;
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NR_C24=$3000;
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NR_C25=$3000;
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NR_C26=$3000;
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NR_C27=$3000;
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NR_C28=$3000;
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NR_C29=$3000;
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NR_C30=$3000;
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NR_C31=$3000;
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{ASR}
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NR_ASR0=$4000;
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NR_ASR1=$4000;
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NR_ASR2=$4000;
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NR_ASR3=$4000;
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NR_ASR4=$4000;
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NR_ASR5=$4000;
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NR_ASR6=$4000;
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NR_ASR7=$4000;
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NR_ASR8=$4000;
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NR_ASR9=$4000;
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NR_ASR10=$4000;
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NR_ASR11=$4000;
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NR_ASR12=$4000;
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NR_ASR13=$4000;
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NR_ASR14=$4000;
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NR_ASR15=$4000;
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NR_ASR16=$4000;
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NR_ASR17=$4000;
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NR_ASR18=$4000;
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NR_ASR19=$4000;
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NR_ASR20=$4000;
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NR_ASR21=$4000;
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NR_ASR22=$4000;
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NR_ASR23=$4000;
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NR_ASR24=$4000;
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NR_ASR25=$4000;
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NR_ASR26=$4000;
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NR_ASR27=$4000;
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NR_ASR28=$4000;
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NR_ASR29=$4000;
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NR_ASR30=$4000;
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NR_ASR31=$4000;
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{Floating point status/"front of queue" registers}
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NR_FSR=$5000;
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NR_FQ=$50001;
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NR_CSR=$5000;
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NR_CQ=$5000;
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NR_PSR=$5000;
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NR_TBR=$5000;
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NR_WIM=$5000;
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NR_Y=$5000;
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{Superregisters.}
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@ -286,10 +395,11 @@ const
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R_SUBL=$00;
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type
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reg2strtable=ARRAY[TOldRegister] OF STRING[7];
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reg2strtable=ARRAY[TCpuRegister] OF STRING[7];
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TCpuReg=array[TCpuRegister]of TRegister;
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const
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std_reg2str:reg2strtable=({$INCLUDE strregs.inc});
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CpuReg:TCpuReg=({$INCLUDE registers.inc});
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{*****************************************************************************
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Flags
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*****************************************************************************}
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@ -469,7 +579,7 @@ const
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{# Register indexes for stabs information, when some parameters or variables
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are stored in registers.
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Taken from rs6000.h (DBX_REGISTER_NUMBER) from GCC 3.x source code.}
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stab_regindex:ARRAY[TOldRegister]OF ShortInt=({$INCLUDE stabregi.inc});
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stab_regindex:ARRAY[TCpuRegister]OF ShortInt=({$INCLUDE stabregi.inc});
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{*************************** generic register names **************************}
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stack_pointer_reg = R_O6;
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NR_STACK_POINTER_REG = NR_O6;
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@ -568,7 +678,7 @@ VAR
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*****************************************************************************}
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const
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maxvarregs=30;
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VarRegs:ARRAY[1..maxvarregs]OF ToldRegister=(
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VarRegs:ARRAY[1..maxvarregs]OF TCpuRegister=(
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R_G0,R_G1,R_G2,R_G3,R_G4,R_G5,R_G6,R_G7,
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R_O0,R_O1,R_O2,R_O3,R_O4,R_O5,{R_R14=R_SP}R_O7,
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R_L0,R_L1,R_L2,R_L3,R_L4,R_L5,R_L6,R_L7,
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@ -663,7 +773,12 @@ END.
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{
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$Log$
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Revision 1.28 2003-04-28 09:46:30 mazen
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Revision 1.29 2003-04-29 12:03:52 mazen
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* TOldRegister isnow just an alias for TCpuRegister
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* TCpuRegister is used to define cpu register set physically available
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+ CpuRegs array to easially create correspondence between TCpuRegister and TRegister
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Revision 1.28 2003/04/28 09:46:30 mazen
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+ max_scratch_regs variable added because requested by common compiler code
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Revision 1.27 2003/04/23 13:35:39 peter
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@ -673,70 +788,4 @@ END.
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* fixed several issues with powerpc
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+ applied a patch from Jonas for nested function calls (PowerPC only)
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* ...
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Revision 1.25 2003/03/10 21:59:54 mazen
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* fixing index overflow in handling new registers arrays.
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Revision 1.24 2003/02/26 22:06:27 mazen
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* FirstReg <-- R_G0 instead of Low(TOldRegister)=R_NONE
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* LastReg <-- R_L7 instead of High(R_ASR31)=High(TOldRegister)
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* FirstReg..LastReg rplaced by TOldRegister in several arrays declarions
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Revision 1.23 2003/02/19 22:00:17 daniel
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* Code generator converted to new register notation
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- Horribily outdated todo.txt removed
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Revision 1.22 2003/02/02 19:25:54 carl
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* Several bugfixes for m68k target (register alloc., opcode emission)
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+ VIS target
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+ Generic add more complete (still not verified)
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Revision 1.21 2003/01/20 22:21:36 mazen
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* many stuff related to RTL fixed
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Revision 1.20 2003/01/09 20:41:00 daniel
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* Converted some code in cgx86.pas to new register numbering
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Revision 1.19 2003/01/09 15:49:56 daniel
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* Added register conversion
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Revision 1.18 2003/01/08 18:43:58 daniel
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* Tregister changed into a record
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Revision 1.17 2003/01/05 20:39:53 mazen
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* warnings about FreeTemp already free fixed with appropriate registers handling
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Revision 1.16 2002/10/28 20:59:17 mazen
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* TOpSize values changed S_L --> S_SW
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Revision 1.15 2002/10/28 20:37:44 mazen
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* TOpSize values changed S_L --> S_SW
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Revision 1.14 2002/10/20 19:01:38 mazen
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+ op_raddr_reg and op_caddr_reg added to fix functions prologue
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Revision 1.13 2002/10/19 20:35:07 mazen
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* carl's patch applied
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Revision 1.12 2002/10/11 13:35:14 mazen
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*** empty log message ***
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Revision 1.11 2002/10/10 19:57:51 mazen
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* Just to update repsitory
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Revision 1.10 2002/10/02 22:20:28 mazen
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+ out registers allocator for the first 6 scalar parameters which must be passed into %o0..%o5
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Revision 1.9 2002/10/01 21:06:29 mazen
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attinst.inc --> strinst.inc
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Revision 1.8 2002/09/30 19:12:14 mazen
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* function prologue fixed
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Revision 1.7 2002/09/27 04:30:53 mazen
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* cleanup made
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Revision 1.6 2002/09/24 03:57:53 mazen
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* some cleanup was made
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}
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