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* S1..S15 do not need to be marked as volatile as they are sub-registers of double size registers

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git-svn-id: trunk@33187 -
This commit is contained in:
florian 2016-03-06 13:33:26 +00:00
parent 6207a53f5d
commit ad71b8348e
2 changed files with 13 additions and 5 deletions
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16
compiler/arm/cgcpu.pas
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@ -1925,7 +1925,10 @@ unit cgcpu;
fpu_vfpv4, fpu_vfpv4,
fpu_vfpv3_d16: fpu_vfpv3_d16:
begin; begin;
mmregs:=rg[R_MMREGISTER].used_in_proc-paramanager.get_volatile_registers_mm(pocall_stdcall); { the *[0..31] is a hack to prevent that the compiler tries to save odd single-type registers,
they have numbers>$1f which is not really correct as they should simply have the same numbers
as the even ones by with a different subtype as it is done on x86 with al/ah }
mmregs:=(rg[R_MMREGISTER].used_in_proc-paramanager.get_volatile_registers_mm(pocall_stdcall))*[0..31];
end; end;
end; end;
a_reg_alloc(list,NR_STACK_POINTER_REG); a_reg_alloc(list,NR_STACK_POINTER_REG);
@ -2108,7 +2111,8 @@ unit cgcpu;
postfix:=PF_IAX postfix:=PF_IAX
else else
postfix:=PF_IAD;} postfix:=PF_IAD;}
list.concat(taicpu.op_ref_regset(A_VSTM,ref,R_MMREGISTER,R_SUBFD,mmregs)); if mmregs<>[] then
list.concat(taicpu.op_ref_regset(A_VSTM,ref,R_MMREGISTER,R_SUBFD,mmregs));
end; end;
end; end;
end; end;
@ -2163,7 +2167,10 @@ unit cgcpu;
fpu_vfpv3_d16: fpu_vfpv3_d16:
begin; begin;
{ restore vfp registers? } { restore vfp registers? }
mmregs:=rg[R_MMREGISTER].used_in_proc-paramanager.get_volatile_registers_mm(pocall_stdcall); { the *[0..31] is a hack to prevent that the compiler tries to save odd single-type registers,
they have numbers>$1f which is not really correct as they should simply have the same numbers
as the even ones by with a different subtype as it is done on x86 with al/ah }
mmregs:=(rg[R_MMREGISTER].used_in_proc-paramanager.get_volatile_registers_mm(pocall_stdcall))*[0..31];
end; end;
end; end;
@ -2210,7 +2217,8 @@ unit cgcpu;
mmpostfix:=PF_IAX mmpostfix:=PF_IAX
else else
mmpostfix:=PF_IAD;} mmpostfix:=PF_IAD;}
list.concat(taicpu.op_ref_regset(A_VLDM,ref,R_MMREGISTER,R_SUBFD,mmregs)); if mmregs<>[] then
list.concat(taicpu.op_ref_regset(A_VLDM,ref,R_MMREGISTER,R_SUBFD,mmregs));
end; end;
end; end;
end; end;

2
compiler/arm/cpubase.pas
View File

@ -109,7 +109,7 @@ unit cpubase;
{ registers which may be destroyed by calls } { registers which may be destroyed by calls }
VOLATILE_INTREGISTERS = [RS_R0..RS_R3,RS_R12..RS_R14]; VOLATILE_INTREGISTERS = [RS_R0..RS_R3,RS_R12..RS_R14];
VOLATILE_FPUREGISTERS = [RS_F0..RS_F3]; VOLATILE_FPUREGISTERS = [RS_F0..RS_F3];
VOLATILE_MMREGISTERS = [RS_D0..RS_D7,RS_D16..RS_D31,RS_S1..RS_S15]; VOLATILE_MMREGISTERS = [RS_D0..RS_D7,RS_D16..RS_D31];
VOLATILE_INTREGISTERS_DARWIN = [RS_R0..RS_R3,RS_R9,RS_R12..RS_R14]; VOLATILE_INTREGISTERS_DARWIN = [RS_R0..RS_R3,RS_R9,RS_R12..RS_R14];