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* move x86_64 specific int_to_real conversion to nx64cnv
* fix x86_64 code for none loc_register/loc_reference location git-svn-id: trunk@8844 -
This commit is contained in:
peter
parent
c39b663201
commit
ad944fd198
@ -189,184 +189,91 @@ implementation
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var
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href : treference;
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hregister : tregister;
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l1,l2 : tasmlabel;
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signtested : boolean;
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hreg : tregister;
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op : tasmop;
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begin
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if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
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location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
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{$ifdef x86_64}
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if use_sse(resultdef) then
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
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if (left.location.loc=LOC_REGISTER) and (torddef(left.resultdef).ordtype=u64bit) then
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begin
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{ We can only directly convert s32bit and s64bit,u64bit values, for other
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values convert first to s64bit }
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if not(torddef(left.resultdef).ordtype in [s32bit,s64bit,u64bit]) then
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begin
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hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_S64);
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location_force_reg(current_asmdata.CurrAsmList,left.location,OS_S64,false);
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end;
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if is_double(resultdef) then
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op:=A_CVTSI2SD
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else if is_single(resultdef) then
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op:=A_CVTSI2SS
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else
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internalerror(200506061);
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location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
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location.register:=cg.getmmregister(current_asmdata.CurrAsmList,def_cgsize(resultdef));
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case torddef(left.resultdef).ordtype of
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u64bit:
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begin
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{ unsigned 64 bit ints are harder to handle:
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we load bits 0..62 and then check bit 63:
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if it is 1 then we add $80000000 000000000
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as double }
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current_asmdata.getdatalabel(l1);
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current_asmdata.getjumplabel(l2);
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{ Get sign bit }
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if (left.location.loc=LOC_REGISTER) then
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begin
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emit_const_reg(A_BT,S_Q,63,left.location.register);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,S_Q,left.location.register,location.register));
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end
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else
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begin
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inc(left.location.reference.offset,4);
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emit_const_ref(A_BT,S_L,31,left.location.reference);
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dec(left.location.reference.offset,4);
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current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(op,S_Q,left.location.reference,location.register));
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end;
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NC,l2);
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current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
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reference_reset_symbol(href,l1,0);
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{ I got these constant from a test program (FK) }
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if is_double(resultdef) then
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begin
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{ double (2^64) }
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(0));
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($43f00000));
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{ simplify for PIC }
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tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
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current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(A_ADDSD,S_NO,href,location.register));
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end
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else if is_single(resultdef) then
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begin
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{ single(2^64) }
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($5f800000));
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{ simplify for PIC }
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tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
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current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(A_ADDSS,S_NO,href,location.register));
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end
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else
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internalerror(200506071);
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cg.a_label(current_asmdata.CurrAsmList,l2);
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end
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else
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begin
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case left.location.loc of
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LOC_CREFERENCE,
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LOC_REFERENCE :
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current_asmdata.CurrAsmList.concat(Taicpu.op_ref_reg(op,tcgsize2opsize[left.location.size],left.location.reference,location.register));
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LOC_CREGISTER,
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LOC_REGISTER :
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current_asmdata.CurrAsmList.concat(Taicpu.op_reg_reg(op,tcgsize2opsize[left.location.size],left.location.register,location.register));
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else
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internalerror(200506072);
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end;
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end;
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end;
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{$ifdef cpu64bit}
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emit_const_reg(A_BT,S_Q,63,left.location.register);
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{$else cpu64bit}
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emit_const_reg(A_BT,S_L,31,left.location.register64.reghi);
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{$endif cpu64bit}
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signtested:=true;
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end
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else
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{$endif x86_64}
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signtested:=false;
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{ We need to load from a reference }
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location_force_mem(current_asmdata.CurrAsmList,left.location);
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{ For u32bit we need to load it as comp and need to
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make it 64bits }
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if (torddef(left.resultdef).ordtype=u32bit) then
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
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if (left.location.loc=LOC_REGISTER) and (torddef(left.resultdef).ordtype=u64bit) then
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begin
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{$ifdef cpu64bit}
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emit_const_reg(A_BT,S_Q,63,left.location.register);
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{$else cpu64bit}
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emit_const_reg(A_BT,S_L,31,left.location.register64.reghi);
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{$endif cpu64bit}
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signtested:=true;
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end
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else
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signtested:=false;
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{ We need to load from a reference }
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location_force_mem(current_asmdata.CurrAsmList,left.location);
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{ For u32bit we need to load it as comp and need to
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make it 64bits }
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if (torddef(left.resultdef).ordtype=u32bit) then
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begin
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tg.GetTemp(current_asmdata.CurrAsmList,8,tt_normal,href);
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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cg.a_load_ref_ref(current_asmdata.CurrAsmList,left.location.size,OS_32,left.location.reference,href);
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inc(href.offset,4);
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cg.a_load_const_ref(current_asmdata.CurrAsmList,OS_32,0,href);
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dec(href.offset,4);
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left.location.reference:=href;
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end;
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{ Load from reference to fpu reg }
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case torddef(left.resultdef).ordtype of
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u32bit,
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scurrency,
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s64bit:
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,left.location.reference));
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u64bit:
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begin
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{ unsigned 64 bit ints are harder to handle:
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we load bits 0..62 and then check bit 63:
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if it is 1 then we add $80000000 000000000
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as double }
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current_asmdata.getdatalabel(l1);
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current_asmdata.getjumplabel(l2);
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if not(signtested) then
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begin
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inc(left.location.reference.offset,4);
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emit_const_ref(A_BT,S_L,31,left.location.reference);
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dec(left.location.reference.offset,4);
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end;
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,left.location.reference));
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NC,l2);
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current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
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{ I got this constant from a test program (FK) }
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(0));
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(longint ($80000000)));
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($0000403f));
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reference_reset_symbol(href,l1,0);
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tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
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current_asmdata.CurrAsmList.concat(Taicpu.Op_ref(A_FLD,S_FX,href));
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current_asmdata.CurrAsmList.concat(Taicpu.Op_reg_reg(A_FADDP,S_NO,NR_ST,NR_ST1));
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cg.a_label(current_asmdata.CurrAsmList,l2);
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end
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else
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begin
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if left.resultdef.size<4 then
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begin
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tg.GetTemp(current_asmdata.CurrAsmList,4,tt_normal,href);
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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cg.a_load_ref_ref(current_asmdata.CurrAsmList,left.location.size,OS_32,left.location.reference,href);
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left.location.reference:=href;
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end;
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IL,left.location.reference));
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end;
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end;
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tg.GetTemp(current_asmdata.CurrAsmList,8,tt_normal,href);
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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tcgx86(cg).inc_fpu_stack;
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location.register:=NR_ST;
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cg.a_load_ref_ref(current_asmdata.CurrAsmList,left.location.size,OS_32,left.location.reference,href);
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inc(href.offset,4);
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cg.a_load_const_ref(current_asmdata.CurrAsmList,OS_32,0,href);
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dec(href.offset,4);
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left.location.reference:=href;
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end;
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{ Load from reference to fpu reg }
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case torddef(left.resultdef).ordtype of
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u32bit,
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scurrency,
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s64bit:
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,left.location.reference));
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u64bit:
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begin
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{ unsigned 64 bit ints are harder to handle:
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we load bits 0..62 and then check bit 63:
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if it is 1 then we add $80000000 000000000
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as double }
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current_asmdata.getdatalabel(l1);
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current_asmdata.getjumplabel(l2);
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if not(signtested) then
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begin
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inc(left.location.reference.offset,4);
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emit_const_ref(A_BT,S_L,31,left.location.reference);
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dec(left.location.reference.offset,4);
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end;
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,left.location.reference));
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NC,l2);
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current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
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{ I got this constant from a test program (FK) }
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(0));
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(longint ($80000000)));
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($0000403f));
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reference_reset_symbol(href,l1,0);
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tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
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current_asmdata.CurrAsmList.concat(Taicpu.Op_ref(A_FLD,S_FX,href));
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current_asmdata.CurrAsmList.concat(Taicpu.Op_reg_reg(A_FADDP,S_NO,NR_ST,NR_ST1));
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cg.a_label(current_asmdata.CurrAsmList,l2);
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end
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else
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begin
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if left.resultdef.size<4 then
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begin
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tg.GetTemp(current_asmdata.CurrAsmList,4,tt_normal,href);
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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cg.a_load_ref_ref(current_asmdata.CurrAsmList,left.location.size,OS_32,left.location.reference,href);
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left.location.reference:=href;
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end;
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IL,left.location.reference));
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end;
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end;
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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tcgx86(cg).inc_fpu_stack;
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location.register:=NR_ST;
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end;
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begin
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@ -41,7 +41,7 @@ interface
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{ procedure second_chararray_to_string;override; }
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{ procedure second_char_to_string;override; }
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{ function first_int_to_real: tnode; override; }
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{ procedure second_int_to_real;override; }
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procedure second_int_to_real;override;
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{ procedure second_real_to_real;override; }
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{ procedure second_cord_to_pointer;override; }
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{ procedure second_proc_to_procvar;override; }
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@ -57,8 +57,116 @@ interface
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implementation
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uses
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ncnv;
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uses
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verbose,systems,globals,globtype,
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aasmbase,aasmtai,aasmdata,aasmcpu,
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symconst,symdef,
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cgbase,cga,procinfo,pass_2,
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ncon,ncal,ncnv,
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cpubase,
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cgutils,cgobj,cgx86,ncgutil,
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tgobj;
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procedure tx8664typeconvnode.second_int_to_real;
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var
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href : treference;
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l1,l2 : tasmlabel;
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op : tasmop;
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begin
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if use_sse(resultdef) then
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begin
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{ We can only directly convert s32bit and s64bit,u64bit values, for other
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values convert first to s64bit }
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if not(torddef(left.resultdef).ordtype in [s32bit,s64bit,u64bit]) then
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location_force_reg(current_asmdata.CurrAsmList,left.location,OS_S64,false);
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if is_double(resultdef) then
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op:=A_CVTSI2SD
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else if is_single(resultdef) then
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op:=A_CVTSI2SS
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else
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internalerror(200506061);
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location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
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location.register:=cg.getmmregister(current_asmdata.CurrAsmList,def_cgsize(resultdef));
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case torddef(left.resultdef).ordtype of
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u64bit:
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begin
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{ unsigned 64 bit ints are harder to handle:
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we load bits 0..62 and then check bit 63:
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if it is 1 then we add $80000000 000000000
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as double }
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current_asmdata.getdatalabel(l1);
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current_asmdata.getjumplabel(l2);
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{ Get sign bit }
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if not(left.location.loc in [LOC_REGISTER,LOC_REFERENCE]) then
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location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
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case left.location.loc of
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LOC_REGISTER :
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begin
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emit_const_reg(A_BT,S_Q,63,left.location.register);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,S_Q,left.location.register,location.register));
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end;
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LOC_REFERENCE :
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begin
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inc(left.location.reference.offset,4);
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emit_const_ref(A_BT,S_L,31,left.location.reference);
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dec(left.location.reference.offset,4);
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current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(op,S_Q,left.location.reference,location.register));
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end;
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else
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internalerror(200710181);
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end;
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NC,l2);
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current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
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reference_reset_symbol(href,l1,0);
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{ I got these constant from a test program (FK) }
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if is_double(resultdef) then
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begin
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{ double (2^64) }
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(0));
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($43f00000));
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{ simplify for PIC }
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tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
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current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(A_ADDSD,S_NO,href,location.register));
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end
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else if is_single(resultdef) then
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begin
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{ single(2^64) }
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($5f800000));
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{ simplify for PIC }
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tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
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current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(A_ADDSS,S_NO,href,location.register));
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end
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else
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internalerror(200506071);
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cg.a_label(current_asmdata.CurrAsmList,l2);
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end
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else
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begin
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if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
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location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
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case left.location.loc of
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LOC_CREFERENCE,
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LOC_REFERENCE :
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current_asmdata.CurrAsmList.concat(Taicpu.op_ref_reg(op,tcgsize2opsize[left.location.size],left.location.reference,location.register));
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LOC_CREGISTER,
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LOC_REGISTER :
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current_asmdata.CurrAsmList.concat(Taicpu.op_reg_reg(op,tcgsize2opsize[left.location.size],left.location.register,location.register));
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else
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internalerror(200506072);
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end;
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end;
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end;
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end
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else
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inherited second_int_to_real;
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end;
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begin
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