diff --git a/compiler/systems.inc b/compiler/systems.inc
index fc6b95e580..9d10fe512e 100644
--- a/compiler/systems.inc
+++ b/compiler/systems.inc
@@ -329,6 +329,8 @@
               may still be removed by the callee (and then the stack needs to
               be restored by the caller) }
             ,abi_i386_dynalignedstack
+            ,abi_xtensa_windowed
+            ,abi_xtensa_call0
        );
 
      const
diff --git a/compiler/systems.pas b/compiler/systems.pas
index 0809eb2bb0..3b2f494b57 100644
--- a/compiler/systems.pas
+++ b/compiler/systems.pas
@@ -438,7 +438,9 @@ interface
          (name: 'OLDWIN32GNU'; supported:{$ifdef I386}true{$else}false{$endif}),
          (name: 'AARCH64IOS'; supported:{$ifdef aarch64}true{$else}false{$endif}),
          (name: 'RISCVHF'; supported:{$if defined(riscv32) or defined(riscv64)}true{$else}false{$endif}),
-         (name: 'LINUX386_SYSV'; supported:{$if defined(i386)}true{$else}false{$endif})
+         (name: 'LINUX386_SYSV'; supported:{$if defined(i386)}true{$else}false{$endif}),
+         (name: 'WINDOWED'; supported:{$if defined(xtensa)}true{$else}false{$endif}),
+         (name: 'CALL0'; supported:{$if defined(xtensa)}true{$else}false{$endif})
        );
 
        { x86 asm modes with an Intel-style syntax }
diff --git a/compiler/xtensa/cgcpu.pas b/compiler/xtensa/cgcpu.pas
index 0902328a28..8bbaa4bb40 100644
--- a/compiler/xtensa/cgcpu.pas
+++ b/compiler/xtensa/cgcpu.pas
@@ -434,14 +434,18 @@ implementation
     procedure tcgcpu.g_proc_entry(list : TAsmList; localsize : longint;
      nostackframe : boolean);
       begin
-        list.Concat(taicpu.op_reg_const(A_ENTRY,NR_STACK_POINTER_REG,32));
+        if target_info.abi=abi_xtensa_windowed then
+          list.Concat(taicpu.op_reg_const(A_ENTRY,NR_STACK_POINTER_REG,32));
       end;
 
 
     procedure tcgcpu.g_proc_exit(list : TAsmList; parasize : longint;
      nostackframe : boolean);
       begin
-        list.Concat(taicpu.op_none(A_RETW));
+        if target_info.abi=abi_xtensa_windowed then
+          list.Concat(taicpu.op_none(A_RETW))
+        else
+          list.Concat(taicpu.op_none(A_RET));
       end;
 
 
diff --git a/compiler/xtensa/cpuinfo.pas b/compiler/xtensa/cpuinfo.pas
index 6fbaa7e8bb..a810303835 100644
--- a/compiler/xtensa/cpuinfo.pas
+++ b/compiler/xtensa/cpuinfo.pas
@@ -19,7 +19,8 @@ Unit CPUInfo;
 Interface
 
   uses
-    globtype;
+    globtype,
+    systems;
 
 Type
    bestreal = double;
@@ -35,6 +36,7 @@ Type
    { possible supported processors for this target }
    tcputype =
       (cpu_none,
+       cpu_lx106,
        cpu_lx6
       );
 
@@ -49,6 +51,7 @@ Type
 Type
    tcontrollertype =
      (ct_none,
+      ct_esp8266,
       ct_esp32_d0wd,
       ct_esp32_d2wd,
       ct_esp32_sOwd
@@ -56,7 +59,7 @@ Type
 
    tcontrollerdatatype = record
       controllertypestr, controllerunitstr: string[20];
-      cputype: tcputype; fputype: tfputype;
+      cputype: tcputype; fputype: tfputype; abi: tabi;
       flashbase, flashsize, srambase, sramsize, eeprombase, eepromsize, bootbase, bootsize: dword;
    end;
 
@@ -86,6 +89,7 @@ Const
 
    cputypestr : array[tcputype] of string[8] = (
      '',
+     'LX106',
      'LX6'
    );
 
@@ -102,10 +106,11 @@ Const
 
    embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
    (
-      (controllertypestr:'';		controllerunitstr:'';	cputype:cpu_none; fputype:fpu_none; flashbase:0),
-      (controllertypestr:'ESP32_D0WD';	controllerunitstr:'ESP32_D0WD';	cputype:cpu_lx6; fputype:fpu_none; flashbase:$40000000; flashsize:448*1024; srambase:$40070000; sramsize: 520*1024),
-      (controllertypestr:'ESP32_D2WD';	controllerunitstr:'ESP32_D2WD';	cputype:cpu_lx6; fputype:fpu_none; flashbase:$40000000; flashsize:448*1024; srambase:$40070000; sramsize: 520*1024),
-      (controllertypestr:'ESP32_S0WD';	controllerunitstr:'ESP32_S0WD';	cputype:cpu_lx6; fputype:fpu_none; flashbase:$40000000; flashsize:448*1024; srambase:$40070000; sramsize: 520*1024)
+      (controllertypestr:'';		controllerunitstr:'';	cputype:cpu_none; fputype:fpu_none; abi: abi_default; flashbase:0),
+      (controllertypestr:'ESP8266';	controllerunitstr:'ESP8266';	cputype:cpu_lx106; fputype:fpu_none; abi: abi_xtensa_call0; { flashbase:$40000000; flashsize:448*1024; srambase:$40070000; sramsize: 520*1024 }),
+      (controllertypestr:'ESP32_D0WD';	controllerunitstr:'ESP32_D0WD';	cputype:cpu_lx6; fputype:fpu_none; abi: abi_xtensa_windowed; flashbase:$40000000; flashsize:448*1024; srambase:$40070000; sramsize: 520*1024),
+      (controllertypestr:'ESP32_D2WD';	controllerunitstr:'ESP32_D2WD';	cputype:cpu_lx6; fputype:fpu_none; abi: abi_xtensa_windowed; flashbase:$40000000; flashsize:448*1024; srambase:$40070000; sramsize: 520*1024),
+      (controllertypestr:'ESP32_S0WD';	controllerunitstr:'ESP32_S0WD';	cputype:cpu_lx6; fputype:fpu_none; abi: abi_xtensa_windowed; flashbase:$40000000; flashsize:448*1024; srambase:$40070000; sramsize: 520*1024)
    );
 
    { Supported optimizations, only used for information }
@@ -126,7 +131,7 @@ Const
  type
    tcpuflags =
       (
-        CPUXTENSA_DUMMY
+        CPUXTENSA_REGWINDOW
       );
 
    tfpuflags =
@@ -138,7 +143,8 @@ Const
    cpu_capabilities : array[tcputype] of set of tcpuflags =
      (
        { cpu_none     } [],
-       { cpu_lx6      } []
+       { cpu_lx106    } [],
+       { cpu_lx6      } [CPUXTENSA_REGWINDOW]
      );
 
    fpu_capabilities : array[tfputype] of set of tfpuflags =
diff --git a/compiler/xtensa/cpupi.pas b/compiler/xtensa/cpupi.pas
index bedce05c04..00ed90baba 100644
--- a/compiler/xtensa/cpupi.pas
+++ b/compiler/xtensa/cpupi.pas
@@ -65,8 +65,16 @@ unit cpupi;
         inherited create(aparent);
         maxpushedparasize := 0;
         framepointer:=NR_FRAME_POINTER_REG;
-        callins:=A_CALL8;
-        callxins:=A_CALLX8;
+        if target_info.abi=abi_xtensa_windowed then
+          begin
+            callins:=A_CALL8;
+            callxins:=A_CALLX8;
+          end
+        else
+          begin
+            callins:=A_CALL0;
+            callxins:=A_CALLX0;
+          end
       end;