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* disable timing check as it causes too much false negatives on machines under load

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florian 2022-12-01 22:56:42 +01:00
parent c5f4a6acd0
commit aff133cac2
1 changed files with 3 additions and 1 deletions
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4
packages/rtl-generics/tests/tqsort_killer.pp
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@ -128,8 +128,10 @@ type
if (prevTime > 0) and (time / prevTime > 3) then
begin
writeln;
writeln('Bad sorting algorithm behaviour');
writeln('Potentially bad sorting algorithm behaviour');
{ causes too many false negative
halt(1);
}
end;
prevTime := time;
write(', ');