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* arm / a64: Factored out common conditional checks in "OptPass1UXTB",

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"OptPass1SXTB", "OptPass1UXTH" and "OptPass1SXTH" to
               improve performance.
This commit is contained in:
J. Gareth "Curious Kit" Moreton 2024-05-13 22:09:22 +01:00 committed by FPK
parent 6de766e40a
commit b1a9150160
1 changed files with 370 additions and 363 deletions
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93
compiler/armgen/aoptarm.pas
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@ -211,8 +211,7 @@ Implementation
opoffset: Integer; opoffset: Integer;
begin begin
Result:=false; Result:=false;
if (taicpu(p).ops=2) and if ((MatchInstruction(hp1, [A_ADD,A_SUB], [C_None], [PF_None,PF_S]) and
((MatchInstruction(hp1, [A_ADD,A_SUB], [C_None], [PF_None,PF_S]) and
(taicpu(hp1).ops=3) and (taicpu(hp1).ops=3) and
MatchOperand(taicpu(hp1).oper[2]^, taicpu(p).oper[0]^.reg) and MatchOperand(taicpu(hp1).oper[2]^, taicpu(p).oper[0]^.reg) and
not(MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg))) or not(MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg))) or
@ -682,7 +681,11 @@ Implementation
so: tshifterop; so: tshifterop;
begin begin
Result:=false; Result:=false;
if GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) then if GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
(taicpu(p).oppostfix = PF_None) and
(taicpu(p).ops = 2) then
begin
if (taicpu(p).condition = C_None) then
begin begin
{ {
change change
@ -692,9 +695,7 @@ Implementation
to to
strb reg1,[...] strb reg1,[...]
} }
if MatchInstruction(p, taicpu(p).opcode, [C_None], [PF_None]) and if MatchInstruction(hp1, A_STR, [C_None], [PF_B]) and
(taicpu(p).ops=2) and
MatchInstruction(hp1, A_STR, [C_None], [PF_B]) and
assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) and assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) and
{ the reference in strb might not use reg2 } { the reference in strb might not use reg2 }
not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and
@ -713,9 +714,7 @@ Implementation
to to
uxtb reg3,reg1 uxtb reg3,reg1
} }
else if MatchInstruction(p, A_UXTB, [C_None], [PF_None]) and else if MatchInstruction(hp1, A_UXTH, [C_None], [PF_None]) and
(taicpu(p).ops=2) and
MatchInstruction(hp1, A_UXTH, [C_None], [PF_None]) and
(taicpu(hp1).ops = 2) and (taicpu(hp1).ops = 2) and
MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
@ -737,9 +736,7 @@ Implementation
to to
uxtb reg3,reg1 uxtb reg3,reg1
} }
else if MatchInstruction(p, A_UXTB, [C_None], [PF_None]) and else if MatchInstruction(hp1, A_UXTB, [C_None], [PF_None]) and
(taicpu(p).ops=2) and
MatchInstruction(hp1, A_UXTB, [C_None], [PF_None]) and
(taicpu(hp1).ops = 2) and (taicpu(hp1).ops = 2) and
MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
@ -761,9 +758,7 @@ Implementation
to to
uxtb reg3,reg1 uxtb reg3,reg1
} }
else if MatchInstruction(p, A_UXTB, [C_None], [PF_None]) and else if MatchInstruction(hp1, A_AND, [C_None], [PF_None]) and
(taicpu(p).ops=2) and
MatchInstruction(hp1, A_AND, [C_None], [PF_None]) and
(taicpu(hp1).ops=3) and (taicpu(hp1).ops=3) and
(taicpu(hp1).oper[2]^.typ=top_const) and (taicpu(hp1).oper[2]^.typ=top_const) and
((taicpu(hp1).oper[2]^.val and $FF)=$FF) and ((taicpu(hp1).oper[2]^.val and $FF)=$FF) and
@ -782,7 +777,11 @@ Implementation
else if USxtOp2Op(p,hp1,SM_UXTB) then else if USxtOp2Op(p,hp1,SM_UXTB) then
Result:=true Result:=true
{$endif AARCH64} {$endif AARCH64}
else if RemoveSuperfluousMove(p, hp1, 'UxtbMov2Uxtb') then end;
{ Condition doesn't have to be C_None }
if not Result and
RemoveSuperfluousMove(p, hp1, 'UxtbMov2Uxtb') then
Result:=true; Result:=true;
end; end;
end; end;
@ -794,7 +793,11 @@ Implementation
so: tshifterop; so: tshifterop;
begin begin
Result:=false; Result:=false;
if GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) then if GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
(taicpu(p).oppostfix = PF_None) and
(taicpu(p).ops = 2) then
begin
if (taicpu(p).condition = C_None) then
begin begin
{ {
change change
@ -804,9 +807,7 @@ Implementation
to to
strh reg1,[...] strh reg1,[...]
} }
if MatchInstruction(p, taicpu(p).opcode, [C_None], [PF_None]) and if MatchInstruction(hp1, A_STR, [C_None], [PF_H]) and
(taicpu(p).ops=2) and
MatchInstruction(hp1, A_STR, [C_None], [PF_H]) and
RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
{ the reference in strb might not use reg2 } { the reference in strb might not use reg2 }
not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and
@ -825,9 +826,7 @@ Implementation
to to
uxth reg3,reg1 uxth reg3,reg1
} }
else if MatchInstruction(p, A_UXTH, [C_None], [PF_None]) and else if MatchInstruction(hp1, A_UXTH, [C_None], [PF_None]) and
(taicpu(p).ops=2) and
MatchInstruction(hp1, A_UXTH, [C_None], [PF_None]) and
(taicpu(hp1).ops=2) and (taicpu(hp1).ops=2) and
MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
@ -848,9 +847,7 @@ Implementation
to to
uxth reg3,reg1 uxth reg3,reg1
} }
else if MatchInstruction(p, A_UXTH, [C_None], [PF_None]) and else if MatchInstruction(hp1, A_AND, [C_None], [PF_None]) and
(taicpu(p).ops=2) and
MatchInstruction(hp1, A_AND, [C_None], [PF_None]) and
(taicpu(hp1).ops=3) and (taicpu(hp1).ops=3) and
(taicpu(hp1).oper[2]^.typ=top_const) and (taicpu(hp1).oper[2]^.typ=top_const) and
((taicpu(hp1).oper[2]^.val and $FFFF)=$FFFF) and ((taicpu(hp1).oper[2]^.val and $FFFF)=$FFFF) and
@ -869,7 +866,11 @@ Implementation
else if USxtOp2Op(p,hp1,SM_UXTH) then else if USxtOp2Op(p,hp1,SM_UXTH) then
Result:=true Result:=true
{$endif AARCH64} {$endif AARCH64}
else if RemoveSuperfluousMove(p, hp1, 'UxthMov2Data') then end;
{ Condition doesn't have to be C_None }
if not Result and
RemoveSuperfluousMove(p, hp1, 'UxthMov2Data') then
Result:=true; Result:=true;
end; end;
end; end;
@ -881,7 +882,11 @@ Implementation
so: tshifterop; so: tshifterop;
begin begin
Result:=false; Result:=false;
if GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) then if GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
(taicpu(p).oppostfix = PF_None) and
(taicpu(p).ops = 2) then
begin
if (taicpu(p).condition = C_None) then
begin begin
{ {
change change
@ -891,9 +896,7 @@ Implementation
to to
strb reg1,[...] strb reg1,[...]
} }
if MatchInstruction(p, taicpu(p).opcode, [C_None], [PF_None]) and if MatchInstruction(hp1, A_STR, [C_None], [PF_B]) and
(taicpu(p).ops=2) and
MatchInstruction(hp1, A_STR, [C_None], [PF_B]) and
assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) and assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) and
{ the reference in strb might not use reg2 } { the reference in strb might not use reg2 }
not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and
@ -912,9 +915,7 @@ Implementation
to to
sxtb reg3,reg1 sxtb reg3,reg1
} }
else if MatchInstruction(p, A_SXTB, [C_None], [PF_None]) and else if MatchInstruction(hp1, A_SXTH, [C_None], [PF_None]) and
(taicpu(p).ops=2) and
MatchInstruction(hp1, A_SXTH, [C_None], [PF_None]) and
(taicpu(hp1).ops = 2) and (taicpu(hp1).ops = 2) and
MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
@ -936,9 +937,7 @@ Implementation
to to
uxtb reg3,reg1 uxtb reg3,reg1
} }
else if MatchInstruction(p, A_SXTB, [C_None], [PF_None]) and else if MatchInstruction(hp1, A_SXTB, [C_None], [PF_None]) and
(taicpu(p).ops=2) and
MatchInstruction(hp1, A_SXTB, [C_None], [PF_None]) and
(taicpu(hp1).ops = 2) and (taicpu(hp1).ops = 2) and
MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
@ -960,9 +959,7 @@ Implementation
to to
uxtb reg3,reg1 uxtb reg3,reg1
} }
else if MatchInstruction(p, A_SXTB, [C_None], [PF_None]) and else if MatchInstruction(hp1, A_AND, [C_None], [PF_None]) and
(taicpu(p).ops=2) and
MatchInstruction(hp1, A_AND, [C_None], [PF_None]) and
(taicpu(hp1).ops=3) and (taicpu(hp1).ops=3) and
(taicpu(hp1).oper[2]^.typ=top_const) and (taicpu(hp1).oper[2]^.typ=top_const) and
((taicpu(hp1).oper[2]^.val and $FF)=$FF) and ((taicpu(hp1).oper[2]^.val and $FF)=$FF) and
@ -981,7 +978,10 @@ Implementation
else if USxtOp2Op(p,hp1,SM_SXTB) then else if USxtOp2Op(p,hp1,SM_SXTB) then
Result:=true Result:=true
{$endif AARCH64} {$endif AARCH64}
else if GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and end;
{ Condition doesn't have to be C_None }
if not Result and
RemoveSuperfluousMove(p, hp1, 'SxtbMov2Sxtb') then RemoveSuperfluousMove(p, hp1, 'SxtbMov2Sxtb') then
Result:=true; Result:=true;
end; end;
@ -994,7 +994,11 @@ Implementation
so: tshifterop; so: tshifterop;
begin begin
Result:=false; Result:=false;
if GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) then if GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
(taicpu(p).oppostfix = PF_None) and
(taicpu(p).ops = 2) then
begin
if (taicpu(p).condition = C_None) then
begin begin
{ {
change change
@ -1094,7 +1098,10 @@ Implementation
else if USxtOp2Op(p,hp1,SM_SXTH) then else if USxtOp2Op(p,hp1,SM_SXTH) then
Result:=true Result:=true
{$endif AARCH64} {$endif AARCH64}
else if GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and end;
{ Condition doesn't have to be C_None }
if not Result and
RemoveSuperfluousMove(p, hp1, 'SxthMov2Sxth') then RemoveSuperfluousMove(p, hp1, 'SxthMov2Sxth') then
Result:=true; Result:=true;
end; end;