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https://gitlab.com/freepascal.org/fpc/source.git
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+ support for RiscV hwprobe syscall
+ test
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b1c2023af1
@ -554,6 +554,98 @@ Type
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Function utimensat(dfd: cint; path:PAnsiChar;const times:TTimespecArr;flags:cint):cint; {$ifdef FPC_USE_LIBC} cdecl; external name 'utimensat'; {$ENDIF}
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Function futimens(fd: cint; const times:TTimespecArr):cint; {$ifdef FPC_USE_LIBC} cdecl; external name 'futimens'; {$ENDIF}
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{$if defined(cpuriscv)}
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type
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priscv_hwprobe = ^triscv_hwprobe;
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triscv_hwprobe = record
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key : __s64;
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value : __u64;
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end;
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const
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RISCV_HWPROBE_KEY_MVENDORID = 0;
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RISCV_HWPROBE_KEY_MARCHID = 1;
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RISCV_HWPROBE_KEY_MIMPID = 2;
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RISCV_HWPROBE_KEY_BASE_BEHAVIOR = 3;
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RISCV_HWPROBE_BASE_BEHAVIOR_IMA = 1 shl 0;
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RISCV_HWPROBE_KEY_IMA_EXT_0 = 4;
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RISCV_HWPROBE_IMA_FD = 1 shl 0;
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RISCV_HWPROBE_IMA_C = 1 shl 1;
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RISCV_HWPROBE_IMA_V = 1 shl 2;
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RISCV_HWPROBE_EXT_ZBA = 1 shl 3;
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RISCV_HWPROBE_EXT_ZBB = 1 shl 4;
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RISCV_HWPROBE_EXT_ZBS = 1 shl 5;
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RISCV_HWPROBE_EXT_ZICBOZ = 1 shl 6;
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RISCV_HWPROBE_EXT_ZBC = 1 shl 7;
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RISCV_HWPROBE_EXT_ZBKB = 1 shl 8;
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RISCV_HWPROBE_EXT_ZBKC = 1 shl 9;
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RISCV_HWPROBE_EXT_ZBKX = 1 shl 10;
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RISCV_HWPROBE_EXT_ZKND = 1 shl 11;
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RISCV_HWPROBE_EXT_ZKNE = 1 shl 12;
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RISCV_HWPROBE_EXT_ZKNH = 1 shl 13;
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RISCV_HWPROBE_EXT_ZKSED = 1 shl 14;
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RISCV_HWPROBE_EXT_ZKSH = 1 shl 15;
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RISCV_HWPROBE_EXT_ZKT = 1 shl 16;
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RISCV_HWPROBE_EXT_ZVBB = 1 shl 17;
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RISCV_HWPROBE_EXT_ZVBC = 1 shl 18;
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RISCV_HWPROBE_EXT_ZVKB = 1 shl 19;
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RISCV_HWPROBE_EXT_ZVKG = 1 shl 20;
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RISCV_HWPROBE_EXT_ZVKNED = 1 shl 21;
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RISCV_HWPROBE_EXT_ZVKNHA = 1 shl 22;
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RISCV_HWPROBE_EXT_ZVKNHB = 1 shl 23;
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RISCV_HWPROBE_EXT_ZVKSED = 1 shl 24;
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RISCV_HWPROBE_EXT_ZVKSH = 1 shl 25;
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RISCV_HWPROBE_EXT_ZVKT = 1 shl 26;
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RISCV_HWPROBE_EXT_ZFH = 1 shl 27;
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RISCV_HWPROBE_EXT_ZFHMIN = 1 shl 28;
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RISCV_HWPROBE_EXT_ZIHINTNTL = 1 shl 29;
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RISCV_HWPROBE_EXT_ZVFH = 1 shl 30;
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RISCV_HWPROBE_EXT_ZVFHMIN = 1 shl 31;
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RISCV_HWPROBE_EXT_ZFA = 1 shl 32;
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RISCV_HWPROBE_EXT_ZTSO = 1 shl 33;
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RISCV_HWPROBE_EXT_ZACAS = 1 shl 34;
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RISCV_HWPROBE_EXT_ZICOND = 1 shl 35;
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RISCV_HWPROBE_EXT_ZIHINTPAUSE = 1 shl 36;
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RISCV_HWPROBE_EXT_ZVE32X = 1 shl 37;
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RISCV_HWPROBE_EXT_ZVE32F = 1 shl 38;
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RISCV_HWPROBE_EXT_ZVE64X = 1 shl 39;
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RISCV_HWPROBE_EXT_ZVE64F = 1 shl 40;
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RISCV_HWPROBE_EXT_ZVE64D = 1 shl 41;
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RISCV_HWPROBE_EXT_ZIMOP = 1 shl 42;
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RISCV_HWPROBE_EXT_ZCA = 1 shl 43;
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RISCV_HWPROBE_EXT_ZCB = 1 shl 44;
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RISCV_HWPROBE_EXT_ZCD = 1 shl 45;
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RISCV_HWPROBE_EXT_ZCF = 1 shl 46;
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RISCV_HWPROBE_EXT_ZCMOP = 1 shl 47;
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RISCV_HWPROBE_EXT_ZAWRS = 1 shl 48;
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RISCV_HWPROBE_EXT_SUPM = 1 shl 49;
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RISCV_HWPROBE_KEY_CPUPERF_0 = 5;
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RISCV_HWPROBE_MISALIGNED_UNKNOWN = 0 shl 0;
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RISCV_HWPROBE_MISALIGNED_EMULATED = 1 shl 0;
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RISCV_HWPROBE_MISALIGNED_SLOW = 2 shl 0;
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RISCV_HWPROBE_MISALIGNED_FAST = 3 shl 0;
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RISCV_HWPROBE_MISALIGNED_UNSUPPORTED = 4 shl 0;
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RISCV_HWPROBE_MISALIGNED_MASK = 7 shl 0;
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RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE = 6;
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RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS = 7;
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RISCV_HWPROBE_KEY_TIME_CSR_FREQ = 8;
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RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF = 9;
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RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN = 0;
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RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED = 1;
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RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW = 2;
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RISCV_HWPROBE_MISALIGNED_SCALAR_FAST = 3;
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RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED = 4;
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RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF = 10;
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RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN = 0;
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RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW = 2;
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RISCV_HWPROBE_MISALIGNED_VECTOR_FAST = 3;
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RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED = 4;
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RISCV_HWPROBE_WHICH_CPUS = 1 shl 0;
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function riscv_hwprobe(pairs:priscv_hwprobe; pair_count:size_t; cpusetsize:size_t; cpus:pdword; flags:dword):longint;
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{$endif defined(cpuriscv)}
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implementation
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@ -922,5 +1014,12 @@ end;
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{$endif not FPC_USE_LIBC}
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{$if defined(cpuriscv)}
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function riscv_hwprobe(pairs:priscv_hwprobe; pair_count:size_t; cpusetsize:size_t; cpus:pdword; flags:dword):longint;
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begin
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riscv_hwprobe:=do_syscall(syscall_nr_riscv_hwprobe,TSysParam(pairs),TSysParam(pair_count),TSysParam(cpusetsize),TSysParam(cpus),TSysParam(flags));
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end;
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{$endif defined(cpuriscv)}
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end.
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53
tests/test/units/linux/thwprobe.pp
Normal file
53
tests/test/units/linux/thwprobe.pp
Normal file
@ -0,0 +1,53 @@
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{ %target=linux }
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{ %cpu=riscv32,riscv64 }
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uses
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linux,sysutils;
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var
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ariscv_hwprobe: triscv_hwprobe;
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begin
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ariscv_hwprobe.key:=RISCV_HWPROBE_KEY_IMA_EXT_0;
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riscv_hwprobe(@ariscv_hwprobe,1,0,nil,0);
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writeln('Raw key value returned by RISCV_HWPROBE_KEY_IMA_EXT_0: %',Binstr(ariscv_hwprobe.value,64));
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if (ariscv_hwprobe.value and RISCV_HWPROBE_IMA_FD)<>0 then
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writeln('F and D extensions supported')
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else
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writeln('F and D extensions not supported');
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if (ariscv_hwprobe.value and RISCV_HWPROBE_IMA_V)<>0 then
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writeln('V extension supported')
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else
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writeln('V extension supported');
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if (ariscv_hwprobe.value and RISCV_HWPROBE_EXT_ZBA)<>0 then
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writeln('ZBA extension supported')
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else
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writeln('ZBA extension not supported');
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if (ariscv_hwprobe.value and RISCV_HWPROBE_EXT_ZBB)<>0 then
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writeln('ZBB extension supported')
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else
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writeln('ZBB extension not supported');
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if (ariscv_hwprobe.value and RISCV_HWPROBE_EXT_ZBS)<>0 then
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writeln('ZBS extension supported')
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else
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writeln('ZBS extension not supported');
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if (ariscv_hwprobe.value and RISCV_HWPROBE_EXT_ZICBOZ)<>0 then
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writeln('ZICBOZ extension supported')
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else
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writeln('ZICBOZ extension not supported');
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if (ariscv_hwprobe.value and RISCV_HWPROBE_EXT_ZBC)<>0 then
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writeln('ZBC extension supported')
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else
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writeln('ZBC extension not supported');
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if (ariscv_hwprobe.value and RISCV_HWPROBE_EXT_ZBKB)<>0 then
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writeln('ZBKB extension supported')
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else
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writeln('ZBKB extension supported');
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end.
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