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https://gitlab.com/freepascal.org/fpc/source.git
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* added more register functions
This commit is contained in:
peter
parent
619b429650
commit
b224d87ea5
@ -31,17 +31,27 @@ interface
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aasmbase,aasmtai,aasmcpu,
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cpubase,cpuinfo,
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node,symconst,SymType,
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RgCpu;
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rgcpu;
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type
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TCgSparc=class(tcg)
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protected
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rgint,
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rgfpu : trgcpu;
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rgfpu : trgcpu;
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function IsSimpleRef(const ref:treference):boolean;
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public
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procedure init_register_allocators;override;
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procedure done_register_allocators;override;
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function getintregister(list:Taasmoutput;size:Tcgsize):Tregister;override;
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function getaddressregister(list:Taasmoutput):Tregister;override;
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function getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;override;
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function getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;override;
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procedure getexplicitregister(list:Taasmoutput;r:Tregister);override;
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procedure ungetregister(list:Taasmoutput;r:Tregister);override;
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procedure add_move_instruction(instr:Taicpu);override;
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procedure do_register_allocation(list:Taasmoutput;headertai:tai);override;
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procedure allocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);override;
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procedure deallocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);override;
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{ sparc special, needed by cg64 }
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procedure handle_load_store(list:taasmoutput;isstore:boolean;op: tasmop;reg:tregister;ref: treference);
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procedure handle_reg_const_reg(list:taasmoutput;op:Tasmop;src:tregister;a:aword;dst:tregister);
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@ -51,6 +61,8 @@ interface
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procedure a_paramaddr_ref(list:TAasmOutput;const r:TReference;const LocPara:TParaLocation);override;
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procedure a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const locpara : tparalocation);override;
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procedure a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const locpara : tparalocation);override;
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procedure a_loadany_param_ref(list : taasmoutput;const locpara : tparalocation;const ref:treference;shuffle : pmmshuffle);override;
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procedure a_loadany_param_reg(list : taasmoutput;const locpara : tparalocation;const reg:tregister;shuffle : pmmshuffle);override;
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procedure a_call_name(list:TAasmOutput;const s:string);override;
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procedure a_call_reg(list:TAasmOutput;Reg:TRegister);override;
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{ General purpose instructions }
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@ -108,7 +120,7 @@ implementation
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uses
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globtype,globals,verbose,systems,cutils,
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symdef,symsym,defutil,paramgr,
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rgobj,tgobj,cpupi;
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tgobj,cpupi;
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{****************************************************************************
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@ -222,20 +234,121 @@ implementation
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procedure Tcgsparc.init_register_allocators;
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begin
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{rg:=Trgcpu.create(15,chr(RS_O0)+chr(RS_O1)+chr(RS_O2)+chr(RS_O3)+
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chr(RS_O4)+chr(RS_O5)+chr(RS_O7)+
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chr(RS_L0)+chr(RS_L1)+chr(RS_L2)+chr(RS_L3)+
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chr(RS_L4)+chr(RS_L5)+chr(RS_L6)+chr(RS_L7));}
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rgint:=TrgCpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_O0,RS_O1,RS_O2,RS_O3,RS_O4,RS_O5,RS_O7,RS_L0,RS_L1,RS_L2,RS_L3,RS_L4,RS_L5,RS_L6,RS_L7],first_int_imreg,[]);
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{$warning FIX ME}
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rgint:=Trgcpu.create(R_INTREGISTER,R_SUBWHOLE,
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[RS_O0,RS_O1,RS_O2,RS_O3,RS_O4,RS_O5,RS_O7,
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RS_L0,RS_L1,RS_L2,RS_L3,RS_L4,RS_L5,RS_L6,RS_L7],
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first_int_imreg,[]);
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rgfpu:=trgcpu.create(R_FPUREGISTER,R_SUBNONE,
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[RS_F0,RS_F1,RS_F2,RS_F3,RS_F4,RS_F5,RS_F6,RS_F7,RS_F8,RS_F9,RS_F10,RS_F11,RS_F12,RS_F13,RS_F14,RS_F15,RS_F16,RS_F17,RS_F18,RS_F19,RS_F20,RS_F21,RS_F22,RS_F23,RS_F24,RS_F25,RS_F26,RS_F27,RS_F28,RS_F29,RS_F30,RS_F31],first_fpu_imreg,[]);
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[RS_F0,RS_F1,RS_F2,RS_F3,RS_F4,RS_F5,RS_F6,RS_F7,
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RS_F8,RS_F9,RS_F10,RS_F11,RS_F12,RS_F13,RS_F14,RS_F15,
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RS_F16,RS_F17,RS_F18,RS_F19,RS_F20,RS_F21,RS_F22,RS_F23,
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RS_F24,RS_F25,RS_F26,RS_F27,RS_F28,RS_F29,RS_F30,RS_F31],
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first_fpu_imreg,[]);
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end;
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procedure Tcgsparc.done_register_allocators;
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begin
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rgint.free;
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rgfpu.free;
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end;
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function tcgsparc.getintregister(list:Taasmoutput;size:Tcgsize):Tregister;
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begin
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result:=rgint.getregister(list,R_SUBWHOLE);
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end;
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function tcgsparc.getaddressregister(list:Taasmoutput):Tregister;
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begin
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result:=rgint.getregister(list,R_SUBWHOLE);
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end;
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function tcgsparc.getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;
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begin
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if size=OS_F64 then
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result:=rgfpu.getregister(list,R_SUBFD)
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else
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result:=rgfpu.getregister(list,R_SUBWHOLE);
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end;
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function tcgsparc.getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;
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begin
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internalerror(200310241);
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result:=RS_INVALID;
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end;
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procedure tcgsparc.getexplicitregister(list:Taasmoutput;r:Tregister);
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begin
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case getregtype(r) of
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R_INTREGISTER :
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rgint.getexplicitregister(list,r);
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R_FPUREGISTER :
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rgfpu.getexplicitregister(list,r);
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else
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internalerror(200310091);
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end;
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end;
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procedure tcgsparc.ungetregister(list:Taasmoutput;r:Tregister);
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begin
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case getregtype(r) of
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R_INTREGISTER :
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rgint.ungetregister(list,r);
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R_FPUREGISTER :
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rgfpu.ungetregister(list,r);
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else
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internalerror(200310091);
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end;
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end;
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procedure tcgsparc.allocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
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begin
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case rt of
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R_INTREGISTER :
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rgint.allocexplicitregisters(list,r);
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R_FPUREGISTER :
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rgfpu.allocexplicitregisters(list,r);
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else
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internalerror(200310092);
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end;
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end;
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procedure tcgsparc.deallocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
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begin
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case rt of
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R_INTREGISTER :
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rgint.deallocexplicitregisters(list,r);
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R_FPUREGISTER :
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rgfpu.deallocexplicitregisters(list,r);
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else
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internalerror(200310093);
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end;
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end;
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procedure tcgsparc.add_move_instruction(instr:Taicpu);
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begin
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rgint.add_move_instruction(instr);
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end;
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procedure tcgsparc.do_register_allocation(list:Taasmoutput;headertai:tai);
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begin
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{ Int }
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rgint.do_register_allocation(list,headertai);
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rgint.translate_registers(list);
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{ FPU }
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rgfpu.do_register_allocation(list,headertai);
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rgfpu.translate_registers(list);
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end;
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@ -350,6 +463,55 @@ implementation
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end;
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procedure tcgsparc.a_loadany_param_ref(list : taasmoutput;const locpara : tparalocation;const ref:treference;shuffle : pmmshuffle);
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var
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href,
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tempref : treference;
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templocpara : tparalocation;
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begin
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{ Load floats like ints }
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templocpara:=locpara;
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case locpara.size of
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OS_F32 :
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templocpara.size:=OS_32;
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OS_F64 :
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templocpara.size:=OS_64;
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end;
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{ Word 0 is in register, word 1 is in reference }
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if (templocpara.loc=LOC_REFERENCE) and (templocpara.low_in_reg) then
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begin
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tempref:=ref;
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cg.a_load_reg_ref(list,OS_INT,OS_INT,templocpara.register,tempref);
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inc(tempref.offset,4);
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reference_reset_base(href,templocpara.reference.index,templocpara.reference.offset);
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cg.a_load_ref_ref(list,OS_INT,OS_INT,href,tempref);
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end
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else
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inherited a_loadany_param_ref(list,templocpara,ref,shuffle);
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end;
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procedure tcgsparc.a_loadany_param_reg(list : taasmoutput;const locpara : tparalocation;const reg:tregister;shuffle : pmmshuffle);
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var
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href : treference;
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begin
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{ Word 0 is in register, word 1 is in reference, not
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possible to load it in 1 register }
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if (locpara.loc=LOC_REFERENCE) and (locpara.low_in_reg) then
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internalerror(200307011);
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{ Float load use a temp reference }
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if locpara.size in [OS_F32,OS_F64] then
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begin
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tg.GetTemp(list,TCGSize2Size[locpara.size],tt_normal,href);
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a_loadany_param_ref(list,locpara,href,shuffle);
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a_loadfpu_ref_reg(list,locpara.size,href,reg);
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tg.Ungettemp(list,href);
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end
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else
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inherited a_loadany_param_reg(list,locpara,reg,shuffle);
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end;
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procedure TCgSparc.a_call_name(list:TAasmOutput;const s:string);
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begin
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list.concat(taicpu.op_sym(A_CALL,objectlibrary.newasmsymbol(s)));
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@ -1052,7 +1214,10 @@ begin
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end.
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{
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$Log$
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Revision 1.70 2003-10-24 11:14:46 mazen
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Revision 1.71 2003-10-24 15:20:37 peter
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* added more register functions
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Revision 1.70 2003/10/24 11:14:46 mazen
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* rg.[un]GetRegister* ==> [Un]Get[*]Register
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Revision 1.69 2003/10/01 20:34:49 peter
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@ -27,85 +27,44 @@ unit rgcpu;
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interface
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uses
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cpubase,
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cpuinfo,
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aasmcpu,
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aasmtai,
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cclasses,globtype,
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cgbase,aasmbase,rgobj;
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cgbase,rgobj;
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type
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trgcpu=class(trgobj)
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function GetRegisterFpu(list:TAasmOutput;size:Tcgsize):TRegister;override;
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procedure UngetRegisterFpu(list:taasmoutput;reg:tregister;size:TCGsize);override;
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procedure add_constraints(reg:tregister);override;
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end;
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implementation
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uses
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cgobj,verbose;
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cpubase;
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function TRgCpu.GetRegisterFpu(list:TAasmOutput;size:Tcgsize):TRegister;
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procedure trgcpu.add_constraints(reg:tregister);
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var
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i: Tsuperregister;
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supreg,i: Tsuperregister;
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r: Tregister;
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begin
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for i:=firstsavefpureg to lastsavefpureg do
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begin
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if (i in unusedregsfpu) and
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(
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(size=OS_F32) or
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(not odd(i-RS_F0))
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) then
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begin
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exclude(unusedregsfpu,i);
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dec(countunusedregsfpu);
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r:=newreg(R_FPUREGISTER,i,R_SUBNONE);
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list.concat(tai_regalloc.alloc(r));
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result := r;
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{ double need 2 FPU registers }
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if size=OS_F64 then
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begin
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r:=newreg(R_FPUREGISTER,i+1,R_SUBNONE);
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exclude(unusedregsfpu,i+1);
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dec(countunusedregsfpu);
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list.concat(tai_regalloc.alloc(r));
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end;
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exit;
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end;
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end;
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internalerror(10);
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end;
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procedure trgcpu.UngetRegisterFpu(list:taasmoutput;reg:tregister;size:TCGsize);
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var
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r : tregister;
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supreg : tsuperregister;
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begin
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supreg:=getsupreg(reg);
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{ double need 2 FPU registers }
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if (size=OS_F64) then
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{ Let 64bit floats conflict with all odd float regs }
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if getsubreg(reg)=R_SUBFD then
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begin
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{ Only even FP registers are allowed }
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if odd(supreg-RS_F0) then
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internalerror(200306101);
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r:=newreg(R_FPUREGISTER,supreg+1,R_SUBNONE);
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inc(countunusedregsfpu);
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include(unusedregsfpu,getsupreg(r));
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list.concat(tai_regalloc.dealloc(r));
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supreg:=getsupreg(reg);
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i:=RS_F1;
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while (i<=RS_F31) do
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begin
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add_edge(supreg,i);
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inc(i,2);
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end;
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end;
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inc(countunusedregsfpu);
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include(unusedregsfpu,supreg);
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list.concat(tai_regalloc.dealloc(reg));
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end;
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end.
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{
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$Log$
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Revision 1.19 2003-10-01 20:34:50 peter
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Revision 1.20 2003-10-24 15:20:37 peter
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* added more register functions
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Revision 1.19 2003/10/01 20:34:50 peter
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* procinfo unit contains tprocinfo
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* cginfo renamed to cgbase
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* moved cgmessage to verbose
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