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* partially merged the mips-embedded branch of Michael Ring:

Browse Source 
- startup code/controller units are not merged yet
  - assembler call does not pass the needed CPU type yet

git-svn-id: trunk@27188 -
This commit is contained in:
florian 2014-03-19 21:25:38 +00:00
parent 31a3e98a91
commit b2b26f84cf
23 changed files with 478 additions and 41 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
compiler/aggas.pas
View File

@ -227,7 +227,7 @@ implementation
);
{ Generic unaligned pseudo-instructions, seems ELF specific }
use_ua_elf_systems = [system_mipsel_linux,system_mipseb_linux,system_mipsel_android];
use_ua_elf_systems = [system_mipsel_linux,system_mipseb_linux,system_mipsel_android,system_mipsel_embedded,system_mipseb_embedded];
ait_ua_elf_const2str : array[aitconst_16bit_unaligned..aitconst_64bit_unaligned]
of string[20]=(
#9'.2byte'#9,#9'.4byte'#9,#9'.8byte'#9

3
compiler/avr/cpuinfo.pas
View File

@ -100,6 +100,9 @@ Const
'LIBGCC'
);
{ We know that there are fields after sramsize
but we don't care about this warning }
{$WARN 3177 OFF}
embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
((
controllertypestr:'';

16
compiler/globals.pas
View File

@ -163,9 +163,9 @@ interface
{$endif defined(ARM)}
{ CPU targets with microcontroller support can add a controller specific unit }
{$if defined(ARM) or defined(AVR)}
{$if defined(ARM) or defined(AVR) or defined(MIPSEL)}
controllertype : tcontrollertype;
{$endif defined(ARM) or defined(AVR)}
{$endif defined(ARM) or defined(AVR) or defined(MIPSEL)}
{ WARNING: this pointer cannot be written as such in record token }
pmessage : pmessagestaterecord;
end;
@ -501,9 +501,9 @@ interface
{$if defined(ARM)}
instructionset : is_arm;
{$endif defined(ARM)}
{$if defined(ARM) or defined(AVR)}
{$if defined(ARM) or defined(AVR) or defined(MIPSEL)}
controllertype : ct_none;
{$endif defined(ARM) or defined(AVR)}
{$endif defined(ARM) or defined(AVR) or defined(MIPSEL)}
pmessage : nil;
);
@ -535,9 +535,9 @@ interface
function Setoptimizecputype(const s:string;var a:tcputype):boolean;
function Setcputype(const s:string;var a:tsettings):boolean;
function SetFpuType(const s:string;var a:tfputype):boolean;
{$if defined(arm) or defined(avr)}
{$if defined(arm) or defined(avr) or defined(mipsel)}
function SetControllerType(const s:string;var a:tcontrollertype):boolean;
{$endif defined(arm) or defined(avr)}
{$endif defined(arm) or defined(avr) or defined(mipsel)}
function IncludeFeature(const s : string) : boolean;
function SetMinFPConstPrec(const s: string; var a: tfloattype) : boolean;
@ -1176,7 +1176,7 @@ implementation
end;
{$if defined(arm) or defined(avr)}
{$if defined(arm) or defined(avr) or defined(mipsel)}
function SetControllerType(const s:string;var a:tcontrollertype):boolean;
var
t : tcontrollertype;
@ -1192,7 +1192,7 @@ implementation
break;
end;
end;
{$endif defined(arm) or defined(avr)}
{$endif defined(arm) or defined(avr) or defined(mipsel)}
function IncludeFeature(const s : string) : boolean;

4
compiler/globtype.pas
View File

@ -289,10 +289,10 @@ interface
twpoptimizerswitches = set of twpoptimizerswitch;
type
{ Used by ARM / AVR to differentiate between specific microcontrollers }
{ Used by ARM / AVR / MIPSEL to differentiate between specific microcontrollers }
tcontrollerdatatype = record
controllertypestr, controllerunitstr: string[20];
flashbase, flashsize, srambase, sramsize, eeprombase, eepromsize: dword;
flashbase, flashsize, srambase, sramsize, eeprombase, eepromsize, bootbase, bootsize: dword;
end;
ttargetswitchinfo = record

3
compiler/mips/cpugas.pas
View File

@ -103,6 +103,7 @@ unit cpugas;
Replace(result,'$ABI','-mabi='+abitypestr[mips_abi]);
{ ARCH selection }
Replace(result,'$ARCH','-march='+lower(cputypestr[current_settings.cputype]));
// Replace(result,'$ARCH','-march=pic32mx -mtune=pic32mx');
end;
{****************************************************************************}
@ -380,7 +381,7 @@ unit cpugas;
idtxt: 'AS';
asmbin: 'as';
asmcmd: '$ABI $ARCH $NOWARN -EL $PIC -o $OBJ $EXTRAOPT $ASM';
supported_targets: [system_mipsel_linux,system_mipsel_android];
supported_targets: [system_mipsel_linux,system_mipsel_android,system_mipsel_embedded];
flags: [ af_needar, af_smartlink_sections];
labelprefix: '.L';
comment: '# ';

107
compiler/mips/cpuinfo.pas
View File

@ -38,7 +38,8 @@ Type
cpu_mips4,
cpu_mips5,
cpu_mips32,
cpu_mips32r2
cpu_mips32r2,
cpu_pic32mx
);
tfputype =(fpu_none,fpu_soft,fpu_mips2,fpu_mips3);
@ -80,7 +81,8 @@ Const
{ cpu_mips4 } 'MIPS4',
{ cpu_mips5 } 'MIPS5',
{ cpu_mips32 } 'MIPS32',
{ cpu_mips32r2 } 'MIPS32R2'
{ cpu_mips32r2 } 'MIPS32R2',
{ cpu_pic32mx } 'PIC32MX'
);
fputypestr : array[tfputype] of string[9] = ('',
@ -102,6 +104,107 @@ Const
mips_abi : tabitype = abi_default;
{$ifdef MIPSEL}
type
tcpuflags=(CPUMIPS_HAS_XXXX); //Todo: Does this need to be filled?
const
cpu_capabilities : array[tcputype] of set of tcpuflags =
( { cpu_none } [],
{ cpu_mips1 } [],
{ cpu_mips2 } [],
{ cpu_mips3 } [],
{ cpu_mips4 } [],
{ cpu_mips5 } [],
{ cpu_mips32 } [],
{ cpu_mips32r2 } [],
{ cpu_pic32mx } []
);
type
tcontrollertype =
(ct_none,
{ pic32mx }
ct_pic32mx110f016b,
ct_pic32mx110f016c,
ct_pic32mx110f016d,
ct_pic32mx120f032b,
ct_pic32mx120f032c,
ct_pic32mx120f032d,
ct_pic32mx130f064b,
ct_pic32mx130f064c,
ct_pic32mx130f064d,
ct_pic32mx150f128b,
ct_pic32mx150f128c,
ct_pic32mx150f128d,
ct_pic32mx210f016b,
ct_pic32mx210f016c,
ct_pic32mx210f016d,
ct_pic32mx220f032b,
ct_pic32mx220f032c,
ct_pic32mx220f032d,
ct_pic32mx230f064b,
ct_pic32mx230f064c,
ct_pic32mx230f064d,
ct_pic32mx250f128b,
ct_pic32mx250f128c,
ct_pic32mx250f128d,
ct_pic32mx775f256h,
ct_pic32mx775f256l,
ct_pic32mx775f512h,
ct_pic32mx775f512l,
ct_pic32mx795f512h,
ct_pic32mx795f512l
);
{ We know that there are fields after sramsize
but we don't care about this warning }
{$WARN 3177 OFF}
const
embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
(
(controllertypestr:''; controllerunitstr:''; flashbase:0; flashsize:0; srambase:0; sramsize:0),
{ PIC32MX1xx Series}
(controllertypestr:'PIC32MX110F016B'; controllerunitstr:'PIC32MX1xxFxxxB'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX110F016C'; controllerunitstr:'PIC32MX1xxFxxxC'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX110F016D'; controllerunitstr:'PIC32MX1xxFxxxD'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX120F032B'; controllerunitstr:'PIC32MX1xxFxxxB'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX120F032C'; controllerunitstr:'PIC32MX1xxFxxxC'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX120F032D'; controllerunitstr:'PIC32MX1xxFxxxD'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX130F064B'; controllerunitstr:'PIC32MX1xxFxxxB'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX130F064C'; controllerunitstr:'PIC32MX1xxFxxxC'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX130F064D'; controllerunitstr:'PIC32MX1xxFxxxD'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX150F128B'; controllerunitstr:'PIC32MX1xxFxxxB'; flashbase:$9d000000; flashsize:$00020000; srambase:$A0000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX150F128C'; controllerunitstr:'PIC32MX1xxFxxxC'; flashbase:$9d000000; flashsize:$00020000; srambase:$A0000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX150F128D'; controllerunitstr:'PIC32MX1xxFxxxD'; flashbase:$9d000000; flashsize:$00020000; srambase:$A0000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
{ PIC32MX2xx Series}
(controllertypestr:'PIC32MX210F016B'; controllerunitstr:'PIC32MX2xxFxxxB'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX210F016C'; controllerunitstr:'PIC32MX2xxFxxxC'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX210F016D'; controllerunitstr:'PIC32MX2xxFxxxD'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX220F032B'; controllerunitstr:'PIC32MX2xxFxxxB'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX220F032C'; controllerunitstr:'PIC32MX2xxFxxxC'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX220F032D'; controllerunitstr:'PIC32MX2xxFxxxD'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX230F064B'; controllerunitstr:'PIC32MX2xxFxxxB'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX230F064C'; controllerunitstr:'PIC32MX2xxFxxxC'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX230F064D'; controllerunitstr:'PIC32MX2xxFxxxD'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX250F128B'; controllerunitstr:'PIC32MX2xxFxxxB'; flashbase:$9d000000; flashsize:$00020000; srambase:$A0000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX250F128C'; controllerunitstr:'PIC32MX2xxFxxxC'; flashbase:$9d000000; flashsize:$00020000; srambase:$80000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
(controllertypestr:'PIC32MX250F128D'; controllerunitstr:'PIC32MX2xxFxxxD'; flashbase:$9d000000; flashsize:$00020000; srambase:$A0000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
{ PIC32MX7x5 Series}
(controllertypestr:'PIC32MX775F256H'; controllerunitstr:'PIC32MX7x5FxxxH'; flashbase:$9d000000; flashsize:$00040000; srambase:$A0000000; sramsize:$00010000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF),
(controllertypestr:'PIC32MX775F256L'; controllerunitstr:'PIC32MX7x5FxxxL'; flashbase:$9d000000; flashsize:$00040000; srambase:$A0000000; sramsize:$00010000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF),
(controllertypestr:'PIC32MX775F512H'; controllerunitstr:'PIC32MX7x5FxxxH'; flashbase:$9d000000; flashsize:$00080000; srambase:$A0000000; sramsize:$00010000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF),
(controllertypestr:'PIC32MX775F512L'; controllerunitstr:'PIC32MX7x5FxxxL'; flashbase:$9d000000; flashsize:$00080000; srambase:$A0000000; sramsize:$00010000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF),
(controllertypestr:'PIC32MX795F512H'; controllerunitstr:'PIC32MX7x5FxxxH'; flashbase:$9d000000; flashsize:$00080000; srambase:$A0000000; sramsize:$00020000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF),
(controllertypestr:'PIC32MX795F512L'; controllerunitstr:'PIC32MX7x5FxxxL'; flashbase:$9d000000; flashsize:$00080000; srambase:$A0000000; sramsize:$00020000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF)
);
{$endif MIPSEL}
{ Supported optimizations, only used for information }
supported_optimizerswitches = [cs_opt_regvar,cs_opt_loopunroll,cs_opt_nodecse,
cs_opt_reorder_fields,cs_opt_fastmath];

3
compiler/mips/cputarg.pas
View File

@ -51,6 +51,9 @@ implementation
,t_android
{$endif MIPSEL}
{$endif}
{$ifndef NOTARGETEMBEDDED}
,t_embed
{$endif}
{**************************************
Assemblers

4
compiler/mips/hlcgcpu.pas
View File

@ -93,7 +93,7 @@ implementation
begin
cgsubsetsize:=def_cgsize(subsetsize);
cgtosize:=def_cgsize(tosize);
if (current_settings.cputype<>cpu_mips32r2) then
if (current_settings.cputype<>cpu_mips32r2) and (current_settings.cputype<>cpu_pic32mx) then
inherited a_load_subsetreg_reg(list,subsetsize,tosize,sreg,destreg)
else if (sreg.bitlen>32) then
InternalError(2013070201)
@ -121,7 +121,7 @@ implementation
procedure thlcgmips.a_load_regconst_subsetreg_intern(list: TAsmList; fromsize, subsetsize: tdef; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
begin
if (current_settings.cputype<>cpu_mips32r2) then
if (current_settings.cputype<>cpu_mips32r2) and (current_settings.cputype<>cpu_pic32mx) then
inherited a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,slopt)
else if (sreg.bitlen>32) then
InternalError(2013070202)

1
compiler/mips/opcode.inc
View File

@ -188,4 +188,5 @@ A_MFC0,
A_MTC0,
A_SDBBP,
A_WRPGPR,
A_ERET,
A_END_DEF

1
compiler/mips/strinst.inc
View File

@ -188,4 +188,5 @@
'mtc0',
'sdbbp',
'wrpgpr',
'eret',
'end_def'

16
compiler/options.pas
View File

@ -193,9 +193,9 @@ var
wpopt: twpoptimizerswitch;
abi : tabi;
asmmode : tasmmode;
{$if defined(arm) or defined(avr)}
{$if defined(arm) or defined(avr) or defined(mipsel)}
controllertype : tcontrollertype;
{$endif defined(arm) or defined(avr)}
{$endif defined(arm) or defined(avr) or defined(mipsel)}
begin
p:=MessagePchar(option_info);
while assigned(p) do
@ -332,7 +332,7 @@ begin
end
else if pos('$CONTROLLERTYPES',s)>0 then
begin
{$if defined(arm) or defined(avr)}
{$if defined(arm) or defined(avr) or defined(mipsel)}
hs1:='';
for controllertype:=low(tcontrollertype) to high(tcontrollertype) do
begin
@ -356,8 +356,8 @@ begin
Comment(V_Normal,hs);
hs1:=''
end;
{$else defined(arm) or defined(avr)}
{$endif defined(arm) or defined(avr)}
{$else defined(arm) or defined(avr) or defined(mipsel)}
{$endif defined(arm) or defined(avr) or defined(mipsel)}
end
else
Comment(V_Normal,s);
@ -1954,7 +1954,7 @@ begin
end;
'p':
begin
{$if defined(arm) or defined(avr)}
{$if defined(arm) or defined(avr) or defined(mipsel)}
if (target_info.system in systems_embedded) then
begin
s:=upper(copy(more,j+1,length(more)-j));
@ -1963,7 +1963,7 @@ begin
break;
end
else
{$endif defined(arm) or defined(avr)}
{$endif defined(arm) or defined(avr) or defined(mipsel)}
IllegalPara(opt);
end;
'P':
@ -3126,6 +3126,8 @@ begin
heapsize:=128;
system_arm_embedded:
heapsize:=256;
system_mipsel_embedded:
heapsize:=256;
else
heapsize:=256;
end;

4
compiler/pmodules.pas
View File

@ -374,11 +374,11 @@ implementation
end;
{ CPU targets with microcontroller support can add a controller specific unit }
{$if defined(ARM) or defined(AVR)}
{$if defined(ARM) or defined(AVR) or defined(MIPSEL)}
if (target_info.system in systems_embedded) and (current_settings.controllertype<>ct_none) and
(embedded_controllers[current_settings.controllertype].controllerunitstr<>'') then
AddUnit(embedded_controllers[current_settings.controllertype].controllerunitstr);
{$endif ARM}
{$endif ARM AVR MIPSEL}
end;

2
compiler/pstatmnt.pas
View File

@ -1452,7 +1452,7 @@ implementation
current_procinfo.framepointer:=NR_STACK_POINTER_REG;
end;
end;
{$endif not(defined(sparc)) and not(defined(arm)) and not(defined(avr))}
{$endif not(defined(sparc)) and not(defined(arm)) and not(defined(avr)) not(defined(mipsel))}
{ Flag the result as assigned when it is returned in a
register.

8
compiler/scanner.pas
View File

@ -2932,9 +2932,9 @@ type
minfpconstprec:=tfloattype(tokenreadenum(sizeof(tfloattype)));
disabledircache:=boolean(tokenreadbyte);
{$if defined(ARM) or defined(AVR)}
{$if defined(ARM) or defined(AVR) or defined(MIPSEL)}
controllertype:=tcontrollertype(tokenreadenum(sizeof(tcontrollertype)));
{$endif defined(ARM) or defined(AVR)}
{$endif defined(ARM) or defined(AVR) or DEFINED(MIPSEL)}
endpos:=replaytokenbuf.pos;
if endpos-startpos<>expected_size then
Comment(V_Error,'Wrong size of Settings read-in');
@ -3001,9 +3001,9 @@ type
tokenwriteenum(minfpconstprec,sizeof(tfloattype));
recordtokenbuf.write(byte(disabledircache),1);
{$if defined(ARM) or defined(AVR)}
{$if defined(ARM) or defined(AVR) or defined(MIPSEL)}
tokenwriteenum(controllertype,sizeof(tcontrollertype));
{$endif defined(ARM) or defined(AVR)}
{$endif defined(ARM) or defined(AVR) or defined(MIPSEL)}
endpos:=recordtokenbuf.pos;
size:=endpos-startpos;
recordtokenbuf.seek(sizepos);

4
compiler/systems.inc
View File

@ -160,7 +160,9 @@
system_arm_android, { 77 }
system_i386_android, { 78 }
system_i8086_msdos, { 79 }
system_mipsel_android { 80 }
system_mipsel_android, { 80 }
system_mipseb_embedded, { 81 }
system_mipsel_embedded { 82 }
);
type

2
compiler/systems.pas
View File

@ -254,7 +254,7 @@ interface
system_iA64_embedded,system_x86_64_embedded,
system_mips_embedded,system_arm_embedded,
system_powerpc64_embedded,system_avr_embedded,
system_jvm_java32];
system_jvm_java32,system_mipseb_embedded,system_mipsel_embedded];
{ all systems that allow section directive }
systems_allow_section = systems_embedded;

68
compiler/systems/i_embed.pas
View File

@ -154,6 +154,69 @@ unit i_embed;
abi : abi_default
);
system_mipsel_embedded_info : tsysteminfo =
(
system : system_mipsel_embedded;
name : 'Embedded';
shortname : 'embedded';
flags : [tf_needs_symbol_size,tf_needs_symbol_type,tf_files_case_sensitive,
tf_smartlink_sections];
cpu : cpu_mipsel;
unit_env : '';
extradefines : '';
exeext : '';
defext : '.def';
scriptext : '.sh';
smartext : '.sl';
unitext : '.ppu';
unitlibext : '.ppl';
asmext : '.s';
objext : '.o';
resext : '.res';
resobjext : '.or';
sharedlibext : '.so';
staticlibext : '.a';
staticlibprefix : 'libp';
sharedlibprefix : 'lib';
sharedClibext : '.so';
staticClibext : '.a';
staticClibprefix : 'lib';
sharedClibprefix : 'lib';
importlibprefix : 'libimp';
importlibext : '.a';
Cprefix : '';
newline : #10;
dirsep : '/';
assem : as_gas;
assemextern : as_gas;
link : ld_none;
linkextern : ld_embedded;
ar : ar_gnu_ar;
res : res_none;
dbg : dbg_dwarf2;
script : script_unix;
endian : endian_little;
alignment :
(
procalign : 4;
loopalign : 4;
jumpalign : 0;
constalignmin : 0;
constalignmax : 4;
varalignmin : 0;
varalignmax : 4;
localalignmin : 4;
localalignmax : 8;
recordalignmin : 0;
recordalignmax : 8;
maxCrecordalign : 4
);
first_parm_offset : 0;
stacksize : 262144;
stackalign : 8;
abi : abi_default
);
system_i386_embedded_info : tsysteminfo =
(
system : system_i386_embedded;
@ -230,6 +293,11 @@ initialization
set_source_info(system_avr_embedded_info);
{$endif embedded}
{$endif CPUAVR}
{$ifdef CPUMIPSEL}
{$ifdef embedded}
set_source_info(system_mipsel_embedded_info);
{$endif embedded}
{$endif CPUMIPSEL}
{$ifdef CPUI386}
{$ifdef embedded}
set_source_info(system_i386_embedded_info);

216
compiler/systems/t_embed.pas
View File

@ -61,10 +61,20 @@ end;
procedure TlinkerEmbedded.SetDefaultInfo;
const
{$ifdef mips}
{$ifdef mipsel}
platform_select='-EL';
{$else}
platform_select='-EB';
{$endif}
{$else}
platform_select='';
{$endif}
begin
with Info do
begin
ExeCmd[1]:='ld -g $OPT $DYNLINK $STATIC $GCSECTIONS $STRIP -L. -o $EXE -T $RES';
ExeCmd[1]:='ld -g '+platform_select+' $OPT $DYNLINK $STATIC $GCSECTIONS $STRIP -L. -o $EXE -T $RES';
end;
end;
@ -80,13 +90,13 @@ Var
linklibc : boolean;
found1,
found2 : boolean;
{$ifdef ARM}
{$if defined(ARM) or defined(MIPSEL)}
LinkStr : string;
{$endif}
begin
WriteResponseFile:=False;
linklibc:=(SharedLibFiles.Find('c')<>nil);
{$if defined(ARM) or defined(i386) or defined(AVR)}
{$if defined(ARM) or defined(i386) or defined(AVR) or defined(MIPSEL)}
prtobj:='';
{$else}
prtobj:='prt0';
@ -125,6 +135,7 @@ begin
s:=FindObjectFile(prtobj,'',false);
LinkRes.AddFileName(s);
end;
{ try to add crti and crtbegin if linking to C }
if linklibc then
begin
@ -793,6 +804,197 @@ begin
end;
{$endif AVR}
{$ifdef MIPSEL}
case current_settings.controllertype of
ct_none:
begin
end;
ct_pic32mx110f016b,
ct_pic32mx110f016c,
ct_pic32mx110f016d,
ct_pic32mx120f032b,
ct_pic32mx120f032c,
ct_pic32mx120f032d,
ct_pic32mx130f064b,
ct_pic32mx130f064c,
ct_pic32mx130f064d,
ct_pic32mx150f128b,
ct_pic32mx150f128c,
ct_pic32mx150f128d,
ct_pic32mx210f016b,
ct_pic32mx210f016c,
ct_pic32mx210f016d,
ct_pic32mx220f032b,
ct_pic32mx220f032c,
ct_pic32mx220f032d,
ct_pic32mx230f064b,
ct_pic32mx230f064c,
ct_pic32mx230f064d,
ct_pic32mx250f128b,
ct_pic32mx250f128c,
ct_pic32mx250f128d,
ct_pic32mx775f256h,
ct_pic32mx775f256l,
ct_pic32mx775f512h,
ct_pic32mx775f512l,
ct_pic32mx795f512h,
ct_pic32mx795f512l:
begin
with embedded_controllers[current_settings.controllertype] do
with linkres do
begin
Add('OUTPUT_FORMAT("elf32-tradlittlemips")');
Add('OUTPUT_ARCH(pic32mx)');
Add('ENTRY(_reset)');
Add('PROVIDE(_vector_spacing = 0x00000001);');
Add('_ebase_address = 0x'+IntToHex(flashbase,8)+';');
Add('_RESET_ADDR = 0xBFC00000;');
Add('_BEV_EXCPT_ADDR = 0xBFC00380;');
Add('_DBG_EXCPT_ADDR = 0xBFC00480;');
Add('_GEN_EXCPT_ADDR = _ebase_address + 0x180;');
Add('MEMORY');
Add('{');
if flashsize<>0 then
begin
Add(' kseg0_program_mem : ORIGIN = 0x'+IntToHex(flashbase,8)+', LENGTH = 0x'+IntToHex(flashsize,8));
//TODO This should better be placed into the controllertype records
Add(' kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0xbef');
Add(' config3 : ORIGIN = 0xBFC00BF0, LENGTH = 0x4');
Add(' config2 : ORIGIN = 0xBFC00BF4, LENGTH = 0x4');
Add(' config1 : ORIGIN = 0xBFC00BF8, LENGTH = 0x4');
Add(' config0 : ORIGIN = 0xBFC00BFC, LENGTH = 0x4');
end;
Add(' ram : ORIGIN = 0x' + IntToHex(srambase,8)
+ ', LENGTH = 0x' + IntToHex(sramsize,8));
Add('}');
Add('_stack_top = 0x' + IntToHex(sramsize+srambase,8) + ';');
end;
end
else
if not (cs_link_nolink in current_settings.globalswitches) then
internalerror(200902011);
end;
with linkres do
begin
Add('SECTIONS');
Add('{');
Add(' .reset _RESET_ADDR :');
Add(' {');
Add(' KEEP(*(.reset .reset.*))');
Add(' KEEP(*(.startup .startup.*))');
Add(' } > kseg1_boot_mem');
Add(' .bev_excpt _BEV_EXCPT_ADDR :');
Add(' {');
Add(' KEEP(*(.bev_handler))');
Add(' } > kseg1_boot_mem');
Add(' .text :');
Add(' {');
Add(' _text_start = .;');
Add(' . = _text_start + 0x180;');
Add(' KEEP(*(.gen_handler))');
Add(' . = _text_start + 0x200;');
Add(' KEEP(*(.init .init.*))');
Add(' *(.text .text.*)');
Add(' *(.strings)');
Add(' *(.rodata .rodata.*)');
Add(' *(.comment)');
Add(' _etext = .;');
if embedded_controllers[current_settings.controllertype].flashsize<>0 then
begin
Add(' } >kseg0_program_mem');
end
else
begin
Add(' } >ram');
end;
Add(' .note.gnu.build-id : { *(.note.gnu.build-id) }');
Add(' .data :');
Add(' {');
Add(' _data = .;');
Add(' *(.data .data.*)');
Add(' KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
Add(' . = .;');
Add(' _gp = ALIGN(16) + 0x7ff0;');
Add(' _edata = .;');
if embedded_controllers[current_settings.controllertype].flashsize<>0 then
begin
Add(' } >ram AT >kseg0_program_mem');
end
else
begin
Add(' } >ram');
end;
Add(' .config_BFC00BF0 : {');
Add(' KEEP(*(.config_BFC00BF0))');
Add(' } > config3');
Add(' .config_BFC00BF4 : {');
Add(' KEEP(*(.config_BFC00BF4))');
Add(' } > config2');
Add(' .config_BFC00BF8 : {');
Add(' KEEP(*(.config_BFC00BF8))');
Add(' } > config1');
Add(' .config_BFC00BFC : {');
Add(' KEEP(*(.config_BFC00BFC))');
Add(' } > config0');
Add(' .bss :');
Add(' {');
Add(' _bss_start = .;');
Add(' *(.bss, .bss.*)');
Add(' *(COMMON)');
Add(' } >ram');
Add('. = ALIGN(4);');
Add('_bss_end = . ;');
Add(' .comment 0 : { *(.comment) }');
Add(' /* DWARF debug sections.');
Add(' Symbols in the DWARF debugging sections are relative to the beginning');
Add(' of the section so we begin them at 0. */');
Add(' /* DWARF 1 */');
Add(' .debug 0 : { *(.debug) }');
Add(' .line 0 : { *(.line) }');
Add(' /* GNU DWARF 1 extensions */');
Add(' .debug_srcinfo 0 : { *(.debug_srcinfo) }');
Add(' .debug_sfnames 0 : { *(.debug_sfnames) }');
Add(' /* DWARF 1.1 and DWARF 2 */');
Add(' .debug_aranges 0 : { *(.debug_aranges) }');
Add(' .debug_pubnames 0 : { *(.debug_pubnames) }');
Add(' /* DWARF 2 */');
Add(' .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }');
Add(' .debug_abbrev 0 : { *(.debug_abbrev) }');
Add(' /DISCARD/ : { *(.debug_line) }');
Add(' .debug_frame 0 : { *(.debug_frame) }');
Add(' .debug_str 0 : { *(.debug_str) }');
Add(' /DISCARD/ : { *(.debug_loc) }');
Add(' .debug_macinfo 0 : { *(.debug_macinfo) }');
Add(' /* SGI/MIPS DWARF 2 extensions */');
Add(' .debug_weaknames 0 : { *(.debug_weaknames) }');
Add(' .debug_funcnames 0 : { *(.debug_funcnames) }');
Add(' .debug_typenames 0 : { *(.debug_typenames) }');
Add(' .debug_varnames 0 : { *(.debug_varnames) }');
Add(' /* DWARF 3 */');
Add(' .debug_pubtypes 0 : { *(.debug_pubtypes) }');
Add(' .debug_ranges 0 : { *(.debug_ranges) }');
Add(' .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }');
Add(' .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }');
Add(' .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }');
Add(' .mdebug.abi32 : { KEEP(*(.mdebug.abi32)) }');
Add(' .mdebug.abiN32 : { KEEP(*(.mdebug.abiN32)) }');
Add(' .mdebug.abi64 : { KEEP(*(.mdebug.abi64)) }');
Add(' .mdebug.abiO64 : { KEEP(*(.mdebug.abiO64)) }');
Add(' .mdebug.eabi32 : { KEEP(*(.mdebug.eabi32)) }');
Add(' .mdebug.eabi64 : { KEEP(*(.mdebug.eabi64)) }');
Add(' /DISCARD/ : { *(.rel.dyn) }');
Add(' /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }');
Add('}');
Add('_end = .;');
end;
{$endif MIPSEL}
{ Write and Close response }
linkres.writetodisk;
linkres.free;
@ -856,7 +1058,7 @@ begin
if success and not(cs_link_nolink in current_settings.globalswitches) then
success:=PostProcessExecutable(current_module.exefilename+'.elf',false);
if success and (target_info.system in [system_arm_embedded,system_avr_embedded]) then
if success and (target_info.system in [system_arm_embedded,system_avr_embedded,system_mipsel_embedded]) then
begin
success:=DoExec(FindUtil(utilsprefix+'objcopy'),'-O ihex '+
ChangeFileExt(current_module.exefilename,'.elf')+' '+
@ -1047,4 +1249,10 @@ initialization
RegisterLinker(ld_embedded,TLinkerEmbedded);
RegisterTarget(system_i386_embedded_info);
{$endif i386}
{$ifdef mipsel}
RegisterLinker(ld_embedded,TLinkerEmbedded);
RegisterTarget(system_mipsel_embedded_info);
{$endif mipsel}
end.

8
compiler/utils/ppuutils/ppudump.pp
View File

@ -162,7 +162,9 @@ const
{ 77 } 'Android-arm',
{ 78 } 'Android-i386',
{ 79 } 'MSDOS-i8086',
{ 79 } 'Android-MIPSel'
{ 80 } 'Android-MIPSel',
{ 81 } 'Embedded-mipseb',
{ 82 } 'Embedded-mipsel'
);
const
@ -1097,9 +1099,9 @@ end;
disabledircache : boolean;
{ CPU targets with microcontroller support can add a controller specific unit }
{$if defined(ARM) or defined(AVR)}
{$if defined(ARM) or defined(AVR) or defined(MIPSEL)}
controllertype : tcontrollertype;
{$endif defined(ARM) or defined(AVR)}
{$endif defined(ARM) or defined(AVR) or defined(MIPSEL)}
{ WARNING: this pointer cannot be written as such in record token }
pmessage : pmessagestaterecord;
end;

22
rtl/embedded/Makefile.fpc
View File

@ -6,7 +6,9 @@
main=rtl
[target]
loaders=
loaders=$(LOADERS)
# not all targets include enough features to build all units so
# the common units which are not compiled for all CPUs are stored in
# CPU_SPECIFIC_COMMON_UNITS
@ -44,6 +46,12 @@ PROCINC=$(RTL)/$(CPU_TARGET)
UNITPREFIX=rtl
SYSTEMUNIT=system
override FPCOPT+=@rtl.cfg
LOADERS=
ifeq ($(ARCH),mipsel)
ifeq ($(SUBARCH),pic32mx)
override LOADERS=startup
endif
endif
ifdef RELEASE
override FPCOPT+=-Ur
@ -80,6 +88,12 @@ ifeq ($(ARCH),i386)
CPU_UNITS=multiboot
endif
ifeq ($(ARCH),mipsel)
ifeq ($(SUBARCH),pic32mx)
CPU_UNITS=pic32mx1xxfxxxb pic32mx2xxfxxxb pic32mx1xxfxxxc pic32mx2xxfxxxc pic32mx1xxfxxxd pic32mx2xxfxxxd pic32mx7x5fxxxl pic32mx7x5fxxxh
endif
endif
# Paths
OBJPASDIR=$(RTL)/objpas
GRAPHDIR=$(INC)/graph
@ -101,6 +115,12 @@ SYSCPUDEPS=$(addprefix $(PROCINC)/,$(CPUINCNAMES))
# Put system unit dependencies together.
SYSDEPS=$(SYSINCDEPS) $(SYSCPUDEPS)
#
# Loaders
#
startup$(OEXT) : $(CPU_TARGET)/startup.s
$(AS) $(ASTARGET) -o $(UNITTARGETDIRPREFIX)startup$(OEXT) $(CPU_TARGET)/startup.s -mabi=32 -march=pic32mx -mtune=pic32mx -W -EL -msym32
#
# Base Units (System, strings, os-dependent-base-unit)

15
rtl/embedded/rtl.cfg
View File

@ -49,3 +49,18 @@
-SfRANDOM
#endif CPUARM
# mipsel is powerful enough to handle most object pascal constructs
# it is only a matter of size
#ifdef CPUMIPSEL
-SfSOFTFPU
-SfCLASSES
-SfEXCEPTIONS
-SfANSISTRINGS
-SfRTTI
-SfWIDESTRINGS
-SfDYNARRAYS
-SfVARIANTS
-SfCOMMANDARGS
-SfRANDOM
#endif CPUMIPSEL

8
utils/fpcm/fpcmake.ini
View File

@ -272,6 +272,14 @@ endif
override FPCOPT+=-Cp$(SUBARCH)
endif
ifeq ($(FULL_TARGET),mipsel-embedded)
ifeq ($(SUBARCH),)
# we don't add a default here, people should explicitly add the SUBARCH
$(error When compiling for mipsel-embedded, a sub-architecture (e.g. SUBARCH=pic32mx) must be defined)
endif
override FPCOPT+=-Cp$(SUBARCH)
endif
# Full name of the target, including CPU and OS. For OSs limited
# to 8.3 we only use the target OS
ifneq ($(findstring $(OS_SOURCE),$(LIMIT83fs)),)

2
utils/fpcm/fpcmmain.pp
View File

@ -138,7 +138,7 @@ interface
{ wince }( true, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false),
{ gba } ( false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false),
{ nds } ( false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false),
{ embedded }( true, true, true, true, true, true, true, true, true , false, false, false, false, false, false, false),
{ embedded }( true, true, true, true, true, true, true, true, true , false, false, true , false, false, false, false),
{ symbian } ( true, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false),
{ nativent }( true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ iphonesim }( true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),