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attinst.inc --> strinst.inc
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@ -1,72 +0,0 @@
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{*****************************************************************************}
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{ File : attinstr.inc }
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{ Author : Mazen NEIFER }
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{ Project : Free Pascal Compiler (FPC) }
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{ Creation date : 2002\05\08 }
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{ Last modification date : 2002\07\01 }
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{ Licence : GPL }
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{ Bug report : mazen.neifer.01@supaero.org }
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{*****************************************************************************}
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'NONE',
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'ABCD',
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'ADD','ADDcc','ADDX','ADDXcc',
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'AND','ANDcc','ANDN','ADDNcc',
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'BN','BNE','BE','BG','BLE','BGE','BI','BGU','BLEU','BCC',
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'BCS','BPOS','NEG','BVC','BVS','BA',
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'CALL',
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'CBccc',
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'FBN','FBU','FBG','FBUG','FBL','FBUL','FBLG','FBNE',
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'FBE','FBUE','FBGE','FBUGE','FBLE','FBULE','FBO','FBA',
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'FLUSH',
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'JMPL',
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'LDSB','LDSH','LDSTUB',
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'LDUB','LDUH','LD','LDD','LDF','LDFSR','LDDF','LDC','LDCSR','LDDC',
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'LDSBA','LDSHA','LDUBA','LDUHA','LDA','LDDA',
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'LDSTUBA',
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'MULScc',
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'NOP',
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'OR','ORcc','ORN','ORNcc',
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'RDASR','RDY','RDPSR','RDWIM','RDTBR',
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'RESTORE',
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'RETT',
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'SAVE',
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'SDIV','SDIVcc',
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'SMUL','SMULcc',
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'SETHI',
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'SLL','SRL','SRA',
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'STB','STH','ST','STD','STF','STDF','STFSR','STDFQ',
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'STC','STDC','STCSR','STDCQ',
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'STBA','STHA','STA','STDA',
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'SUB','SUBcc','SUBX','SUBXcc',
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'SWAP','SWAPA','Ticc','TADDcc','TSUBcc','TADDccTV','TSUBccTV',
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'UDIV','UDIVcc',
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'UMUL','UMULcc',
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'UNMP',
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'WRASR','WRY','WRPSR','WRWIM','WRTBR',
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'XNOR','XNORcc',
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'XOR','XORcc',
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{Floating-point instructions}
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'FiTOs','FiTOd','FiTOq',
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'FsTOi','FdTOi','FqTOi',
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'FsTOd','FsTOq',
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'FdTOs','FdTOq',
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'FqTOd','FqTOs',
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'MOVs','NEGs','FABSs',
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'FSQRTs','FSQRTd','FSQRTq',
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'FADDs','FADDd','FADDq',
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'FSUBs','FSUBd','FSUBq',
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'FMULs','FMULd','FMULQ',
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'FdMULq','FsMULd',
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'DIVs','DIVd','FDIVq',
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'FCMPs','FCMPd','FCMPq',
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'FCPop1','CPop2',
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{Synthetic instructions}
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'btst','bset','bclr','btog',
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'clr','clrb','clrh',
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'cmp',
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'dec','deccc',
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'inc','inccc',
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'not',
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'set',
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'skipz','skipnz',
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'tst'
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@ -790,43 +790,47 @@ stack as in the Intel architecture,
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standard calling sequence does not define a maximum stack frame size, nor does
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it restrict how a language system uses the "unspecified" areas of the standard
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stack frame.}
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Dec(LocalSize,(16+1+5)*4);
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Dec(LocalSize,(16+1+5)*4);
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{Althogh the SPARC architecture require only word alignment, software
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convention and the operating system require every stack frame to be double word
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aligned}
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if(LocalSize and $00000003)<>0
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then
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LocalSize:=(LocalSize and $FFFFFFFC)+4;
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with list do
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concat(Taicpu.Op_reg_const_reg(A_SAVE,S_L,Stack_Pointer_Reg,localsize,Stack_Pointer_Reg));
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end;
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{Execute the SAVE instruction to get a new register window and get a new stack
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frame. In the "SAVE %i6,size,%i6" the first %i6 is related to the state before
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execution of the SAVE instrucion so it is the caller %i6, when the %i6 after
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execution of that instrucion is the called function stack pointer}
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with list do
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concat(Taicpu.Op_reg_const_reg(A_SAVE,S_L,Stack_Pointer_Reg,localsize,Stack_Pointer_Reg));
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end;
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procedure tcgSPARC.g_restore_frame_pointer(list:TAasmOutput);
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begin
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begin
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{We use trivial restore, as we set result before}
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with list do
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concat(Taicpu.Op_reg_const_reg(A_RESTORE,S_L,R_G0,0,R_G0));
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end;
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with list do
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concat(Taicpu.Op_reg_const_reg(A_RESTORE,S_L,R_G0,0,R_G0));
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end;
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procedure tcgSPARC.g_return_from_proc(list:TAasmOutput;parasize:aword);
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var
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RetReference:TReference;
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begin
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{ Routines with the poclearstack flag set use only a ret }
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{ also routines with parasize=0 }
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with list do
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RetReference:TReference;
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begin
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{According to the SPARC ABI, the stack is cleared using the RESTORE instruction
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which is genereted in the g_restore_frame_pointer. Notice that SPARC has no
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RETURN instruction and that JMPL is used instead. The JMPL instrucion have one
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delay slot, so an inversion is possible such as
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JMPL %i6+8,%g0
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RESTORE %g0,0,%g0
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If no inversion we can use just
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RESTORE %g0,0,%g0
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JMPL %i6+8,%g0
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NOP}
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with list do
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begin
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reference_reset_base(RetReference,R_I7,8);
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concat(Taicpu.Op_ref_reg(A_JMPL,S_L,RetReference,R_G0));
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if(parasize<>0)
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then
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{ parameters are limited to 65535 bytes because }
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{ ret allows only imm16 }
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IF(parasize>65535)
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THEN
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CGMessage(cg_e_parasize_too_big);
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concat(Taicpu.Op_ref_reg(A_JMPL,S_L,RetReference,R_G0));
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end
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end;
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PROCEDURE tcgSPARC.a_loadaddr_ref_reg(list:TAasmOutput;CONST ref:TReference;r:tregister);
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end;
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PROCEDURE tcgSPARC.a_loadaddr_ref_reg(list:TAasmOutput;CONST ref:TReference;r:tregister);
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begin
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// list.concat(taicpu.op_ref_reg(A_LEA,S_L,ref,r));
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@ -1075,6 +1079,9 @@ BEGIN
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END.
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{
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$Log$
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Revision 1.6 2002-10-01 17:41:50 florian
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Revision 1.7 2002-10-01 21:06:29 mazen
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attinst.inc --> strinst.inc
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Revision 1.6 2002/10/01 17:41:50 florian
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* fixed log and id
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}
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}
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@ -142,7 +142,7 @@ TYPE
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CONST
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FirstOp=Low(TAsmOp);
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LastOp=High(TAsmOp);
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std_op2str:op2strtable=({$INCLUDE attinstr.inc});
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std_op2str:op2strtable=({$INCLUDE strinst.inc});
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{*****************************************************************************
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Operand Sizes
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*****************************************************************************}
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@ -580,7 +580,10 @@ FUNCTION flags_to_cond(CONST f:TResFlags):TAsmCond;
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END.
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{
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$Log$
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Revision 1.8 2002-09-30 19:12:14 mazen
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Revision 1.9 2002-10-01 21:06:29 mazen
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attinst.inc --> strinst.inc
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Revision 1.8 2002/09/30 19:12:14 mazen
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* function prologue fixed
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Revision 1.7 2002/09/27 04:30:53 mazen
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{ Bug report : mazen.neifer.01@supaero.org }
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{*****************************************************************************}
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{
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Id:
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$Id$
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}
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'NONE',
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'ABCD',
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@ -74,5 +74,8 @@
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'skipz','skipnz',
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'tst'
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{
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Log:
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$Log$
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Revision 1.2 2002-10-01 21:07:48 mazen
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attinst.inc --> strinst.inc
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}
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