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* Xtensa: fix flag handling: B0 is considered as default flags

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git-svn-id: trunk@44687 -
This commit is contained in:
florian 2020-04-11 13:18:47 +00:00
parent 75fe6c23a5
commit b352449eac
5 changed files with 14 additions and 7 deletions
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2
compiler/hlcgobj.pas
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@ -4354,7 +4354,9 @@ implementation
LOC_FLAGS : LOC_FLAGS :
begin begin
a_jmp_flags(list,p.location.resflags,truelabel); a_jmp_flags(list,p.location.resflags,truelabel);
{$ifndef xtensa}
a_reg_dealloc(list,NR_DEFAULTFLAGS); a_reg_dealloc(list,NR_DEFAULTFLAGS);
{$endif xtensa}
a_jmp_always(list,falselabel); a_jmp_always(list,falselabel);
end; end;
{$endif cpuflags} {$endif cpuflags}

4
compiler/ncgutil.pas
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@ -332,11 +332,7 @@ implementation
LOC_FLAGS : LOC_FLAGS :
begin begin
cg.a_jmp_flags(list,p.location.resflags,truelabel); cg.a_jmp_flags(list,p.location.resflags,truelabel);
{ e.g. xtensa has no default flags but uses a boolean register }
{$ifndef xtensa}
cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
{$endif xtensa}
cg.a_jmp_always(list,falselabel); cg.a_jmp_always(list,falselabel);
end; end;
{$endif cpuflags} {$endif cpuflags}

4
compiler/xtensa/cgcpu.pas
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@ -144,6 +144,9 @@ implementation
rg[R_FPUREGISTER]:=trgcpu.create(R_FPUREGISTER,R_SUBNONE, rg[R_FPUREGISTER]:=trgcpu.create(R_FPUREGISTER,R_SUBNONE,
[RS_F0,RS_F1,RS_F2,RS_F3,RS_F4,RS_F5,RS_F6,RS_F7,RS_F8,RS_F9, [RS_F0,RS_F1,RS_F2,RS_F3,RS_F4,RS_F5,RS_F6,RS_F7,RS_F8,RS_F9,
RS_F10,RS_F11,RS_F12,RS_F13,RS_F14,RS_F15],first_fpu_imreg,[]); RS_F10,RS_F11,RS_F12,RS_F13,RS_F14,RS_F15],first_fpu_imreg,[]);
rg[R_SPECIALREGISTER]:=trgcpu.create(R_SPECIALREGISTER,R_SUBNONE,
[RS_B0,RS_B1,RS_B2,RS_B3,RS_B4,RS_B5,RS_B6,RS_B7,RS_B8,RS_B9,
RS_B10,RS_B11,RS_B12,RS_B13,RS_B14,RS_B15],first_flag_imreg,[]);
end; end;
@ -151,6 +154,7 @@ implementation
begin begin
rg[R_INTREGISTER].free; rg[R_INTREGISTER].free;
rg[R_FPUREGISTER].free; rg[R_FPUREGISTER].free;
rg[R_SPECIALREGISTER].free;
inherited done_register_allocators; inherited done_register_allocators;
end; end;

8
compiler/xtensa/cpubase.pas
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@ -84,6 +84,9 @@ unit cpubase;
first_mm_supreg = RS_INVALID; first_mm_supreg = RS_INVALID;
first_mm_imreg = $30; first_mm_imreg = $30;
{ firs flag imaginary register }
first_flag_imreg = $10;
{ TODO: Calculate bsstart} { TODO: Calculate bsstart}
regnumber_count_bsstart = 16; regnumber_count_bsstart = 16;
@ -223,8 +226,9 @@ unit cpubase;
{ Offset where the parent framepointer is pushed } { Offset where the parent framepointer is pushed }
PARENT_FRAMEPOINTER_OFFSET = 0; PARENT_FRAMEPOINTER_OFFSET = 0;
NR_DEFAULTFLAGS = NR_INVALID; { we consider B0 as the default flag }
RS_DEFAULTFLAGS = RS_INVALID; NR_DEFAULTFLAGS = NR_B0;
RS_DEFAULTFLAGS = RS_B0;
{***************************************************************************** {*****************************************************************************
GCC /ABI linking information GCC /ABI linking information

3
compiler/xtensa/ncpuadd.pas
View File

@ -283,7 +283,8 @@ interface
{ emit the actual operation } { emit the actual operation }
if cmpop then if cmpop then
begin begin
current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,location.register,left.location.register,right.location.register)); cg.getcpuregister(current_asmdata.CurrAsmList,location.resflags.register);
current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,location.resflags.register,left.location.register,right.location.register));
cg.maybe_check_for_fpu_exception(current_asmdata.CurrAsmList); cg.maybe_check_for_fpu_exception(current_asmdata.CurrAsmList);
if inv then if inv then