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https://gitlab.com/freepascal.org/fpc/source.git
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* correct masking of exceptions in genmath code
git-svn-id: trunk@5965 -
This commit is contained in:
florian
parent
4f5c8cfe1f
commit
b3a1868ff0
@ -1206,6 +1206,8 @@ Procedure SysResetFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
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{ setup sse exceptions }
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ldmxcsr mxcsr
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end;
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softfloat_exception_flags:=0;
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softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal;
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end;
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@ -1240,7 +1240,8 @@ end;
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procedure SysResetFpu;{$ifdef SYSTEMINLINE}inline;{$endif}
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begin
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{ nothing todo }
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softfloat_exception_flags:=0;
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softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal;
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end;
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{$endif FPC_SYSTEM_HAS_SYSRESETFPU}
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@ -100,6 +100,33 @@ type
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flag = byte;
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{$endif FPC_SYSTEM_HAS_flag}
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{*
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-------------------------------------------------------------------------------
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Raises the exceptions specified by `flags'. Floating-point traps can be
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defined here if desired. It is currently not possible for such a trap
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to substitute a result value. If traps are not implemented, this routine
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should be simply `softfloat_exception_flags |= flags;'.
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-------------------------------------------------------------------------------
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*}
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procedure float_raise( i: shortint );
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Begin
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softfloat_exception_flags := softfloat_exception_flags or i;
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if ((softfloat_exception_flags and not(softfloat_exception_mask)) and float_flag_invalid) <> 0 then
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RunError(207)
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else
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if ((softfloat_exception_flags and not(softfloat_exception_mask)) and float_flag_divbyzero) <> 0 then
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RunError(200)
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else
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if ((softfloat_exception_flags and not(softfloat_exception_mask)) and float_flag_overflow) <> 0 then
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RunError(205)
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else
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if ((softfloat_exception_flags and not(softfloat_exception_mask)) and float_flag_underflow) <> 0 then
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RunError(206)
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else
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if ((softfloat_exception_flags and not(softfloat_exception_mask)) and float_flag_inexact) <> 0 then
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RunError(207);
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end;
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{$ifndef FPC_SYSTEM_HAS_extractFloat64Frac0}
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Function extractFloat64Frac0(const a: float64): longint;
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@ -156,6 +183,8 @@ type
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aExp, shiftCount: smallint;
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aSig0, aSig1, absZ, aSigExtra: longint;
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z: longint;
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label
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invalid;
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Begin
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aSig1 := extractFloat64Frac1( a );
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aSig0 := extractFloat64Frac0( a );
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@ -165,7 +194,7 @@ type
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if 0<=shiftCount then
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Begin
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if (aExp=$7FF) and ((aSig0 or aSig1)<>0) then
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HandleError(207);
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goto invalid;
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shortShift64Left(aSig0 OR $00100000, aSig1, shiftCount, absZ, aSigExtra );
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End
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else
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@ -184,8 +213,19 @@ type
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else
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z:=absZ;
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if ((aSign<>0) xor (z<0)) AND (z<>0) then
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HandleError(207);
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float64_to_int32_round_to_zero := z;
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begin
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invalid:
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float_raise(float_flag_invalid);
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if (aSign <> 0) then
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float64_to_int32_round_to_zero:=$80000000
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else
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float64_to_int32_round_to_zero:=$7FFFFFFF;
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exit;
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end;
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if ( aSigExtra <> 0) then
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float_raise(float_flag_inexact);
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float64_to_int32_round_to_zero := z;
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End;
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@ -207,9 +247,17 @@ type
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if aExp>=$43e then
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begin
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if int64(a)<>$C3E0000000000000 then
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HandleError(207);
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{ pascal doesn't know Inf for int64 }
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HandleError(207);
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begin
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float_raise(float_flag_invalid);
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if (aSign=0) or ((aExp=$7FF) and
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(aSig<>$0010000000000000 )) then
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begin
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result:=$7FFFFFFFFFFFFFFF;
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exit;
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end;
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end;
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result:=$8000000000000000;
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exit;
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end;
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z:=aSig shl shiftCount;
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end
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@ -270,13 +318,14 @@ type
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Begin
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if ( a <> Float32($CF000000) ) then
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Begin
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float_raise( float_flag_invalid );
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if ( (aSign=0) or ( ( aExp = $FF ) and (aSig<>0) ) ) then
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Begin
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HandleError(207);
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float32_to_int32_round_to_zero:=$7fffffff;
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exit;
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end;
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End;
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HandleError(207);
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float32_to_int32_round_to_zero:=$80000000;
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exit;
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End
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else
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@ -561,8 +610,8 @@ type
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begin
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if( d <= 0.0 ) then
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begin
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if( d < 0.0 ) then
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HandleError(207);
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if d < 0.0 then
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d:=0/0;
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result := 0.0;
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end
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else
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@ -1005,7 +1054,10 @@ type
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Label Ldone;
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begin
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if( d <= 0.0 ) then
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HandleError(207);
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begin
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float_raise(float_flag_invalid);
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exit;
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end;
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d := frexp( d, e );
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{ logarithm using log(x) = z + z**3 P(z)/Q(z),
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@ -1455,5 +1507,3 @@ function FPower10(val: Extended; Power: Longint): Extended;
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end;
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end;
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{$endif SUPPORT_EXTENDED}
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@ -24,8 +24,26 @@
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function GetSSECSR : dword;
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{$endif}
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const
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{*
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-------------------------------------------------------------------------------
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Software IEC/IEEE floating-point exception flags.
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-------------------------------------------------------------------------------
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*}
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float_flag_invalid = 1;
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float_flag_denormal = 2;
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float_flag_divbyzero = 4;
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float_flag_overflow = 8;
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float_flag_underflow = 16;
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float_flag_inexact = 32;
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{ declarations of the math routines }
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threadvar
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softfloat_exception_mask : Byte;
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softfloat_exception_flags : Byte;
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procedure float_raise(i: shortint);
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{$ifdef cpui386}
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{$define INTERNMATH}
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{$endif}
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@ -468,17 +468,6 @@ rounded down.
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float_round_up = 2;
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float_round_to_zero = 3;
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{*
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-------------------------------------------------------------------------------
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Software IEC/IEEE floating-point exception flags.
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-------------------------------------------------------------------------------
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*}
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float_flag_invalid = 1;
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float_flag_divbyzero = 4;
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float_flag_overflow = 8;
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float_flag_underflow = 16;
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float_flag_inexact = 32;
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{*
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-------------------------------------------------------------------------------
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Floating-point rounding mode and exception flags.
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@ -486,7 +475,6 @@ Floating-point rounding mode and exception flags.
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*}
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const
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float_rounding_mode : Byte = float_round_nearest_even;
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float_exception_flags : Byte = 0;
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{*
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-------------------------------------------------------------------------------
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@ -505,31 +493,6 @@ implementation
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{$if not(defined(fpc_softfpu_interface))}
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{*
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-------------------------------------------------------------------------------
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Raises the exceptions specified by `flags'. Floating-point traps can be
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defined here if desired. It is currently not possible for such a trap
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to substitute a result value. If traps are not implemented, this routine
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should be simply `float_exception_flags |= flags;'.
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-------------------------------------------------------------------------------
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*}
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procedure float_raise( i: shortint );
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Begin
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float_exception_flags := float_exception_flags or i;
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if (float_exception_flags and float_flag_invalid) <> 0 then
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RunError(207)
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else
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if (float_exception_flags and float_flag_divbyzero) <> 0 then
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RunError(200)
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else
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if (float_exception_flags and float_flag_overflow) <> 0 then
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RunError(205)
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else
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if (float_exception_flags and float_flag_underflow) <> 0 then
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RunError(206);
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end;
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(*****************************************************************************)
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(*----------------------------------------------------------------------------*)
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(* Primitive arithmetic functions, including multi-word arithmetic, and *)
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@ -595,7 +558,7 @@ begin
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exit;
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end;
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if ( roundBits<>0 ) then
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float_exception_flags := float_exception_flags or float_flag_inexact;
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softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
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result:=z;
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end;
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@ -658,7 +621,7 @@ begin
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result:=int64($7FFFFFFFFFFFFFFF);
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end;
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if ( absZ1<>0 ) then
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float_exception_flags := float_exception_flags or float_flag_inexact;
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softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
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result:=z;
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end;
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@ -2169,7 +2132,7 @@ Function roundAndPackFloat32( zSign : Flag; zExp : Int16; zSig : Bits32 ) : floa
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End;
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End;
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if ( roundBits )<> 0 then
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float_exception_flags := float_flag_inexact OR float_exception_flags;
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softfloat_exception_flags := float_flag_inexact OR softfloat_exception_flags;
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zSig := ( zSig + roundIncrement ) shr 7;
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zSig := zSig AND not bits32( bits32( ( roundBits XOR $40 ) = 0 ) and roundNearestEven );
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if ( zSig = 0 ) then zExp := 0;
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@ -2432,7 +2395,7 @@ Procedure
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End;
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End;
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if ( zSig2 )<>0 then
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float_exception_flags := float_exception_flags OR float_flag_inexact;
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softfloat_exception_flags := softfloat_exception_flags OR float_flag_inexact;
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if ( increment )<>0 then
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Begin
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add64( zSig0, zSig1, 0, 1, zSig0, zSig1 );
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@ -2522,7 +2485,7 @@ begin
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end
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end;
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if ( roundBits<>0 ) then
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float_exception_flags := float_exception_flags or float_flag_inexact;
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softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
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zSig := ( zSig + roundIncrement ) shr 10;
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zSig := zSig and not( ord( ( roundBits xor $200 ) = 0 ) and roundNearestEven );
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if ( zSig = 0 ) then
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@ -2695,7 +2658,7 @@ Function float32_to_int32( a : float32rec) : int32;compilerproc;
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z := aSig shr ( - shiftCount );
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End;
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if ( aSigExtra<>0 ) then
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float_exception_flags := float_exception_flags
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softfloat_exception_flags := softfloat_exception_flags
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or float_flag_inexact;
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roundingMode := float_rounding_mode;
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if ( roundingMode = float_round_nearest_even ) then
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@ -2766,8 +2729,8 @@ Function float32_to_int32_round_to_zero( a: Float32rec ): int32;compilerproc;
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if ( aExp <= $7E ) then
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Begin
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if ( aExp or aSig )<>0 then
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float_exception_flags :=
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float_exception_flags or float_flag_inexact;
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softfloat_exception_flags :=
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softfloat_exception_flags or float_flag_inexact;
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float32_to_int32_round_to_zero := 0;
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exit;
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End;
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@ -2775,8 +2738,8 @@ Function float32_to_int32_round_to_zero( a: Float32rec ): int32;compilerproc;
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z := aSig shr ( - shiftCount );
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if ( bits32 ( aSig shl ( shiftCount and 31 ) )<> 0 ) then
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Begin
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float_exception_flags :=
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float_exception_flags or float_flag_inexact;
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softfloat_exception_flags :=
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softfloat_exception_flags or float_flag_inexact;
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End;
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if ( aSign<>0 ) then z := - z;
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float32_to_int32_round_to_zero := z;
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@ -2859,8 +2822,8 @@ Function float32_round_to_int( a: float32rec): float32rec;compilerproc;
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float32_round_to_int:=a;
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exit;
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end;
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float_exception_flags
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:= float_exception_flags OR float_flag_inexact;
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softfloat_exception_flags
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:= softfloat_exception_flags OR float_flag_inexact;
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aSign := extractFloat32Sign( a.float32 );
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case ( float_rounding_mode ) of
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@ -2912,7 +2875,7 @@ Function float32_round_to_int( a: float32rec): float32rec;compilerproc;
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End;
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z := z and not roundBitsMask;
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if ( z <> a.float32 ) then
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float_exception_flags := float_exception_flags or float_flag_inexact;
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softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
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float32_round_to_int.float32 := z;
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End;
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@ -3820,7 +3783,7 @@ Begin
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exit;
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End;
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if ( aSigExtra <> 0) then
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float_exception_flags := float_exception_flags or float_flag_inexact;
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softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
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float64_to_int32 := z;
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End;
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@ -3867,8 +3830,8 @@ Var
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Begin
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if ( aExp OR aSig0 OR aSig1 )<>0 then
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Begin
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float_exception_flags :=
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float_exception_flags or float_flag_inexact;
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softfloat_exception_flags :=
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softfloat_exception_flags or float_flag_inexact;
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End;
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float64_to_int32_round_to_zero := 0;
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exit;
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@ -3892,7 +3855,7 @@ Var
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exit;
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End;
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if ( aSigExtra <> 0) then
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float_exception_flags := float_exception_flags or float_flag_inexact;
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softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
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float64_to_int32_round_to_zero := z;
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End;
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@ -4010,7 +3973,7 @@ Begin
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result := a;
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exit;
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End;
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float_exception_flags := float_exception_flags or
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softfloat_exception_flags := softfloat_exception_flags or
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float_flag_inexact;
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aSign := extractFloat64Sign( a );
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case ( float_rounding_mode ) of
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@ -4072,8 +4035,8 @@ Begin
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End;
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if ( ( z.low <> a.low ) OR ( z.high <> a.high ) ) then
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Begin
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float_exception_flags :=
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float_exception_flags or float_flag_inexact;
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softfloat_exception_flags :=
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softfloat_exception_flags or float_flag_inexact;
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End;
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result := z;
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End;
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@ -5453,7 +5416,7 @@ begin
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zExp := 0;
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roundBits := zSig0 and roundMask;
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if ( isTiny and roundBits ) float_raise( float_flag_underflow );
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if ( roundBits ) float_exception_flags |= float_flag_inexact;
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if ( roundBits ) softfloat_exception_flags |= float_flag_inexact;
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zSig0 += roundIncrement;
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if ( (sbits64) zSig0 < 0 ) zExp := 1;
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roundIncrement := roundMask + 1;
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@ -5464,7 +5427,7 @@ begin
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result:=packFloatx80( zSign, zExp, zSig0 );
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end;
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end;
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if ( roundBits ) float_exception_flags |= float_flag_inexact;
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if ( roundBits ) softfloat_exception_flags |= float_flag_inexact;
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zSig0 += roundIncrement;
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if ( zSig0 < roundIncrement ) begin
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++zExp;
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@ -5519,7 +5482,7 @@ begin
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shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSig1 );
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zExp := 0;
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if ( isTiny and zSig1 ) float_raise( float_flag_underflow );
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if ( zSig1 ) float_exception_flags |= float_flag_inexact;
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if ( zSig1 ) softfloat_exception_flags |= float_flag_inexact;
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if ( roundNearestEven ) begin
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increment := ( (sbits64) zSig1 < 0 );
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end;
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@ -5540,7 +5503,7 @@ begin
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result:=packFloatx80( zSign, zExp, zSig0 );
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end;
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end;
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if ( zSig1 ) float_exception_flags |= float_flag_inexact;
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if ( zSig1 ) softfloat_exception_flags |= float_flag_inexact;
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if ( increment ) begin
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++zSig0;
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if ( zSig0 = 0 ) begin
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@ -5636,7 +5599,7 @@ begin
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goto invalid;
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end;
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else if ( aExp < $3FFF ) begin
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if ( aExp or aSig ) float_exception_flags or= float_flag_inexact;
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if ( aExp or aSig ) softfloat_exception_flags or= float_flag_inexact;
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result := 0;
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end;
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shiftCount := $403E - aExp;
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@ -5650,7 +5613,7 @@ begin
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result := aSign ? (sbits32) $80000000 : $7FFFFFFF;
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end;
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if ( ( aSig shl shiftCount ) <> savedASig ) begin
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float_exception_flags or= float_flag_inexact;
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softfloat_exception_flags or= float_flag_inexact;
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end;
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result := z;
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@ -5729,12 +5692,12 @@ begin
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result := (sbits64) LIT64( $8000000000000000 );
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end;
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else if ( aExp < $3FFF ) begin
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if ( aExp or aSig ) float_exception_flags or= float_flag_inexact;
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if ( aExp or aSig ) softfloat_exception_flags or= float_flag_inexact;
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result := 0;
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end;
|
||||
z := aSig>>( - shiftCount );
|
||||
if ( (bits64) ( aSig shl ( shiftCount and 63 ) ) ) begin
|
||||
float_exception_flags or= float_flag_inexact;
|
||||
softfloat_exception_flags or= float_flag_inexact;
|
||||
end;
|
||||
if ( aSign ) z := - z;
|
||||
result := z;
|
||||
@ -5851,7 +5814,7 @@ begin
|
||||
and ( (bits64) ( extractFloatx80Frac( a ) shl 1 ) = 0 ) ) begin
|
||||
result := a;
|
||||
end;
|
||||
float_exception_flags or= float_flag_inexact;
|
||||
softfloat_exception_flags or= float_flag_inexact;
|
||||
aSign := extractFloatx80Sign( a );
|
||||
switch ( float_rounding_mode ) begin
|
||||
case float_round_nearest_even:
|
||||
@ -5892,7 +5855,7 @@ begin
|
||||
++z.high;
|
||||
z.low := LIT64( $8000000000000000 );
|
||||
end;
|
||||
if ( z.low <> a.low ) float_exception_flags or= float_flag_inexact;
|
||||
if ( z.low <> a.low ) softfloat_exception_flags or= float_flag_inexact;
|
||||
result := z;
|
||||
|
||||
end;
|
||||
@ -6789,7 +6752,7 @@ begin
|
||||
end;
|
||||
end;
|
||||
if ( zSig2<>0 ) then
|
||||
float_exception_flags := float_exception_flags or float_flag_inexact;
|
||||
softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
|
||||
if ( increment<>0 ) then
|
||||
begin
|
||||
add128( zSig0, zSig1, 0, 1, zSig0, zSig1 );
|
||||
@ -6903,7 +6866,7 @@ begin
|
||||
else if ( aExp < $3FFF ) then
|
||||
begin
|
||||
if ( aExp or aSig0 )<>0 then
|
||||
float_exception_flags := float_exception_flags or float_flag_inexact;
|
||||
softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
|
||||
result := 0;
|
||||
exit;
|
||||
end;
|
||||
@ -6926,7 +6889,7 @@ begin
|
||||
end;
|
||||
if ( ( aSig0 shl shiftCount ) <> savedASig ) then
|
||||
begin
|
||||
float_exception_flags := float_exception_flags or float_flag_inexact;
|
||||
softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
|
||||
end;
|
||||
result := z;
|
||||
end;
|
||||
@ -7011,7 +6974,7 @@ begin
|
||||
and ( aSig1 < int64( $0002000000000000 ) ) ) then
|
||||
begin
|
||||
if ( aSig1<>0 ) then
|
||||
float_exception_flags := float_exception_flags or float_flag_inexact;
|
||||
softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
|
||||
end
|
||||
else begin
|
||||
float_raise( float_flag_invalid );
|
||||
@ -7027,7 +6990,7 @@ begin
|
||||
z := ( aSig0 shl shiftCount ) or ( aSig1>>( ( - shiftCount ) and 63 ) );
|
||||
if ( int64( aSig1 shl shiftCount )<>0 ) then
|
||||
begin
|
||||
float_exception_flags := float_exception_flags or float_flag_inexact;
|
||||
softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
|
||||
end;
|
||||
end
|
||||
else begin
|
||||
@ -7035,7 +6998,7 @@ begin
|
||||
begin
|
||||
if ( aExp or aSig0 or aSig1 )<>0 then
|
||||
begin
|
||||
float_exception_flags := float_exception_flags or float_flag_inexact;
|
||||
softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
|
||||
end;
|
||||
result := 0;
|
||||
exit;
|
||||
@ -7044,7 +7007,7 @@ begin
|
||||
if ( (aSig1<>0)
|
||||
or ( (shiftCount<>0) and (int64( aSig0 shl ( shiftCount and 63 ) )<>0) ) ) then
|
||||
begin
|
||||
float_exception_flags := float_exception_flags or float_flag_inexact;
|
||||
softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
|
||||
end;
|
||||
end;
|
||||
if ( aSign<>0 ) then
|
||||
@ -7239,7 +7202,7 @@ begin
|
||||
result := a;
|
||||
exit;
|
||||
end;
|
||||
float_exception_flags := float_exception_flags or float_flag_inexact;
|
||||
softfloat_exception_flags := softfloat_exception_flags or float_flag_inexact;
|
||||
aSign := extractFloat128Sign( a );
|
||||
case float_rounding_mode of
|
||||
float_round_nearest_even:
|
||||
@ -7291,7 +7254,7 @@ begin
|
||||
z.high &= ~ roundBitsMask;
|
||||
end;
|
||||
if ( ( z.low <> a.low ) or ( z.high <> a.high ) ) begin
|
||||
float_exception_flags or= float_flag_inexact;
|
||||
softfloat_exception_flags or= float_flag_inexact;
|
||||
end;
|
||||
result := z;
|
||||
|
||||
|
||||
@ -1237,14 +1237,19 @@ end;
|
||||
{$IFDEF MORPHOS}
|
||||
{ this is only required for MorphOS }
|
||||
{$define FPC_SYSTEM_HAS_SYSRESETFPU}
|
||||
procedure SysResetFPU;assembler;{$ifdef SYSTEMINLINE}inline;{$endif}
|
||||
var tmp: array[0..1] of dword;
|
||||
asm
|
||||
{ setting fpu to round to nearest mode }
|
||||
li r3,0
|
||||
stw r3,8(r1)
|
||||
stw r3,12(r1)
|
||||
lfd f1,8(r1)
|
||||
mtfsf 7,f1
|
||||
procedure SysResetFPU;$ifdef SYSTEMINLINE}inline;{$endif}
|
||||
var tmp: array[0..1] of dword;
|
||||
begin
|
||||
asm
|
||||
{ setting fpu to round to nearest mode }
|
||||
li r3,0
|
||||
stw r3,8(r1)
|
||||
stw r3,12(r1)
|
||||
lfd f1,8(r1)
|
||||
mtfsf 7,f1
|
||||
end;
|
||||
{ powerpc might use softfloat code }
|
||||
softfloat_exception_flags:=0;
|
||||
softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal;
|
||||
end;
|
||||
{$ENDIF}
|
||||
|
||||
@ -16,6 +16,9 @@
|
||||
unit System;
|
||||
interface
|
||||
|
||||
|
||||
{ $define SYSTEMEXCEPTIONDEBUG}
|
||||
|
||||
{$ifdef SYSTEMDEBUG}
|
||||
{$define SYSTEMEXCEPTIONDEBUG}
|
||||
{$endif SYSTEMDEBUG}
|
||||
|
||||
@ -94,6 +94,7 @@ begin
|
||||
CtlWord:=Get8087CW;
|
||||
Set8087CW((CtlWord and $FFC0) or Byte(Longint(Mask)));
|
||||
SetSSECSR((GetSSECSR and $ffffe07f) or (dword(Mask) shl 7));
|
||||
softfloat_exception_mask:=dword(Mask);
|
||||
Result:=GetExceptionMask;
|
||||
end;
|
||||
|
||||
|
||||
@ -592,22 +592,27 @@ const
|
||||
mxcsr : dword = MM_MaskUnderflow or MM_MaskPrecision or MM_MaskDenorm;
|
||||
|
||||
{$define FPC_SYSTEM_HAS_SYSRESETFPU}
|
||||
Procedure SysResetFPU;assembler;{$ifdef SYSTEMINLINE}inline;{$endif}
|
||||
asm
|
||||
Procedure SysResetFPU;
|
||||
begin
|
||||
asm
|
||||
{$ifndef WIN64}
|
||||
{ initialize fpu }
|
||||
fninit
|
||||
fwait
|
||||
{ initialize fpu }
|
||||
fninit
|
||||
fwait
|
||||
{$endif WIN64}
|
||||
{$ifdef FPC_PIC}
|
||||
movq fpucw@GOTPCREL(%rip),%rax
|
||||
fldcw (%rax)
|
||||
{ set sse exceptions }
|
||||
movq mxcsr@GOTPCREL(%rip),%rax
|
||||
ldmxcsr (%rax)
|
||||
movq fpucw@GOTPCREL(%rip),%rax
|
||||
fldcw (%rax)
|
||||
{ set sse exceptions }
|
||||
movq mxcsr@GOTPCREL(%rip),%rax
|
||||
ldmxcsr (%rax)
|
||||
{$else FPC_PIC}
|
||||
fldcw fpucw
|
||||
{ set sse exceptions }
|
||||
ldmxcsr mxcsr
|
||||
fldcw fpucw
|
||||
{ set sse exceptions }
|
||||
ldmxcsr mxcsr
|
||||
{$endif FPC_PIC}
|
||||
end ['RAX'];
|
||||
{ x86-64 might use softfloat code }
|
||||
softfloat_exception_flags:=0;
|
||||
softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal;
|
||||
end;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user